xref: /optee_os/mk/config.mk (revision 949b0c0c6256c79b714d188839b67a85ec5a0b3b)
1# Default configuration values for OP-TEE core (all platforms).
2#
3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk.
4# Some subsystem-specific defaults are not here but rather in */sub.mk.
5#
6# Configuration values may be assigned from multiple sources.
7# From higher to lower priority:
8#
9#   1. Make arguments ('make CFG_FOO=bar...')
10#   2. The file specified by $(CFG_OPTEE_CONFIG) (if defined)
11#   3. The environment ('CFG_FOO=bar make...')
12#   4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk
13#   5. This file
14#   6. Subsystem-specific makefiles (*/sub.mk)
15#
16# Actual values used during the build are output to $(out-dir)/conf.mk
17# (CFG_* variables only).
18
19# Cross-compiler prefix and suffix
20ifeq ($(ARCH),arm)
21CROSS_COMPILE ?= arm-linux-gnueabihf-
22CROSS_COMPILE64 ?= aarch64-linux-gnu-
23endif
24ifeq ($(ARCH),riscv)
25CROSS_COMPILE ?= riscv-linux-gnu-
26CROSS_COMPILE64 ?= riscv64-linux-gnu-
27endif
28CROSS_COMPILE32 ?= $(CROSS_COMPILE)
29COMPILER ?= gcc
30
31# For convenience
32ifdef CFLAGS
33CFLAGS32 ?= $(CFLAGS)
34CFLAGS64 ?= $(CFLAGS)
35endif
36
37# Compiler warning level.
38# Supported values: undefined, 1, 2 and 3. 3 gives more warnings.
39WARNS ?= 3
40
41# Path to the Python interpreter used by the build system.
42# This variable is set to the default python3 interpreter in the user's
43# path. But build environments that require more explicit control can
44# set the path to a specific interpreter through this variable.
45PYTHON3 ?= python3
46
47# Define DEBUG=1 to compile without optimization (forces -O0)
48# DEBUG=1
49ifeq ($(DEBUG),1)
50# For backwards compatibility
51$(call force,CFG_CC_OPT_LEVEL,0)
52$(call force,CFG_DEBUG_INFO,y)
53endif
54
55# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive.
56# Optimize for size by default, usually gives good performance too.
57CFG_CC_OPT_LEVEL ?= s
58
59# Enabling CFG_DEBUG_INFO makes debug information embedded in core.
60CFG_DEBUG_INFO ?= y
61
62# If y, enable debug features of the TEE core (assertions and lock checks
63# are enabled, panic and assert messages are more verbose, data and prefetch
64# aborts show a stack dump). When disabled, the NDEBUG directive is defined
65# so assertions are disabled.
66CFG_TEE_CORE_DEBUG ?= y
67
68# Log levels for the TEE core. Defines which core messages are displayed
69# on the secure console. Disabling core log (level set to 0) also disables
70# logs from the TAs.
71# 0: none
72# 1: error
73# 2: error + info
74# 3: error + info + debug
75# 4: error + info + debug + flow
76CFG_TEE_CORE_LOG_LEVEL ?= 2
77
78# TA log level
79# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0,
80# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL
81# when the TA is built.
82CFG_TEE_TA_LOG_LEVEL ?= 1
83
84# TA enablement
85# When defined to "y", TA traces are output according to
86# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all
87CFG_TEE_CORE_TA_TRACE ?= y
88
89# If y, enable the memory leak detection feature in the bget memory allocator.
90# When this feature is enabled, calling mdbg_check(1) will print a list of all
91# the currently allocated buffers and the location of the allocation (file and
92# line number).
93# Note: make sure the log level is high enough for the messages to show up on
94# the secure console! For instance:
95# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with:
96#   $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3
97# - To debug TEE core allocations: build OP-TEE with:
98#   $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3
99CFG_TEE_CORE_MALLOC_DEBUG ?= n
100CFG_TEE_TA_MALLOC_DEBUG ?= n
101# Prints an error message and dumps the stack on failed memory allocations
102# using malloc() and friends.
103CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG)
104
105# Mask to select which messages are prefixed with long debugging information
106# (severity, core ID, thread ID, component name, function name, line number)
107# based on the message level. If BIT(level) is set, the long prefix is shown.
108# Otherwise a short prefix is used (severity and component name only).
109# Levels: 0=none 1=error 2=info 3=debug 4=flow
110CFG_MSG_LONG_PREFIX_MASK ?= 0x1a
111
112# Number of threads
113CFG_NUM_THREADS ?= 2
114
115# API implementation version
116CFG_TEE_API_VERSION ?= GPD-1.1-dev
117
118# Implementation description (implementation-dependent)
119CFG_TEE_IMPL_DESCR ?= OPTEE
120
121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal
122# World?
123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y
124
125# The following values are not extracted from the "git describe" output because
126# we might be outside of a Git environment, or the tree may have been cloned
127# with limited depth not including any tag, so there is really no guarantee
128# that TEE_IMPL_VERSION contains the major and minor revision numbers.
129CFG_OPTEE_REVISION_MAJOR ?= 4
130CFG_OPTEE_REVISION_MINOR ?= 5
131CFG_OPTEE_REVISION_EXTRA ?=
132
133# Trusted OS implementation version
134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \
135		      echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA)
136
137# Trusted OS implementation manufacturer name
138CFG_TEE_MANUFACTURER ?= LINARO
139
140# Trusted firmware version
141CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF
142
143# Trusted OS implementation manufacturer name
144CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF
145
146# Rich Execution Environment (REE) file system support: normal world OS
147# provides the actual storage.
148# This is the default FS when enabled (i.e., the one used when
149# TEE_STORAGE_PRIVATE is passed to the trusted storage API)
150CFG_REE_FS ?= y
151
152# RPMB file system support
153CFG_RPMB_FS ?= n
154
155# Enable roll-back protection of REE file system using RPMB.
156# Roll-back protection only works if CFG_RPMB_FS = y.
157CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS)
158$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS))
159
160# Device identifier used when CFG_RPMB_FS = y.
161# The exact meaning of this value is platform-dependent. On Linux, the
162# tee-supplicant process will open /dev/mmcblk<id>rpmb
163CFG_RPMB_FS_DEV_ID ?= 0
164
165# This config variable determines the number of entries read in from RPMB at
166# once whenever a function traverses the RPMB FS. Increasing the default value
167# has the following consequences:
168# - More memory required on heap. A single FAT entry currently has a size of
169#   256 bytes.
170# - Potentially significant speed-ups for RPMB I/O. Depending on how many
171#   entries a function needs to traverse, the number of time-consuming RPMB
172#   read-in operations can be reduced.
173# Chosing a proper value is both platform- (available memory) and use-case-
174# dependent (potential number of FAT fs entries), so overwrite in platform
175# config files
176CFG_RPMB_FS_RD_ENTRIES ?= 8
177
178# Enables caching of FAT FS entries when set to a value greater than zero.
179# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS
180# entries. The cache is populated when FAT FS entries are initially read in.
181# When traversing the FAT FS entries, we read from the cache instead of reading
182# in the entries from RPMB storage. Consequently, when a FAT FS entry is
183# written, the cache is updated. In scenarios where an estimate of the number
184# of FAT FS entries can be made, the cache may be specifically tailored to
185# store all entries. The caching can improve RPMB I/O at the cost
186# of additional memory.
187# Without caching, we temporarily require
188# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
189# while traversing the FAT FS (e.g. in read_fat).
190# For example 8*256 bytes = 2kB while in read_fat.
191# With caching, we constantly require up to
192# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
193# depending on how many elements are in the cache, and additional temporary
194# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
195# in case the cache is too small to hold all elements when traversing.
196CFG_RPMB_FS_CACHE_ENTRIES ?= 0
197
198# Print RPMB data frames sent to and received from the RPMB device
199CFG_RPMB_FS_DEBUG_DATA ?= n
200
201# Clear RPMB content at cold boot
202CFG_RPMB_RESET_FAT ?= n
203
204# Use a hard coded RPMB key instead of deriving it from the platform HUK
205CFG_RPMB_TESTKEY ?= n
206
207# Enables RPMB key programming by the TEE, in case the RPMB partition has not
208# been configured yet.
209# !!! Security warning !!!
210# Do *NOT* enable this in product builds, as doing so would allow the TEE to
211# leak the RPMB key.
212# This option is useful in the following situations:
213# - Testing
214# - RPMB key provisioning in a controlled environment (factory setup)
215CFG_RPMB_WRITE_KEY ?= n
216
217# For the kernel driver to enable in-kernel RPMB routing it must know in
218# advance that OP-TEE supports it. Setting CFG_RPMB_ANNOUNCE_PROBE_CAP=y
219# will announce OP-TEE's capability for RPMB probing to the kernel and it
220# will use in-kernel RPMB routing, without it all RPMB commands will be
221# routed to tee-supplicant. This option is intended give some control over
222# how the RPMB commands are routed to simplify testing.
223CFG_RPMB_ANNOUNCE_PROBE_CAP ?= y
224
225_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS)
226
227# Signing key for OP-TEE TA's
228# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy
229# key and then set TA_PUBLIC_KEY to match public key from the HSM.
230# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS.
231TA_SIGN_KEY ?= keys/default_ta.pem
232TA_PUBLIC_KEY ?= $(TA_SIGN_KEY)
233
234# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used
235# to verify a TA instead. To sign a TA using a previously prepared subkey
236# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS.  It is
237# typically used by assigning the following in the TA Makefile:
238# BINARY = <TA-uuid-string>
239# TA_SIGN_KEY = subkey.pem
240# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta
241# TA_SUBKEY_DEPS = subkey.bin
242# See the documentation for more details on subkeys.
243
244# Include lib/libutils/isoc in the build? Most platforms need this, but some
245# may not because they obtain the isoc functions from elsewhere
246CFG_LIBUTILS_WITH_ISOC ?= y
247
248# Enables floating point support for user TAs
249# ARM32: EABI defines both a soft-float ABI and a hard-float ABI,
250#	 hard-float is basically a super set of soft-float. Hard-float
251#	 requires all the support routines provided for soft-float, but the
252#	 compiler may choose to optimize to not use some of them and use
253#	 the floating-point registers instead.
254# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or
255#	 nothing with ` -mgeneral-regs-only`)
256# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types
257CFG_TA_FLOAT_SUPPORT ?= y
258
259# Stack unwinding: print a stack dump to the console on core or TA abort, or
260# when a TA panics.
261# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be
262# unwound (not paged TAs, however).
263# Note that 32-bit ARM code needs unwind tables for this to work, so enabling
264# this option will increase the size of the 32-bit TEE binary by a few KB.
265# Similarly, TAs have to be compiled with -funwind-tables (default when the
266# option is set) otherwise they can't be unwound.
267# Warning: since the unwind sequence for user-mode (TA) code is implemented in
268# the privileged layer of OP-TEE, enabling this feature will weaken the
269# user/kernel isolation. Therefore it should be disabled in release builds.
270ifeq ($(CFG_TEE_CORE_DEBUG),y)
271CFG_UNWIND ?= y
272endif
273
274# Enable support for dynamically loaded user TAs
275CFG_WITH_USER_TA ?= y
276
277# Build user TAs included in this source tree
278CFG_BUILD_IN_TREE_TA ?= y
279
280# Choosing the architecture(s) of user-mode libraries (used by TAs)
281#
282# Platforms may define a list of supported architectures for user-mode code
283# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64",
284# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32".
285# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits,
286# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y).
287# The first entry in $(supported-ta-targets) has a special role, see
288# CFG_USER_TA_TARGET_<ta-name> below.
289#
290# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or
291# change the order of the values.
292#
293# The list of TA architectures is ultimately stored in $(ta-targets).
294
295# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if
296# defined, selects the unique TA architecture mode for building the in-tree TA
297# <ta-name>. Can be either ta_arm32 or ta_arm64.
298# By default, in-tree TAs are built using the first architecture specified in
299# $(ta-targets).
300
301# Address Space Layout Randomization for user-mode Trusted Applications
302#
303# When this flag is enabled, the ELF loader will introduce a random offset
304# when mapping the application in user space. ASLR makes the exploitation of
305# memory corruption vulnerabilities more difficult.
306CFG_TA_ASLR ?= y
307
308# How much ASLR may shift the base address (in pages). The base address is
309# randomly shifted by an integer number of pages comprised between these two
310# values. Bigger ranges are more secure because they make the addresses harder
311# to guess at the expense of using more memory for the page tables.
312CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0
313CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128
314
315# Address Space Layout Randomization for TEE Core
316#
317# When this flag is enabled, the early init code will introduce a random
318# offset when mapping TEE Core. ASLR makes the exploitation of memory
319# corruption vulnerabilities more difficult.
320CFG_CORE_ASLR ?= y
321
322# Stack Protection for TEE Core
323# This flag enables the compiler stack protection mechanisms -fstack-protector.
324# It will check the stack canary value before returning from a function to
325# prevent buffer overflow attacks. Stack protector canary logic will be added
326# for vulnerable functions that contain:
327# - A character array larger than 8 bytes.
328# - An 8-bit integer array larger than 8 bytes.
329# - A call to alloca() with either a variable size or a constant size bigger
330#   than 8 bytes.
331CFG_CORE_STACK_PROTECTOR ?= n
332# This enable stack protector flag -fstack-protector-strong. Stack protector
333# canary logic will be added for vulnerable functions that contain:
334# - An array of any size and type.
335# - A call to alloca().
336# - A local variable that has its address taken.
337CFG_CORE_STACK_PROTECTOR_STRONG ?= y
338# This enable stack protector flag -fstack-protector-all. Stack protector canary
339# logic will be added to all functions regardless of their vulnerability.
340CFG_CORE_STACK_PROTECTOR_ALL ?= n
341# Stack Protection for TA
342CFG_TA_STACK_PROTECTOR ?= n
343CFG_TA_STACK_PROTECTOR_STRONG ?= y
344CFG_TA_STACK_PROTECTOR_ALL ?= n
345
346_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \
347						     CFG_CORE_STACK_PROTECTOR_STRONG \
348						     CFG_CORE_STACK_PROTECTOR_ALL)
349_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \
350						   CFG_TA_STACK_PROTECTOR_STRONG \
351						   CFG_TA_STACK_PROTECTOR_ALL)
352
353# Load user TAs from the REE filesystem via tee-supplicant
354CFG_REE_FS_TA ?= y
355
356# Pre-authentication of TA binaries loaded from the REE filesystem
357#
358# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the
359#   "Secure DDR" pool, check the signature, then process the file only if it is
360#   valid.
361# - If disabled: hash the binaries as they are being processed and verify the
362#   signature as a last step.
363CFG_REE_FS_TA_BUFFERED ?= n
364$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA))
365
366# When CFG_REE_FS=y:
367# Allow secure storage in the REE FS to be entirely deleted without causing
368# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or
369# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH)
370# can be used to reset the secure storage to a clean, empty state.
371# Intended to be used for testing only since it weakens storage security.
372# Warning: If enabled for release build then it will break rollback protection
373# of TAs and the entire REE FS secure storage.
374CFG_REE_FS_ALLOW_RESET ?= n
375
376# Support for loading user TAs from a special section in the TEE binary.
377# Such TAs are available even before tee-supplicant is available (hence their
378# name), but note that many services exported to TAs may need tee-supplicant,
379# so early use is limited to a subset of the TEE Internal Core API (crypto...)
380# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF
381# file(s). For example:
382#   $ make ... \
383#     EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \
384#                     path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf"
385# Typical build steps:
386#   $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries,
387#                                    # headers, makefiles), ready to build TAs.
388#                                    # CFG_EARLY_TA=y is optional, it prevents
389#                                    # later library recompilations.
390#   <build some TAs>
391#   $ make EARLY_TA_PATHS=<paths>    # Build OP-TEE and embbed the TA(s)
392#
393# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at
394# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as:
395# <name-of-ta>/<uuid>
396# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067
397ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),)
398$(call force,CFG_EARLY_TA,y)
399else
400CFG_EARLY_TA ?= n
401endif
402
403ifeq ($(CFG_EARLY_TA),y)
404$(call force,CFG_EMBEDDED_TS,y)
405endif
406
407ifneq ($(SP_PATHS),)
408$(call force,CFG_EMBEDDED_TS,y)
409else
410CFG_SECURE_PARTITION ?= n
411endif
412
413ifeq ($(CFG_SECURE_PARTITION),y)
414$(call force,CFG_EMBEDDED_TS,y)
415endif
416
417ifeq ($(CFG_EMBEDDED_TS),y)
418$(call force,CFG_ZLIB,y)
419endif
420
421# By default the early TAs are compressed in the TEE binary, it is possible to
422# not compress them with CFG_EARLY_TA_COMPRESS=n
423CFG_EARLY_TA_COMPRESS ?= y
424
425# Enable paging, requires SRAM, can't be enabled by default
426CFG_WITH_PAGER ?= n
427
428# Use the pager for user TAs
429CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER)
430
431# If paging of user TAs, that is, R/W paging default to enable paging of
432# TAG and IV in order to reduce heap usage.
433CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA)
434
435# Runtime lock dependency checker: ensures that a proper locking hierarchy is
436# used in the TEE core when acquiring and releasing mutexes. Any violation will
437# cause a panic as soon as the invalid locking condition is detected. If
438# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm
439# records the call stacks when locks are taken, and prints them when a
440# potential deadlock is found.
441# Expect a significant performance impact when enabling this.
442CFG_LOCKDEP ?= n
443CFG_LOCKDEP_RECORD_STACK ?= y
444
445# BestFit algorithm in bget reduces the fragmentation of the heap when running
446# with the pager enabled or lockdep
447CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP)
448
449# Enable support for detected undefined behavior in C
450# Uses a lot of memory, can't be enabled by default
451CFG_CORE_SANITIZE_UNDEFINED ?= n
452CFG_TA_SANITIZE_UNDEFINED ?= n
453
454# Enable Kernel Address sanitizer, has a huge performance impact, uses a
455# lot of memory and need platform specific adaptations, can't be enabled by
456# default
457CFG_CORE_SANITIZE_KADDRESS ?= n
458
459ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_CORE_ASLR))
460$(error CFG_CORE_SANITIZE_KADDRESS and CFG_CORE_ASLR are not compatible)
461endif
462
463# Add stack guards before/after stacks and periodically check them
464CFG_WITH_STACK_CANARIES ?= y
465
466# Use compiler instrumentation to troubleshoot stack overflows.
467# When enabled, most C functions check the stack pointer against the current
468# stack limits on entry and panic immediately if it is out of range.
469CFG_CORE_DEBUG_CHECK_STACKS ?= n
470
471# Use when the default stack allocations are not sufficient.
472CFG_STACK_THREAD_EXTRA ?= 0
473CFG_STACK_TMP_EXTRA ?= 0
474
475# Device Tree support
476#
477# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing
478# device tree blob (DTB) parsing from the core.
479#
480# When CFG_DT is enabled, the TEE _start function expects to find
481# the address of a DTB in register X2/R2 provided by the early boot stage
482# or value 0 if boot stage provides no DTB.
483#
484# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented
485# and the external device tree is expected to be used/modified. Its value
486# defaults to CFG_DT.
487#
488# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to
489# be in the secure memory.
490#
491# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the
492# relative path of a DTS file located in core/arch/$(ARCH)/dts.
493# The DTS file is compiled into a DTB file which content is embedded in a
494# read-only section of the core.
495ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),)
496CFG_EMBED_DTB ?= y
497endif
498ifeq ($(filter y,$(CFG_EMBED_DTB) $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \
499		 $(CFG_CORE_EL3_SPMC)),y)
500$(call force,CFG_DT,y)
501endif
502CFG_EMBED_DTB ?= n
503CFG_DT ?= n
504CFG_EXTERNAL_DT ?= $(CFG_DT)
505CFG_MAP_EXT_DT_SECURE ?= n
506ifeq ($(CFG_MAP_EXT_DT_SECURE),y)
507$(call force,CFG_DT,y)
508endif
509
510# This option enables OP-TEE to support boot arguments handover via Transfer
511# List defined in Firmware Handoff specification.
512# Note: This is an experimental feature and incompatible ABI changes can be
513# expected. It should be off by default until Firmware Handoff specification
514# has a stable release.
515# This feature requires the support of Device Tree.
516CFG_TRANSFER_LIST ?= n
517ifeq ($(CFG_TRANSFER_LIST),y)
518$(call force,CFG_DT,y)
519$(call force,CFG_EXTERNAL_DT,y)
520$(call force,CFG_MAP_EXT_DT_SECURE,y)
521endif
522
523# Maximum size of the Device Tree Blob, has to be large enough to allow
524# editing of the supplied DTB.
525CFG_DTB_MAX_SIZE ?= 0x10000
526
527# CFG_DT_CACHED_NODE_INFO, when enabled, parses the embedded DT at boot
528# time and caches some information to speed up retrieve of DT node data,
529# more specifically those for which libfdt parses the full DTB to find
530# the target node information.
531CFG_DT_CACHED_NODE_INFO ?= $(CFG_EMBED_DTB)
532$(eval $(call cfg-depends-all,CFG_DT_CACHED_NODE_INFO,CFG_EMBED_DTB))
533
534# Maximum size of the init info data passed to Secure Partitions.
535CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000
536
537# Device Tree Overlay support.
538# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing
539# external DTB. The overlay is created when no valid DTB overlay is found.
540# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external
541# DTB location.
542# External DTB location (physical address) is provided either by boot
543# argument arg2 or from CFG_DT_ADDR if defined.
544# A subsequent boot stage can then merge the generated overlay DTB into a main
545# DTB using the standard fdt_overlay_apply() method.
546CFG_EXTERNAL_DTB_OVERLAY ?= n
547CFG_GENERATE_DTB_OVERLAY ?= n
548
549ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY))
550$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive)
551endif
552_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \
553			  CFG_GENERATE_DTB_OVERLAY)
554
555# All embedded tests are supposed to be disabled by default, this flag
556# is used to control the default value of all other embedded tests
557CFG_ENABLE_EMBEDDED_TESTS ?= n
558
559# Enable core self tests and related pseudo TAs
560CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS)
561
562# Compiles bget_main_test() to be called from a test TA
563CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS)
564
565# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests.
566# This also requires embedding a DTB with expected content.
567# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers.
568# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n.
569CFG_DT_DRIVER_EMBEDDED_TEST ?= n
570ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y)
571CFG_DRIVERS_CLK ?= y
572CFG_DRIVERS_GPIO ?= y
573CFG_DRIVERS_RSTCTRL ?= y
574CFG_DRIVERS_CLK_EARLY_PROBE ?= n
575$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST)
576endif
577
578# CFG_WITH_STATS when enabled embeds PTA statistics service to allow non-secure
579# clients to retrieve debug and statistics information on core and loaded TAs.
580CFG_WITH_STATS ?= n
581
582# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode
583# parsing in the embedded DTB for driver probing. The alternative is
584# an exploration based on compatible drivers found. It is default disabled.
585CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n
586
587# This option enables OP-TEE to respond to SMP boot request: the Rich OS
588# issues this to request OP-TEE to release secondaries cores out of reset,
589# with specific core number and non-secure entry address.
590CFG_BOOT_SECONDARY_REQUEST ?= n
591
592# Default heap size for Core, 64 kB
593CFG_CORE_HEAP_SIZE ?= 65536
594
595# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION
596# is enabled
597CFG_CORE_NEX_HEAP_SIZE ?= 16384
598
599# TA profiling.
600# When this option is enabled, OP-TEE can execute Trusted Applications
601# instrumented with GCC's -pg flag and will output profiling information
602# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in
603# tee-supplicant)
604# Note: this does not work well with shared libraries at the moment for a
605# couple of reasons:
606# 1. The profiling code assumes a unique executable section in the TA VA space.
607# 2. The code used to detect at run time if the TA is intrumented assumes that
608# the TA is linked statically.
609CFG_TA_GPROF_SUPPORT ?= n
610
611# TA function tracing.
612# When this option is enabled, OP-TEE can execute Trusted Applications
613# instrumented with GCC's -pg flag and will output function tracing
614# information for all functions compiled with -pg to
615# /tmp/ftrace-<ta_uuid>.out (path is defined in tee-supplicant).
616CFG_FTRACE_SUPPORT ?= n
617
618# Core syscall function tracing.
619# When this option is enabled, OP-TEE core is instrumented with GCC's
620# -pg flag and will output syscall function graph in user TA ftrace
621# buffer
622CFG_SYSCALL_FTRACE ?= n
623$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT)
624
625# Enable to compile user TA libraries with profiling (-pg).
626# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT.
627CFG_ULIBS_MCOUNT ?= n
628# Profiling/tracing of syscall wrapper (utee_*)
629CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT)
630
631ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT)))
632ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT)))
633$(error Cannot instrument user libraries if user mode profiling is disabled)
634endif
635endif
636
637# Build libutee, libutils, libmbedtls as shared libraries.
638# - Static libraries are still generated when this is enabled, but TAs will use
639# the shared libraries unless explicitly linked with the -static flag.
640# - Shared libraries are made of two files: for example, libutee is
641#   libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file
642#   is a totally standard shared object, and should be used to link against.
643#   The '.ta' file is a signed version of the '.so' and should be installed
644#   in the same way as TAs so that they can be found at runtime.
645CFG_ULIBS_SHARED ?= n
646
647ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED))
648$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible)
649endif
650
651# CFG_GP_SOCKETS
652# Enable Global Platform Sockets support
653CFG_GP_SOCKETS ?= y
654
655# Enable Secure Data Path support in OP-TEE core (TA may be invoked with
656# invocation parameters referring to specific secure memories).
657CFG_SECURE_DATA_PATH ?= n
658
659# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y
660# TA binaries are stored encrypted in the REE FS and are protected by
661# metadata in secure storage.
662CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA)
663$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA))
664
665# Enable the pseudo TA that managages TA storage in secure storage
666CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA)
667$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA))
668
669# Enable the pseudo TA for misc. auxilary services, extending existing
670# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy
671# pool etc...)
672CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA)
673$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA))
674
675# Enable the pseudo TA for enumeration of TEE based devices for the normal
676# world OS.
677CFG_DEVICE_ENUM_PTA ?= y
678
679# The attestation pseudo TA provides an interface to request measurements of
680# a TA or the TEE binary.
681CFG_ATTESTATION_PTA ?= n
682$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE))
683
684# RSA key size (in bits) for the attestation PTA. Must be at least 528 given
685# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but
686# note that such a low value is not secure.
687# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and
688# https://tools.ietf.org/html/rfc8017#section-9.1.1
689#  emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66
690#  emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes
691CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072
692
693# Define the number of cores per cluster used in calculating core position.
694# The cluster number is shifted by this value and added to the core ID,
695# so its value represents log2(cores/cluster).
696# Default is 2**(2) = 4 cores per cluster.
697CFG_CORE_CLUSTER_SHIFT ?= 2
698
699# Define the number of threads per core used in calculating processing
700# element's position. The core number is shifted by this value and added to
701# the thread ID, so its value represents log2(threads/core).
702# Default is 2**(0) = 1 threads per core.
703CFG_CORE_THREAD_SHIFT ?= 0
704
705# Enable support for dynamic shared memory (shared memory anywhere in
706# non-secure memory).
707CFG_CORE_DYN_SHM ?= y
708
709# Enable support for reserved shared memory (shared memory in a carved out
710# memory area).
711CFG_CORE_RESERVED_SHM ?= y
712
713# Enables support for larger physical addresses, that is, it will define
714# paddr_t as a 64-bit type.
715CFG_CORE_LARGE_PHYS_ADDR ?= n
716
717# Define the maximum size, in bits, for big numbers in the Internal Core API
718# Arithmetical functions. This does *not* influence the key size that may be
719# manipulated through the Cryptographic API.
720# Set this to a lower value to reduce the TA memory footprint.
721CFG_TA_BIGNUM_MAX_BITS ?= 2048
722
723# Not used since libmpa was removed. Force the values to catch build scripts
724# that would set = n.
725$(call force,CFG_TA_MBEDTLS_MPI,y)
726$(call force,CFG_TA_MBEDTLS,y)
727
728# Compile the TA library mbedTLS with self test functions, the functions
729# need to be called to test anything
730CFG_TA_MBEDTLS_SELF_TEST ?= y
731
732# By default use tomcrypt as the main crypto lib providing an implementation
733# for the API in <crypto/crypto.h>
734# CFG_CRYPTOLIB_NAME is used as libname and
735# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library
736#
737# It's also possible to configure to use mbedtls instead of tomcrypt.
738# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and
739# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively.
740CFG_CRYPTOLIB_NAME ?= tomcrypt
741CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt
742
743# Not used since libmpa was removed. Force the value to catch build scripts
744# that would set = n.
745$(call force,CFG_CORE_MBEDTLS_MPI,y)
746
747# When enabled, CFG_NS_VIRTUALIZATION embeds support for virtualization in
748# the non-secure world. OP-TEE will not work without a compatible hypervisor
749# in the non-secure world if this option is enabled.
750#
751# CFG_VIRTUALIZATION served the same purpose as CFG_NS_VIRTUALIZATION but is
752# deprecated as the configuration switch name was ambiguous regarding which
753# world has virtualization enabled.
754ifneq (undefined,$(flavor CFG_VIRTUALIZATION))
755$(info WARNING: CFG_VIRTUALIZATION is deprecated, use CFG_NS_VIRTUALIZATION instead)
756CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION)
757ifneq ($(CFG_NS_VIRTUALIZATION),$(CFG_VIRTUALIZATION))
758$(error Inconsistent CFG_NS_VIRTUALIZATION=$(CFG_NS_VIRTUALIZATION) and CFG_VIRTUALIZATION=$(CFG_VIRTUALIZATION))
759endif
760endif # CFG_VIRTUALIZATION defined
761CFG_NS_VIRTUALIZATION ?= n
762
763ifeq ($(CFG_NS_VIRTUALIZATION),y)
764$(call force,CFG_CORE_RODATA_NOEXEC,y)
765$(call force,CFG_CORE_RWDATA_NOEXEC,y)
766
767# Default number of virtual guests
768CFG_VIRT_GUEST_COUNT ?= 2
769endif
770
771# Enables backwards compatible derivation of RPMB and SSK keys
772CFG_CORE_HUK_SUBKEY_COMPAT ?= y
773
774# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation.
775# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y.
776CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n
777
778# Compress and encode conf.mk into the TEE core, and show the encoded string on
779# boot (with severity TRACE_INFO).
780CFG_SHOW_CONF_ON_BOOT ?= n
781
782# Enables support for passing a TPM Event Log stored in secure memory
783# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement
784# taken before the service was up and running.
785CFG_CORE_TPM_EVENT_LOG ?= n
786
787# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core.
788# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_*
789#
790# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support.
791# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support.
792# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers
793# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support.
794# CFG_SCMI_MSG_PERF_DOMAIN embeds SCMI performance domain management protocol
795# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory
796# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory
797# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory
798# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer
799CFG_SCMI_MSG_DRIVERS ?= n
800ifeq ($(CFG_SCMI_MSG_DRIVERS),y)
801CFG_SCMI_MSG_CLOCK ?= n
802CFG_SCMI_MSG_RESET_DOMAIN ?= n
803CFG_SCMI_MSG_SHM_MSG ?= n
804CFG_SCMI_MSG_SMT ?= n
805CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n
806CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n
807CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n
808CFG_SCMI_MSG_THREAD_ENTRY ?= n
809CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n
810CFG_SCMI_MSG_PERF_DOMAIN ?= n
811$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT))
812$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT))
813$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG))
814ifeq ($(CFG_SCMI_MSG_SMT),y)
815_CFG_SCMI_PTA_SMT_HEADER := y
816endif
817ifeq ($(CFG_SCMI_MSG_SHM_MSG),y)
818_CFG_SCMI_PTA_MSG_HEADER := y
819endif
820endif
821
822# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation
823# from SCP-firmware package as an built-in SCMI stack in core. This
824# configuration mandates target product identifier is configured with
825# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with
826# CFG_SCP_FIRMWARE.
827CFG_SCMI_SCPFW ?= n
828
829ifeq ($(CFG_SCMI_SCPFW),y)
830$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW)
831ifeq (,$(CFG_SCMI_SCPFW_PRODUCT))
832$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration)
833endif
834ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt))
835$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration)
836endif
837endif #CFG_SCMI_SCPFW
838
839ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y)
840$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive)
841endif
842
843# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for
844# the platform SCMI server and implements the platform plat_scmi_clock_*()
845# functions.
846CFG_SCMI_MSG_USE_CLK ?= n
847$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS))
848
849# Enable SCMI PTA interface for REE SCMI agents
850CFG_SCMI_PTA ?= n
851ifeq ($(CFG_SCMI_PTA),y)
852_CFG_SCMI_PTA_SMT_HEADER ?= n
853_CFG_SCMI_PTA_MSG_HEADER ?= n
854endif
855
856ifneq ($(CFG_STMM_PATH),)
857$(call force,CFG_WITH_STMM_SP,y)
858else
859CFG_WITH_STMM_SP ?= n
860endif
861ifeq ($(CFG_WITH_STMM_SP),y)
862$(call force,CFG_ZLIB,y)
863endif
864
865# When enabled checks that buffers passed to the GP Internal Core API
866# comply with the rules added as annotations as part of the definition of
867# the API. For example preventing buffers in non-secure shared memory when
868# not allowed.
869CFG_TA_STRICT_ANNOTATION_CHECKS ?= y
870
871# When enabled accepts the DES key sizes excluding parity bits as in
872# the GP Internal API Specification v1.0
873CFG_COMPAT_GP10_DES ?= y
874
875# Defines a limit for many levels TAs may call each others.
876CFG_CORE_MAX_SYSCALL_RECURSION ?= 4
877
878# Pseudo-TA to export hardware RNG output to Normal World
879# RNG characteristics are platform specific
880CFG_HWRNG_PTA ?= n
881ifeq ($(CFG_HWRNG_PTA),y)
882# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited
883CFG_HWRNG_RATE ?= 0
884# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits
885ifeq (,$(CFG_HWRNG_QUALITY))
886$(error CFG_HWRNG_QUALITY not defined)
887endif
888endif
889
890# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate
891# shared memory for each secure thread. When disabled, RPC shared
892# memory is released once the secure thread has completed is execution.
893ifeq ($(CFG_WITH_PAGER),y)
894CFG_PREALLOC_RPC_CACHE ?= n
895endif
896CFG_PREALLOC_RPC_CACHE ?= y
897
898# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core.
899# This clock framework allows to describe clock tree and provides functions to
900# get and configure the clocks.
901# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support
902# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks
903# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level.
904# CFG_DRIVERS_CLK_PRINT_TREE embeds a helper function to print the clock tree
905# state on OP-TEE core console with the info trace level.
906CFG_DRIVERS_CLK ?= n
907CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT)
908CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT)
909CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT)
910CFG_DRIVERS_CLK_PRINT_TREE ?= n
911
912$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT))
913$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT))
914
915# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in
916# OP-TEE core to provide reset controls on subsystems of the devices.
917CFG_DRIVERS_RSTCTRL ?= n
918
919# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in
920# OP-TEE core to provide GPIO support for drivers.
921CFG_DRIVERS_GPIO ?= n
922
923# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support.
924CFG_DRIVERS_I2C ?= n
925
926# When enabled, CFG_DRIVERS_NVMEM provides a framework to register nvmem
927# providers and allow consumer drivers to get NVMEM cells using the Device Tree.
928CFG_DRIVERS_NVMEM ?= n
929
930# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in
931# OP-TEE core to provide drivers a way to apply pin muxing configurations based
932# on device-tree.
933CFG_DRIVERS_PINCTRL ?= n
934
935# When enabled, CFG_DRIVERS_REGULATOR embeds a voltage regulator framework in
936# OP-TEE core to provide drivers a common regulator interface and describe
937# the regulators dependencies using an embedded device tree.
938#
939# When enabled, CFG_REGULATOR_FIXED embeds a voltage regulator driver for
940# DT compatible "regulator-fixed" devices.
941#
942# When enabled, CFG_REGULATOR_GPIO embeds a voltage regulator driver for
943# DT compatible "regulator-gpio" devices.
944#
945# CFG_DRIVERS_REGULATOR_PRINT_TREE embeds a helper function to print the
946# regulator tree state on OP-TEE core console with the info trace level.
947CFG_DRIVERS_REGULATOR ?= n
948CFG_DRIVERS_REGULATOR_PRINT_TREE ?= n
949CFG_REGULATOR_FIXED ?= n
950CFG_REGULATOR_GPIO ?= n
951
952$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_FIXED, \
953	 CFG_DRIVERS_REGULATOR CFG_DT))
954$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_GPIO, \
955	 CFG_DRIVERS_REGULATOR CFG_DT CFG_DRIVERS_GPIO))
956
957# When enabled, CFG_INSECURE permits insecure configuration of OP-TEE core
958# and shows a print (info level) when booting up the device that
959# indicates that the board runs a standard developer configuration.
960#
961# A developer configuration doesn't necessarily have to be secure. The intention
962# is that the one making products based on OP-TEE should override this flag in
963# plat-xxx/conf.mk for the platform they're basing their products on after
964# they've finalized implementing stubbed functionality (see OP-TEE
965# documentation/Porting guidelines) as well as vendor specific security
966# configuration.
967#
968# CFG_WARN_INSECURE served the same purpose as CFG_INSECURE but is deprecated.
969ifneq (undefined,$(flavor CFG_WARN_INSECURE))
970$(info WARNING: CFG_WARN_INSECURE is deprecated, use CFG_INSECURE instead)
971CFG_INSECURE ?= $(CFG_WARN_INSECURE)
972ifneq ($(CFG_INSECURE),$(CFG_WARN_INSECURE))
973$(error Inconsistent CFG_INSECURE=$(CFG_INSECURE) and CFG_WARN_INSECURE=$(CFG_WARN_INSECURE))
974endif
975endif # CFG_WARN_INSECURE defined
976CFG_INSECURE ?= y
977
978ifneq ($(CFG_INSECURE),y)
979ifneq ($(CFG_CORE_ASLR_SEED),)
980$(error CFG_CORE_ASLR_SEED requires CFG_INSECURE=y)
981endif
982endif
983
984# Enables warnings for declarations mixed with statements
985CFG_WARN_DECL_AFTER_STATEMENT ?= y
986
987# Branch Target Identification (part of the ARMv8.5 Extensions) provides a
988# mechanism to limit the set of locations to which computed branch instructions
989# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's
990# that support it, enable this option. A GCC toolchain built with
991# --enable-standard-branch-protection is needed to use this option.
992CFG_CORE_BTI ?= n
993
994$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core))
995
996# To make use of BTI in user space libraries and TA's on CPU's that support it,
997# enable this option.
998CFG_TA_BTI ?= $(CFG_CORE_BTI)
999
1000$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core))
1001
1002ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI))
1003$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible)
1004endif
1005
1006ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI))
1007$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible)
1008endif
1009
1010# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock
1011# and key access to memory. This is a hardware supported alternative to
1012# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0.
1013CFG_MEMTAG ?= n
1014
1015$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core))
1016ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG))
1017$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible)
1018endif
1019ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG))
1020$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible)
1021endif
1022
1023# Privileged Access Never (PAN, part of the ARMv8.1 Extensions) can be
1024# used to restrict accesses to unprivileged memory from privileged mode.
1025# For RISC-V architecture, CSR {m|s}status.SUM bit is used to implement PAN.
1026CFG_PAN ?= n
1027
1028$(eval $(call cfg-depends-one,CFG_PAN,CFG_ARM64_core CFG_RV64_core CFG_RV32_core))
1029
1030ifeq ($(filter y, $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \
1031		  $(CFG_CORE_EL3_SPMC)),y)
1032# FF-A case, handled via the FF-A ABI
1033CFG_CORE_ASYNC_NOTIF ?= y
1034$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,n)
1035else
1036# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support
1037# for sending asynchronous notifications to normal world.
1038# Interrupt ID must be configurged by the platform too. Currently is only
1039# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined.
1040CFG_CORE_ASYNC_NOTIF ?= n
1041$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,$(CFG_CORE_ASYNC_NOTIF))
1042endif
1043
1044# Enable callout service
1045CFG_CALLOUT ?= $(CFG_CORE_ASYNC_NOTIF)
1046
1047# Enable notification based test watchdog
1048CFG_NOTIF_TEST_WD ?= $(call cfg-all-enabled,CFG_ENABLE_EMBEDDED_TESTS \
1049		       CFG_CALLOUT CFG_CORE_ASYNC_NOTIF)
1050$(eval $(call cfg-depends-all,CFG_NOTIF_TEST_WD,CFG_CALLOUT \
1051	 CFG_CORE_ASYNC_NOTIF))
1052
1053$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \
1054	 CFG_WITH_STATS))
1055
1056# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions
1057# for signing and authenticating pointers against secret keys. These can
1058# be used to mitigate ROP (Return oriented programming) attacks. This is
1059# currently done by instructing the compiler to add paciasp/autiasp at the
1060# begging and end of functions to sign and verify ELR.
1061#
1062# The CFG_CORE_PAUTH enables these instructions for the core parts
1063# executing at EL1, with one secret key per thread and one secret key per
1064# physical CPU.
1065#
1066# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When
1067# this option is enabled, TEE core will initialize secret keys per TA.
1068CFG_CORE_PAUTH ?= n
1069CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH)
1070
1071$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core))
1072$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core))
1073
1074ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH))
1075$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible)
1076endif
1077ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH))
1078$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible)
1079endif
1080
1081ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH))
1082$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible)
1083endif
1084
1085ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH))
1086$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible)
1087endif
1088
1089# Enable support for generic watchdog registration
1090# This watchdog will then be usable by non-secure world through SMC calls.
1091CFG_WDT ?= n
1092
1093# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver
1094CFG_WDT_SM_HANDLER ?= n
1095
1096$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT))
1097
1098# When CFG_WDT_SM_HANDLER=y, SMC function ID 0x82003D06 default implements
1099# arm-smc-wdt service. Platform can also override this ID with a platform
1100# specific SMC function ID to access arm-smc-wdt service thanks to
1101# optional config switch CFG_WDT_SM_HANDLER_ID.
1102CFG_WDT_SM_HANDLER_ID ?= 0x82003D06
1103
1104# Allow using the udelay/mdelay function for platforms without ARM generic timer
1105# extension. When set to 'n', the plat_get_freq() function must be defined by
1106# the platform code
1107CFG_CORE_HAS_GENERIC_TIMER ?= y
1108
1109# Enable RTC API
1110CFG_DRIVERS_RTC ?= n
1111
1112# Enable PTA for RTC access from non-secure world
1113CFG_RTC_PTA ?= n
1114
1115# Enable the FF-A SPMC tests in xtests
1116CFG_SPMC_TESTS ?= n
1117
1118# Allocate the translation tables needed to map the S-EL0 application
1119# loaded
1120CFG_CORE_PREALLOC_EL0_TBLS ?= n
1121ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER))
1122$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS")
1123endif
1124
1125# CFG_PGT_CACHE_ENTRIES defines the number of entries on the memory
1126# mapping page table cache used for Trusted Application mapping.
1127# CFG_PGT_CACHE_ENTRIES is ignored when CFG_CORE_PREALLOC_EL0_TBLS
1128# is enabled.
1129#
1130# A proper value for CFG_PGT_CACHE_ENTRIES depends on many factors:
1131# CFG_WITH_LPAE, CFG_TA_ASLR, size of TAs, size of memrefs passed
1132# to TA, CFG_ULIBS_SHARED and possibly others. The default value
1133# is based on the number of threads as an indicator on how large
1134# the system might be.
1135ifeq ($(CFG_NUM_THREADS),1)
1136CFG_PGT_CACHE_ENTRIES ?= 4
1137endif
1138ifeq ($(CFG_NUM_THREADS),2)
1139ifneq ($(CFG_WITH_LPAE),y)
1140CFG_PGT_CACHE_ENTRIES ?= 8
1141endif
1142endif
1143CFG_PGT_CACHE_ENTRIES ?= ($(CFG_NUM_THREADS) * 2)
1144
1145# User TA runtime context dump.
1146# When this option is enabled, OP-TEE provides a debug method for
1147# developer to dump user TA's runtime context, including TA's heap stats.
1148# Developer can open a stats PTA session and then invoke command
1149# STATS_CMD_TA_STATS to get the context of loaded TAs.
1150CFG_TA_STATS ?= n
1151
1152# Enables best effort mitigations against fault injected when the hardware
1153# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h
1154CFG_FAULT_MITIGATION ?= y
1155
1156# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note
1157# that this doesn't affect libutee itself, it's only the TAs compiled with
1158# this set that are affected. Each out-of-tree must set this if to enable
1159# compatibility with version v1.1 as the value of this variable is not
1160# preserved in the TA dev-kit.
1161CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n
1162
1163# Change supported HMAC key size range, from 64 to 1024.
1164# This is needed to pass AOSP Keymaster VTS tests:
1165#   Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp
1166#   Module: VtsHalKeymasterV3_0TargetTest
1167#   Testcases: - PerInstance/SigningOperationsTest#
1168#              - PerInstance/NewKeyGenerationTest#
1169#              - PerInstance/ImportKeyTest#
1170#              - PerInstance/EncryptionOperationsTest#
1171#              - PerInstance/AttestationTest#
1172# Note that this violates GP requirements of HMAC size range.
1173CFG_HMAC_64_1024_RANGE ?= n
1174
1175# CFG_RSA_PUB_EXPONENT_3, when enabled, allows RSA public exponents in the
1176# range 3 <= e < 2^256. This is needed to pass AOSP KeyMint VTS tests:
1177#    Link to tests: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp
1178#    Module: VtsAidlKeyMintTargetTest
1179#    Testcases: - PerInstance/EncryptionOperationsTest.RsaNoPaddingSuccess
1180# When CFG_RSA_PUB_EXPONENT_3 is disabled, RSA public exponents must conform
1181# to NIST SP800-56B recommendation and be in the range 65537 <= e < 2^256.
1182CFG_RSA_PUB_EXPONENT_3 ?= n
1183
1184# Enable a hardware pbkdf2 function
1185# By default use standard pbkdf2 implementation
1186CFG_CRYPTO_HW_PBKDF2 ?= n
1187$(eval $(call cfg-depends-all,CFG_CRYPTO_HW_PBKDF2,CFG_CRYPTO_PBKDF2))
1188
1189# CFG_HALT_CORES_ON_PANIC, when enabled, makes any call to panic() halt the
1190# other cores. The feature currently relies on GIC device to trap the other
1191# cores using an SGI interrupt specified by CFG_HALT_CORES_ON_PANIC_SGI.
1192CFG_HALT_CORES_ON_PANIC ?= n
1193CFG_HALT_CORES_ON_PANIC_SGI ?= 15
1194$(eval $(call cfg-depends-all,CFG_HALT_CORES_ON_PANIC,CFG_GIC))
1195
1196# Enable automatic discovery of maximal PA supported by the hardware and
1197# use that. Provides easier configuration of virtual platforms where the
1198# maximal PA can vary.
1199CFG_AUTO_MAX_PA_BITS ?= n
1200
1201# CFG_DRIVERS_REMOTEPROC, when enabled, embeds support for remote processor
1202# management including generic DT bindings for the configuration.
1203CFG_DRIVERS_REMOTEPROC ?= n
1204
1205# CFG_REMOTEPROC_PTA, when enabled, embeds remote processor management PTA
1206# service.
1207CFG_REMOTEPROC_PTA ?= n
1208
1209# When enabled, CFG_WIDEVINE_HUK uses the widevine HUK provided by secure
1210# DTB as OP-TEE HUK.
1211CFG_WIDEVINE_HUK ?= n
1212$(eval $(call cfg-depends-all,CFG_WIDEVINE_HUK,CFG_DT))
1213
1214# When enabled, CFG_WIDEVINE_PTA embeds a PTA that exposes the keys under
1215# DT node "/options/op-tee/widevine" to some specific TAs.
1216CFG_WIDEVINE_PTA ?= n
1217$(eval $(call cfg-depends-all,CFG_WIDEVINE_PTA,CFG_DT CFG_WIDEVINE_HUK))
1218
1219# When enabled, CFG_VERAISON_ATTESTATION_PTA embeds remote attestation PTA
1220# service. Note: This is an experimental feature and should be used
1221# with caution in production environments.
1222CFG_VERAISON_ATTESTATION_PTA ?= n
1223ifeq ($(CFG_VERAISON_ATTESTATION_PTA),y)
1224$(call force,CFG_QCBOR,y)
1225endif
1226
1227# When enabled, CFG_VERAISON_ATTESTATION_PTA_TEST_KEY embeds a test key.
1228# Note: CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled for
1229# CFG_VERAISON_ATTESTATION_PTA to work.
1230CFG_VERAISON_ATTESTATION_PTA_TEST_KEY ?= y
1231ifneq ($(CFG_VERAISON_ATTESTATION_PTA_TEST_KEY),y)
1232$(error "CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled")
1233endif
1234
1235# CFG_SEMIHOSTING_CONSOLE, when enabled, embeds a semihosting console driver.
1236# When CFG_SEMIHOSTING_CONSOLE_FILE=NULL, OP-TEE console reads/writes
1237# trace messages from/to the debug terminal of the semihosting host computer.
1238# When CFG_SEMIHOSTING_CONSOLE_FILE="{your_log_file}", OP-TEE console
1239# outputs trace messages to that file. Output to "optee.log" by default.
1240CFG_SEMIHOSTING_CONSOLE ?= n
1241ifeq ($(CFG_SEMIHOSTING_CONSOLE),y)
1242$(call force,CFG_SEMIHOSTING,y)
1243endif
1244CFG_SEMIHOSTING_CONSOLE_FILE ?= "optee.log"
1245ifeq ($(CFG_SEMIHOSTING_CONSOLE_FILE),)
1246$(error CFG_SEMIHOSTING_CONSOLE_FILE cannot be empty)
1247endif
1248
1249# Semihosting is a debugging mechanism that enables code running on an embedded
1250# system (also called the target) to communicate with and use the I/O of the
1251# host computer.
1252CFG_SEMIHOSTING ?= n
1253
1254# CFG_FFA_CONSOLE, when enabled, embeds a FFA console driver. OP-TEE console
1255# writes trace messages via FFA interface to the SPM (Secure Partition Manager)
1256# like hafnium.
1257CFG_FFA_CONSOLE ?= n
1258
1259# CFG_CORE_UNSAFE_MODEXP, when enabled, makes modular exponentiation on TEE
1260# core use 'unsafe' algorithm having better performance. To resist against
1261# timing attacks, 'safe' one is designed to take constant-time that is
1262# generally much slower.
1263CFG_CORE_UNSAFE_MODEXP ?= n
1264
1265# CFG_TA_MBEDTLS_UNSAFE_MODEXP, similar to CFG_CORE_UNSAFE_MODEXP,
1266# when enabled, makes MBedTLS library for TAs use 'unsafe' modular
1267# exponentiation algorithm.
1268CFG_TA_MBEDTLS_UNSAFE_MODEXP ?= n
1269
1270# CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL, when enabled, initializes
1271# thread_core_local[current_core_pos] before calling C code.
1272ifeq ($(ARCH),arm)
1273$(call force,CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL,y)
1274else
1275CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL ?= n
1276endif
1277
1278# CFG_DYN_CONFIG, when enabled, use dynamic memory allocation for translation
1279# tables. Not supported with pager.
1280ifeq ($(CFG_WITH_PAGER),y)
1281$(call force,CFG_DYN_CONFIG,n,conflicts with CFG_WITH_PAGER)
1282else
1283CFG_DYN_CONFIG ?= y
1284endif
1285
1286# CFG_EXTERNAL_ABORT_PLAT_HANDLER is used to implement platform-specific
1287# handling of external abort implementing the plat_external_abort_handler()
1288# function.
1289CFG_EXTERNAL_ABORT_PLAT_HANDLER ?= n
1290
1291# CFG_TA_LIBGCC, when enabled, links user mode TAs with libgcc. Linking
1292# TAs with libgcc is deprecated, but keep this flag while sorting out the
1293# out remaining issues with supporting C++.
1294CFG_TA_LIBGCC ?= y
1295