| e13d1040 | 03-Apr-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: use SMCCC_ARCH_WORKAROUND_1
Use SMCCC_ARCH_WORKAROUND_1 to implement CVE-2017-5715 in AArch64. Previous workarounds for CVE-2017-5715 haven't been fully effective.
Fixes CVE-2017-5715
core: arm64: use SMCCC_ARCH_WORKAROUND_1
Use SMCCC_ARCH_WORKAROUND_1 to implement CVE-2017-5715 in AArch64. Previous workarounds for CVE-2017-5715 haven't been fully effective.
Fixes CVE-2017-5715 Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 657d02f2 | 03-Apr-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: provide special rw kernel page at EL0
Provide a special kernel read/write mapped page while in EL0 if compiled with CFG_CORE_UNMAP_CORE_AT_EL0 and CFG_CORE_WORKAROUND_SPECTRE_BP_SEC. Th
core: arm64: provide special rw kernel page at EL0
Provide a special kernel read/write mapped page while in EL0 if compiled with CFG_CORE_UNMAP_CORE_AT_EL0 and CFG_CORE_WORKAROUND_SPECTRE_BP_SEC. This page will later be used as a temporary replacement of thread_core_local. thread_core_local is not completely replaced, the new memory is only used for temporary storage of registers via the stack pointer.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cd69dc9e | 03-Apr-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: add thread_smc()
Adds thread_smc() for simple SMC calls to dispatcher in EL3
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@l
core: arm: add thread_smc()
Adds thread_smc() for simple SMC calls to dispatcher in EL3
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3d2ffcf3 | 03-Apr-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add smccc.h
Adds <smccc.h> introducing new features in SMC calling convention v1.1
See also Link: https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigat
core: add smccc.h
Adds <smccc.h> introducing new features in SMC calling convention v1.1
See also Link: https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 03288f92 | 12-Apr-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
ltc: mpa: fix potential memory leak in exptmod()
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Oliver Chiang <oliver.chiang@mstarsemi.com> Acked-by: Jens Wiklander <jens
ltc: mpa: fix potential memory leak in exptmod()
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Oliver Chiang <oliver.chiang@mstarsemi.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 09e7c6bf | 11-Apr-2018 |
Edison Ai <edison.ai@arm.com> |
core/arch/arm/pta/sdp_pta.c: Fix compile error
There will be a "format" compile error when using gcc 6.2.1. It is not allowed to change type from "struct" to "void *" in gcc 6.2.1.
Signed-off-by: E
core/arch/arm/pta/sdp_pta.c: Fix compile error
There will be a "format" compile error when using gcc 6.2.1. It is not allowed to change type from "struct" to "void *" in gcc 6.2.1.
Signed-off-by: Edison Ai <edison.ai@arm.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e39aae81 | 10-Apr-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: crypto: arm32: add counter increment in ce_aes_ctr_encrypt()
Commit 628a9a10ca36 ("ltc: ctr: improve performance") reveals a bug in the Aarch32 accelerated crypto code (AES CTR mode), which ca
core: crypto: arm32: add counter increment in ce_aes_ctr_encrypt()
Commit 628a9a10ca36 ("ltc: ctr: improve performance") reveals a bug in the Aarch32 accelerated crypto code (AES CTR mode), which causes xtest 9159 to fail with some invalid buffer content: encrypting 96 bytes of data in one pass does not yield the same result than encrypting 3 * 32 bytes. The problem is fixed by adding a missing counter increment in ce_aes_ctr_encrypt().
Fixes: 9ff4f2ccc026 ("arm32: AES using ARMv8-A cryptographic extensions") Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960) Acked-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 35964dc9 | 05-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: minor cleanup related to pseudo TAs
tee_kta_trace.h is unused and useless. Reword "static TA" into "pseudo TA" in comments.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Revie
core: minor cleanup related to pseudo TAs
tee_kta_trace.h is unused and useless. Reword "static TA" into "pseudo TA" in comments.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 387b0ee3 | 05-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: deprecate TA property flags EXEC_DDR and USER_MODE
TA property flags TA_FLAG_EXEC_DDR and TA_FLAG_USER_MODE were not really useful in the OP-TEE and now they are meaningless.
Define the mask
core: deprecate TA property flags EXEC_DDR and USER_MODE
TA property flags TA_FLAG_EXEC_DDR and TA_FLAG_USER_MODE were not really useful in the OP-TEE and now they are meaningless.
Define the mask of flags a TA may pretend to and assert loaded TAs do not expect flags set outside of the defined supported bit flags.
Fix gmon.h against duplicate round macros.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 027f0506 | 05-Apr-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: deprecate TA_FLAG_USER_MODE
Differentiate user TA and pseudo TA contexts based on the TA operation structure registered in the TA context and specific to each.
Change gprof pTA to test uTA at
core: deprecate TA_FLAG_USER_MODE
Differentiate user TA and pseudo TA contexts based on the TA operation structure registered in the TA context and specific to each.
Change gprof pTA to test uTA attribute when targeting uTA client instead of testing !pTA attribute.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| d84eb122 | 22-Feb-2018 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
plat-ls: Add support for fetching SSK from armv8 platform flavour.
- PLATFORM = ls-ls1046ardb, ls-ls1043ardb, ls-ls1012ardb
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Sumit
plat-ls: Add support for fetching SSK from armv8 platform flavour.
- PLATFORM = ls-ls1046ardb, ls-ls1043ardb, ls-ls1012ardb
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> [jf: s/?=y/?= y/] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| bdc919a5 | 22-Mar-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: crypto: enable 4096-bit RSA keys
RSA key size can be allowed to be as large as CFG_CORE_BIGNUM_MAX_BITS (4096 by default).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Review
core: crypto: enable 4096-bit RSA keys
RSA key size can be allowed to be as large as CFG_CORE_BIGNUM_MAX_BITS (4096 by default).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 409d2ff0 | 26-Mar-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: crypto: ltc: introduce CFG_CORE_BIGNUM_MAX_BITS
Make the size of big numbers in the TEE core configurable. The default (4096 bits) may be reduced if such a large key size is not needed, to sav
core: crypto: ltc: introduce CFG_CORE_BIGNUM_MAX_BITS
Make the size of big numbers in the TEE core configurable. The default (4096 bits) may be reduced if such a large key size is not needed, to save core memory.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fd0bc1ed | 23-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove vm_info_get_user_range()
Removes the now unused function vm_info_get_user_range().
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260/pager/GP) Reviewed-by: Etienne Carri
core: remove vm_info_get_user_range()
Removes the now unused function vm_info_get_user_range().
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260/pager/GP) Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3d470862 | 22-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: document struct user_ta_ctx
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> |
| fbeabf25 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: support map update to active context
Adds support in vm_map() to update an active context. vm_set_prot() is also updated, but still requires a call to tee_mmu_set_ctx() for the changes to
core: mm: support map update to active context
Adds support in vm_map() to update an active context. vm_set_prot() is also updated, but still requires a call to tee_mmu_set_ctx() for the changes to be effective.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 32e63b4b | 22-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: tee_mmu.c: add internal umap_remove_region()
Adds an internal helper function umap_remove_region() to remove and free a region from a struct vm_info.
Reviewed-by: Etienne Carriere <etienne.ca
core: tee_mmu.c: add internal umap_remove_region()
Adds an internal helper function umap_remove_region() to remove and free a region from a struct vm_info.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 112d6833 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove tee_mmu_map_init()
Removes tee_mmu_map_init() and adds the map_kinit() call to vm_info_init().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <j
core: remove tee_mmu_map_init()
Removes tee_mmu_map_init() and adds the map_kinit() call to vm_info_init().
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e1b6205b | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: load_elf(): use vm_set_prot()
Rewrite load_elf() to use vm_set_prot() to finalize the TA mapping instead of remapping the TA again.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
core: load_elf(): use vm_set_prot()
Rewrite load_elf() to use vm_set_prot() to finalize the TA mapping instead of remapping the TA again.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 49e68601 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add vm_set_prot()
Adds vm_set_prot() to update the protection bits of an already registered region.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <
core: add vm_set_prot()
Adds vm_set_prot() to update the protection bits of an already registered region.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 211417d3 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: more flexible ta mapping
Replaces the current fixed array of TA map entries where some indexes have a special meaning. The new structures and functions dealing with this has a vm_ prefix inste
core: more flexible ta mapping
Replaces the current fixed array of TA map entries where some indexes have a special meaning. The new structures and functions dealing with this has a vm_ prefix instead of the old tee_mmu_ prefix.
struct tee_ta_region is replaced by struct vm_region, which is now stored in a linked list using the new TEE_MATTR-bits to identify special regions.
struct tee_mmu_info is replaced by vm_info, which now keeps the head of the linked list of regions.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a8d84b58 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add new TEE_MATTR defines
Adds TEE_MATTR_EPHEMERAL to tag TA mappings which are only used during a single call (open session or invoke parameters).
Adds TEE_MATTR_PERMANENT to tag TA mappings
core: add new TEE_MATTR defines
Adds TEE_MATTR_EPHEMERAL to tag TA mappings which are only used during a single call (open session or invoke parameters).
Adds TEE_MATTR_PERMANENT to tag TA mappings that must not be removed (kernel mappings while in user mode).
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 261109aa | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: tee_mmu_types.h: define TEE_MATTR_* with BIT
Uses the BIT() macro to define the TEE_MATTR_* macros.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <
core: tee_mmu_types.h: define TEE_MATTR_* with BIT
Uses the BIT() macro to define the TEE_MATTR_* macros.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 45d5cec0 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mobj_seccpy_shm: remove unused pgdir_offset
Removes assignment of the otherwise unused pgdir_offset field in struct mobj_seccpy_shm and the field itself.
Reviewed-by: Etienne Carriere <etienn
core: mobj_seccpy_shm: remove unused pgdir_offset
Removes assignment of the otherwise unused pgdir_offset field in struct mobj_seccpy_shm and the field itself.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 69129ee9 | 09-Mar-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: tee_mmu_add_rwmem(): remove pgdir_offset
Removes the pgdir_offset parameter from the tee_mmu_add_rwmem(). The function is only called from one place and then with pgdir_offset as -1.
Reviewed
core: tee_mmu_add_rwmem(): remove pgdir_offset
Removes the pgdir_offset parameter from the tee_mmu_add_rwmem(). The function is only called from one place and then with pgdir_offset as -1.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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