1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Linaro Limited 4 * Copyright (c) 2014, STMicroelectronics International N.V. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <platform_config.h> 31 32 #include <arm.h> 33 #include <assert.h> 34 #include <keep.h> 35 #include <kernel/asan.h> 36 #include <kernel/misc.h> 37 #include <kernel/msg_param.h> 38 #include <kernel/panic.h> 39 #include <kernel/spinlock.h> 40 #include <kernel/tee_ta_manager.h> 41 #include <kernel/thread_defs.h> 42 #include <kernel/thread.h> 43 #include <mm/core_memprot.h> 44 #include <mm/mobj.h> 45 #include <mm/tee_mm.h> 46 #include <mm/tee_mmu.h> 47 #include <mm/tee_pager.h> 48 #include <optee_msg.h> 49 #include <sm/optee_smc.h> 50 #include <sm/sm.h> 51 #include <tee/tee_cryp_utl.h> 52 #include <tee/tee_fs_rpc.h> 53 #include <trace.h> 54 #include <util.h> 55 56 #include "thread_private.h" 57 58 #ifdef CFG_WITH_ARM_TRUSTED_FW 59 #define STACK_TMP_OFFS 0 60 #else 61 #define STACK_TMP_OFFS SM_STACK_TMP_RESERVE_SIZE 62 #endif 63 64 65 #ifdef ARM32 66 #ifdef CFG_CORE_SANITIZE_KADDRESS 67 #define STACK_TMP_SIZE (3072 + STACK_TMP_OFFS) 68 #else 69 #define STACK_TMP_SIZE (1536 + STACK_TMP_OFFS) 70 #endif 71 #define STACK_THREAD_SIZE 8192 72 73 #ifdef CFG_CORE_SANITIZE_KADDRESS 74 #define STACK_ABT_SIZE 3072 75 #else 76 #define STACK_ABT_SIZE 2048 77 #endif 78 79 #endif /*ARM32*/ 80 81 #ifdef ARM64 82 #define STACK_TMP_SIZE (2048 + STACK_TMP_OFFS) 83 #define STACK_THREAD_SIZE 8192 84 85 #if TRACE_LEVEL > 0 86 #define STACK_ABT_SIZE 3072 87 #else 88 #define STACK_ABT_SIZE 1024 89 #endif 90 #endif /*ARM64*/ 91 92 struct thread_ctx threads[CFG_NUM_THREADS]; 93 94 struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 95 96 #ifdef CFG_WITH_STACK_CANARIES 97 #ifdef ARM32 98 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 99 #endif 100 #ifdef ARM64 101 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 102 #endif 103 #define START_CANARY_VALUE 0xdededede 104 #define END_CANARY_VALUE 0xabababab 105 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 106 #define GET_END_CANARY(name, stack_num) \ 107 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 108 #else 109 #define STACK_CANARY_SIZE 0 110 #endif 111 112 #define DECLARE_STACK(name, num_stacks, stack_size, linkage) \ 113 linkage uint32_t name[num_stacks] \ 114 [ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 115 sizeof(uint32_t)] \ 116 __attribute__((section(".nozi_stack"), \ 117 aligned(STACK_ALIGNMENT))) 118 119 #define STACK_SIZE(stack) (sizeof(stack) - STACK_CANARY_SIZE / 2) 120 121 #define GET_STACK(stack) \ 122 ((vaddr_t)(stack) + STACK_SIZE(stack)) 123 124 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE, static); 125 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE, static); 126 #ifndef CFG_WITH_PAGER 127 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE, static); 128 #endif 129 130 const void *stack_tmp_export = (uint8_t *)stack_tmp + sizeof(stack_tmp[0]) - 131 (STACK_TMP_OFFS + STACK_CANARY_SIZE / 2); 132 const uint32_t stack_tmp_stride = sizeof(stack_tmp[0]); 133 134 /* 135 * These stack setup info are required by secondary boot cores before they 136 * each locally enable the pager (the mmu). Hence kept in pager sections. 137 */ 138 KEEP_PAGER(stack_tmp_export); 139 KEEP_PAGER(stack_tmp_stride); 140 141 thread_smc_handler_t thread_std_smc_handler_ptr; 142 static thread_smc_handler_t thread_fast_smc_handler_ptr; 143 thread_nintr_handler_t thread_nintr_handler_ptr; 144 thread_pm_handler_t thread_cpu_on_handler_ptr; 145 thread_pm_handler_t thread_cpu_off_handler_ptr; 146 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 147 thread_pm_handler_t thread_cpu_resume_handler_ptr; 148 thread_pm_handler_t thread_system_off_handler_ptr; 149 thread_pm_handler_t thread_system_reset_handler_ptr; 150 151 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 152 static vaddr_t thread_user_kcode_va; 153 long thread_user_kcode_offset; 154 static size_t thread_user_kcode_size; 155 #endif 156 157 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 158 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 159 long thread_user_kdata_sp_offset; 160 static uint8_t thread_user_kdata_page[ 161 ROUNDUP(sizeof(thread_core_local), SMALL_PAGE_SIZE)] 162 __aligned(SMALL_PAGE_SIZE) __section(".nozi.kdata_page"); 163 #endif 164 165 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 166 static bool thread_prealloc_rpc_cache; 167 168 static void init_canaries(void) 169 { 170 #ifdef CFG_WITH_STACK_CANARIES 171 size_t n; 172 #define INIT_CANARY(name) \ 173 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 174 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 175 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 176 \ 177 *start_canary = START_CANARY_VALUE; \ 178 *end_canary = END_CANARY_VALUE; \ 179 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 180 #name, n, (void *)(end_canary - 1)); \ 181 DMSG("watch *%p\n", (void *)end_canary); \ 182 } 183 184 INIT_CANARY(stack_tmp); 185 INIT_CANARY(stack_abt); 186 #ifndef CFG_WITH_PAGER 187 INIT_CANARY(stack_thread); 188 #endif 189 #endif/*CFG_WITH_STACK_CANARIES*/ 190 } 191 192 #define CANARY_DIED(stack, loc, n) \ 193 do { \ 194 EMSG_RAW("Dead canary at %s of '%s[%zu]'", #loc, #stack, n); \ 195 panic(); \ 196 } while (0) 197 198 void thread_check_canaries(void) 199 { 200 #ifdef CFG_WITH_STACK_CANARIES 201 size_t n; 202 203 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 204 if (GET_START_CANARY(stack_tmp, n) != START_CANARY_VALUE) 205 CANARY_DIED(stack_tmp, start, n); 206 if (GET_END_CANARY(stack_tmp, n) != END_CANARY_VALUE) 207 CANARY_DIED(stack_tmp, end, n); 208 } 209 210 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 211 if (GET_START_CANARY(stack_abt, n) != START_CANARY_VALUE) 212 CANARY_DIED(stack_abt, start, n); 213 if (GET_END_CANARY(stack_abt, n) != END_CANARY_VALUE) 214 CANARY_DIED(stack_abt, end, n); 215 216 } 217 #ifndef CFG_WITH_PAGER 218 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 219 if (GET_START_CANARY(stack_thread, n) != START_CANARY_VALUE) 220 CANARY_DIED(stack_thread, start, n); 221 if (GET_END_CANARY(stack_thread, n) != END_CANARY_VALUE) 222 CANARY_DIED(stack_thread, end, n); 223 } 224 #endif 225 #endif/*CFG_WITH_STACK_CANARIES*/ 226 } 227 228 static void lock_global(void) 229 { 230 cpu_spin_lock(&thread_global_lock); 231 } 232 233 static void unlock_global(void) 234 { 235 cpu_spin_unlock(&thread_global_lock); 236 } 237 238 #ifdef ARM32 239 uint32_t thread_get_exceptions(void) 240 { 241 uint32_t cpsr = read_cpsr(); 242 243 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 244 } 245 246 void thread_set_exceptions(uint32_t exceptions) 247 { 248 uint32_t cpsr = read_cpsr(); 249 250 /* Foreign interrupts must not be unmasked while holding a spinlock */ 251 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 252 assert_have_no_spinlock(); 253 254 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 255 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 256 write_cpsr(cpsr); 257 } 258 #endif /*ARM32*/ 259 260 #ifdef ARM64 261 uint32_t thread_get_exceptions(void) 262 { 263 uint32_t daif = read_daif(); 264 265 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 266 } 267 268 void thread_set_exceptions(uint32_t exceptions) 269 { 270 uint32_t daif = read_daif(); 271 272 /* Foreign interrupts must not be unmasked while holding a spinlock */ 273 if (!(exceptions & THREAD_EXCP_FOREIGN_INTR)) 274 assert_have_no_spinlock(); 275 276 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 277 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 278 write_daif(daif); 279 } 280 #endif /*ARM64*/ 281 282 uint32_t thread_mask_exceptions(uint32_t exceptions) 283 { 284 uint32_t state = thread_get_exceptions(); 285 286 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 287 return state; 288 } 289 290 void thread_unmask_exceptions(uint32_t state) 291 { 292 thread_set_exceptions(state & THREAD_EXCP_ALL); 293 } 294 295 296 struct thread_core_local *thread_get_core_local(void) 297 { 298 uint32_t cpu_id = get_core_pos(); 299 300 /* 301 * Foreign interrupts must be disabled before playing with core_local 302 * since we otherwise may be rescheduled to a different core in the 303 * middle of this function. 304 */ 305 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 306 307 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 308 return &thread_core_local[cpu_id]; 309 } 310 311 static void thread_lazy_save_ns_vfp(void) 312 { 313 #ifdef CFG_WITH_VFP 314 struct thread_ctx *thr = threads + thread_get_id(); 315 316 thr->vfp_state.ns_saved = false; 317 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 318 /* 319 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 320 * uses VFP and always preserve the register file when secure world 321 * is about to use it 322 */ 323 thr->vfp_state.ns.force_save = true; 324 #endif 325 vfp_lazy_save_state_init(&thr->vfp_state.ns); 326 #endif /*CFG_WITH_VFP*/ 327 } 328 329 static void thread_lazy_restore_ns_vfp(void) 330 { 331 #ifdef CFG_WITH_VFP 332 struct thread_ctx *thr = threads + thread_get_id(); 333 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 334 335 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 336 337 if (tuv && tuv->lazy_saved && !tuv->saved) { 338 vfp_lazy_save_state_final(&tuv->vfp); 339 tuv->saved = true; 340 } 341 342 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 343 thr->vfp_state.ns_saved = false; 344 #endif /*CFG_WITH_VFP*/ 345 } 346 347 #ifdef ARM32 348 static void init_regs(struct thread_ctx *thread, 349 struct thread_smc_args *args) 350 { 351 thread->regs.pc = (uint32_t)thread_std_smc_entry; 352 353 /* 354 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 355 * Asynchronous abort and unmasked native interrupts. 356 */ 357 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 358 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_A | 359 (THREAD_EXCP_FOREIGN_INTR << ARM32_CPSR_F_SHIFT); 360 /* Enable thumb mode if it's a thumb instruction */ 361 if (thread->regs.pc & 1) 362 thread->regs.cpsr |= CPSR_T; 363 /* Reinitialize stack pointer */ 364 thread->regs.svc_sp = thread->stack_va_end; 365 366 /* 367 * Copy arguments into context. This will make the 368 * arguments appear in r0-r7 when thread is started. 369 */ 370 thread->regs.r0 = args->a0; 371 thread->regs.r1 = args->a1; 372 thread->regs.r2 = args->a2; 373 thread->regs.r3 = args->a3; 374 thread->regs.r4 = args->a4; 375 thread->regs.r5 = args->a5; 376 thread->regs.r6 = args->a6; 377 thread->regs.r7 = args->a7; 378 } 379 #endif /*ARM32*/ 380 381 #ifdef ARM64 382 static void init_regs(struct thread_ctx *thread, 383 struct thread_smc_args *args) 384 { 385 thread->regs.pc = (uint64_t)thread_std_smc_entry; 386 387 /* 388 * Stdcalls starts in SVC mode with masked foreign interrupts, masked 389 * Asynchronous abort and unmasked native interrupts. 390 */ 391 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 392 THREAD_EXCP_FOREIGN_INTR | DAIFBIT_ABT); 393 /* Reinitialize stack pointer */ 394 thread->regs.sp = thread->stack_va_end; 395 396 /* 397 * Copy arguments into context. This will make the 398 * arguments appear in x0-x7 when thread is started. 399 */ 400 thread->regs.x[0] = args->a0; 401 thread->regs.x[1] = args->a1; 402 thread->regs.x[2] = args->a2; 403 thread->regs.x[3] = args->a3; 404 thread->regs.x[4] = args->a4; 405 thread->regs.x[5] = args->a5; 406 thread->regs.x[6] = args->a6; 407 thread->regs.x[7] = args->a7; 408 409 /* Set up frame pointer as per the Aarch64 AAPCS */ 410 thread->regs.x[29] = 0; 411 } 412 #endif /*ARM64*/ 413 414 void thread_init_boot_thread(void) 415 { 416 struct thread_core_local *l = thread_get_core_local(); 417 size_t n; 418 419 for (n = 0; n < CFG_NUM_THREADS; n++) { 420 TAILQ_INIT(&threads[n].mutexes); 421 TAILQ_INIT(&threads[n].tsd.sess_stack); 422 SLIST_INIT(&threads[n].tsd.pgt_cache); 423 } 424 425 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 426 thread_core_local[n].curr_thread = -1; 427 428 l->curr_thread = 0; 429 threads[0].state = THREAD_STATE_ACTIVE; 430 } 431 432 void thread_clr_boot_thread(void) 433 { 434 struct thread_core_local *l = thread_get_core_local(); 435 436 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 437 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 438 assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes)); 439 threads[l->curr_thread].state = THREAD_STATE_FREE; 440 l->curr_thread = -1; 441 } 442 443 static void thread_alloc_and_run(struct thread_smc_args *args) 444 { 445 size_t n; 446 struct thread_core_local *l = thread_get_core_local(); 447 bool found_thread = false; 448 449 assert(l->curr_thread == -1); 450 451 lock_global(); 452 453 for (n = 0; n < CFG_NUM_THREADS; n++) { 454 if (threads[n].state == THREAD_STATE_FREE) { 455 threads[n].state = THREAD_STATE_ACTIVE; 456 found_thread = true; 457 break; 458 } 459 } 460 461 unlock_global(); 462 463 if (!found_thread) { 464 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 465 return; 466 } 467 468 l->curr_thread = n; 469 470 threads[n].flags = 0; 471 init_regs(threads + n, args); 472 473 /* Save Hypervisor Client ID */ 474 threads[n].hyp_clnt_id = args->a7; 475 476 thread_lazy_save_ns_vfp(); 477 thread_resume(&threads[n].regs); 478 } 479 480 #ifdef ARM32 481 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 482 struct thread_smc_args *args) 483 { 484 /* 485 * Update returned values from RPC, values will appear in 486 * r0-r3 when thread is resumed. 487 */ 488 regs->r0 = args->a0; 489 regs->r1 = args->a1; 490 regs->r2 = args->a2; 491 regs->r3 = args->a3; 492 regs->r4 = args->a4; 493 regs->r5 = args->a5; 494 } 495 #endif /*ARM32*/ 496 497 #ifdef ARM64 498 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 499 struct thread_smc_args *args) 500 { 501 /* 502 * Update returned values from RPC, values will appear in 503 * x0-x3 when thread is resumed. 504 */ 505 regs->x[0] = args->a0; 506 regs->x[1] = args->a1; 507 regs->x[2] = args->a2; 508 regs->x[3] = args->a3; 509 regs->x[4] = args->a4; 510 regs->x[5] = args->a5; 511 } 512 #endif /*ARM64*/ 513 514 #ifdef ARM32 515 static bool is_from_user(uint32_t cpsr) 516 { 517 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 518 } 519 #endif 520 521 #ifdef ARM64 522 static bool is_from_user(uint32_t cpsr) 523 { 524 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 525 return true; 526 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 527 SPSR_64_MODE_EL0) 528 return true; 529 return false; 530 } 531 #endif 532 533 static bool is_user_mode(struct thread_ctx_regs *regs) 534 { 535 return is_from_user((uint32_t)regs->cpsr); 536 } 537 538 static void thread_resume_from_rpc(struct thread_smc_args *args) 539 { 540 size_t n = args->a3; /* thread id */ 541 struct thread_core_local *l = thread_get_core_local(); 542 uint32_t rv = 0; 543 544 assert(l->curr_thread == -1); 545 546 lock_global(); 547 548 if (n < CFG_NUM_THREADS && 549 threads[n].state == THREAD_STATE_SUSPENDED && 550 args->a7 == threads[n].hyp_clnt_id) 551 threads[n].state = THREAD_STATE_ACTIVE; 552 else 553 rv = OPTEE_SMC_RETURN_ERESUME; 554 555 unlock_global(); 556 557 if (rv) { 558 args->a0 = rv; 559 return; 560 } 561 562 l->curr_thread = n; 563 564 if (is_user_mode(&threads[n].regs)) 565 tee_ta_update_session_utime_resume(); 566 567 if (threads[n].have_user_map) 568 core_mmu_set_user_map(&threads[n].user_map); 569 570 /* 571 * Return from RPC to request service of a foreign interrupt must not 572 * get parameters from non-secure world. 573 */ 574 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 575 copy_a0_to_a5(&threads[n].regs, args); 576 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 577 } 578 579 thread_lazy_save_ns_vfp(); 580 thread_resume(&threads[n].regs); 581 } 582 583 void thread_handle_fast_smc(struct thread_smc_args *args) 584 { 585 thread_check_canaries(); 586 thread_fast_smc_handler_ptr(args); 587 /* Fast handlers must not unmask any exceptions */ 588 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 589 } 590 591 void thread_handle_std_smc(struct thread_smc_args *args) 592 { 593 thread_check_canaries(); 594 595 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 596 thread_resume_from_rpc(args); 597 else 598 thread_alloc_and_run(args); 599 } 600 601 /* 602 * Helper routine for the assembly function thread_std_smc_entry() 603 * 604 * Note: this function is weak just to make it possible to exclude it from 605 * the unpaged area. 606 */ 607 void __weak __thread_std_smc_entry(struct thread_smc_args *args) 608 { 609 thread_std_smc_handler_ptr(args); 610 611 if (args->a0 == OPTEE_SMC_RETURN_OK) { 612 struct thread_ctx *thr = threads + thread_get_id(); 613 614 tee_fs_rpc_cache_clear(&thr->tsd); 615 if (!thread_prealloc_rpc_cache) { 616 thread_rpc_free_arg(thr->rpc_carg); 617 mobj_free(thr->rpc_mobj); 618 thr->rpc_carg = 0; 619 thr->rpc_arg = 0; 620 thr->rpc_mobj = NULL; 621 } 622 } 623 } 624 625 void *thread_get_tmp_sp(void) 626 { 627 struct thread_core_local *l = thread_get_core_local(); 628 629 return (void *)l->tmp_stack_va_end; 630 } 631 632 #ifdef ARM64 633 vaddr_t thread_get_saved_thread_sp(void) 634 { 635 struct thread_core_local *l = thread_get_core_local(); 636 int ct = l->curr_thread; 637 638 assert(ct != -1); 639 return threads[ct].kern_sp; 640 } 641 #endif /*ARM64*/ 642 643 vaddr_t thread_stack_start(void) 644 { 645 struct thread_ctx *thr; 646 int ct = thread_get_id_may_fail(); 647 648 if (ct == -1) 649 return 0; 650 651 thr = threads + ct; 652 return thr->stack_va_end - STACK_THREAD_SIZE; 653 } 654 655 size_t thread_stack_size(void) 656 { 657 return STACK_THREAD_SIZE; 658 } 659 660 bool thread_is_from_abort_mode(void) 661 { 662 struct thread_core_local *l = thread_get_core_local(); 663 664 return (l->flags >> THREAD_CLF_SAVED_SHIFT) & THREAD_CLF_ABORT; 665 } 666 667 #ifdef ARM32 668 bool thread_is_in_normal_mode(void) 669 { 670 return (read_cpsr() & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_SVC; 671 } 672 #endif 673 674 #ifdef ARM64 675 bool thread_is_in_normal_mode(void) 676 { 677 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 678 struct thread_core_local *l = thread_get_core_local(); 679 bool ret; 680 681 /* If any bit in l->flags is set we're handling some exception. */ 682 ret = !l->flags; 683 thread_unmask_exceptions(exceptions); 684 685 return ret; 686 } 687 #endif 688 689 void thread_state_free(void) 690 { 691 struct thread_core_local *l = thread_get_core_local(); 692 int ct = l->curr_thread; 693 694 assert(ct != -1); 695 assert(TAILQ_EMPTY(&threads[ct].mutexes)); 696 697 thread_lazy_restore_ns_vfp(); 698 tee_pager_release_phys( 699 (void *)(threads[ct].stack_va_end - STACK_THREAD_SIZE), 700 STACK_THREAD_SIZE); 701 702 lock_global(); 703 704 assert(threads[ct].state == THREAD_STATE_ACTIVE); 705 threads[ct].state = THREAD_STATE_FREE; 706 threads[ct].flags = 0; 707 l->curr_thread = -1; 708 709 unlock_global(); 710 } 711 712 #ifdef CFG_WITH_PAGER 713 static void release_unused_kernel_stack(struct thread_ctx *thr, 714 uint32_t cpsr __maybe_unused) 715 { 716 #ifdef ARM64 717 /* 718 * If we're from user mode then thr->regs.sp is the saved user 719 * stack pointer and thr->kern_sp holds the last kernel stack 720 * pointer. But if we're from kernel mode then thr->kern_sp isn't 721 * up to date so we need to read from thr->regs.sp instead. 722 */ 723 vaddr_t sp = is_from_user(cpsr) ? thr->kern_sp : thr->regs.sp; 724 #else 725 vaddr_t sp = thr->regs.svc_sp; 726 #endif 727 vaddr_t base = thr->stack_va_end - STACK_THREAD_SIZE; 728 size_t len = sp - base; 729 730 tee_pager_release_phys((void *)base, len); 731 } 732 #else 733 static void release_unused_kernel_stack(struct thread_ctx *thr __unused, 734 uint32_t cpsr __unused) 735 { 736 } 737 #endif 738 739 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 740 { 741 struct thread_core_local *l = thread_get_core_local(); 742 int ct = l->curr_thread; 743 744 assert(ct != -1); 745 746 thread_check_canaries(); 747 748 release_unused_kernel_stack(threads + ct, cpsr); 749 750 if (is_from_user(cpsr)) { 751 thread_user_save_vfp(); 752 tee_ta_update_session_utime_suspend(); 753 tee_ta_gprof_sample_pc(pc); 754 } 755 thread_lazy_restore_ns_vfp(); 756 757 lock_global(); 758 759 assert(threads[ct].state == THREAD_STATE_ACTIVE); 760 threads[ct].flags |= flags; 761 threads[ct].regs.cpsr = cpsr; 762 threads[ct].regs.pc = pc; 763 threads[ct].state = THREAD_STATE_SUSPENDED; 764 765 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 766 if (threads[ct].have_user_map) { 767 core_mmu_get_user_map(&threads[ct].user_map); 768 core_mmu_set_user_map(NULL); 769 } 770 771 l->curr_thread = -1; 772 773 unlock_global(); 774 775 return ct; 776 } 777 778 #ifdef ARM32 779 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 780 { 781 l->tmp_stack_va_end = sp; 782 thread_set_irq_sp(sp); 783 thread_set_fiq_sp(sp); 784 } 785 786 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 787 { 788 l->abt_stack_va_end = sp; 789 thread_set_abt_sp((vaddr_t)l); 790 thread_set_und_sp((vaddr_t)l); 791 } 792 #endif /*ARM32*/ 793 794 #ifdef ARM64 795 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 796 { 797 /* 798 * We're already using the tmp stack when this function is called 799 * so there's no need to assign it to any stack pointer. However, 800 * we'll need to restore it at different times so store it here. 801 */ 802 l->tmp_stack_va_end = sp; 803 } 804 805 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 806 { 807 l->abt_stack_va_end = sp; 808 } 809 #endif /*ARM64*/ 810 811 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 812 { 813 if (thread_id >= CFG_NUM_THREADS) 814 return false; 815 threads[thread_id].stack_va_end = sp; 816 return true; 817 } 818 819 int thread_get_id_may_fail(void) 820 { 821 /* 822 * thread_get_core_local() requires foreign interrupts to be disabled 823 */ 824 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 825 struct thread_core_local *l = thread_get_core_local(); 826 int ct = l->curr_thread; 827 828 thread_unmask_exceptions(exceptions); 829 return ct; 830 } 831 832 int thread_get_id(void) 833 { 834 int ct = thread_get_id_may_fail(); 835 836 assert(ct >= 0 && ct < CFG_NUM_THREADS); 837 return ct; 838 } 839 840 static void init_handlers(const struct thread_handlers *handlers) 841 { 842 thread_std_smc_handler_ptr = handlers->std_smc; 843 thread_fast_smc_handler_ptr = handlers->fast_smc; 844 thread_nintr_handler_ptr = handlers->nintr; 845 thread_cpu_on_handler_ptr = handlers->cpu_on; 846 thread_cpu_off_handler_ptr = handlers->cpu_off; 847 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 848 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 849 thread_system_off_handler_ptr = handlers->system_off; 850 thread_system_reset_handler_ptr = handlers->system_reset; 851 } 852 853 #ifdef CFG_WITH_PAGER 854 static void init_thread_stacks(void) 855 { 856 size_t n; 857 858 /* 859 * Allocate virtual memory for thread stacks. 860 */ 861 for (n = 0; n < CFG_NUM_THREADS; n++) { 862 tee_mm_entry_t *mm; 863 vaddr_t sp; 864 865 /* Find vmem for thread stack and its protection gap */ 866 mm = tee_mm_alloc(&tee_mm_vcore, 867 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 868 assert(mm); 869 870 /* Claim eventual physical page */ 871 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 872 true); 873 874 /* Add the area to the pager */ 875 tee_pager_add_core_area(tee_mm_get_smem(mm) + SMALL_PAGE_SIZE, 876 tee_mm_get_bytes(mm) - SMALL_PAGE_SIZE, 877 TEE_MATTR_PRW | TEE_MATTR_LOCKED, 878 NULL, NULL); 879 880 /* init effective stack */ 881 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 882 asan_tag_access((void *)tee_mm_get_smem(mm), (void *)sp); 883 if (!thread_init_stack(n, sp)) 884 panic("init stack failed"); 885 } 886 } 887 #else 888 static void init_thread_stacks(void) 889 { 890 size_t n; 891 892 /* Assign the thread stacks */ 893 for (n = 0; n < CFG_NUM_THREADS; n++) { 894 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 895 panic("thread_init_stack failed"); 896 } 897 } 898 #endif /*CFG_WITH_PAGER*/ 899 900 static void init_user_kcode(void) 901 { 902 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 903 vaddr_t v; 904 905 v = (vaddr_t)thread_excp_vect; 906 thread_user_kcode_va = ROUNDDOWN(v, CORE_MMU_USER_CODE_SIZE); 907 /* 908 * The maximum size of the exception vector and associated code is 909 * something slightly larger than 2 KiB. Worst case the exception 910 * vector can span two pages. 911 */ 912 thread_user_kcode_size = CORE_MMU_USER_CODE_SIZE * 2; 913 914 core_mmu_get_user_va_range(&v, NULL); 915 thread_user_kcode_offset = thread_user_kcode_va - v; 916 917 #if defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 918 /* 919 * When transitioning to EL0 subtract SP with this much to point to 920 * this special kdata page instead. SP is restored by add this much 921 * while transitioning back to EL1. 922 */ 923 v += thread_user_kcode_size; 924 thread_user_kdata_sp_offset = (vaddr_t)thread_core_local - v; 925 #endif 926 #endif /*CFG_CORE_UNMAP_CORE_AT_EL0*/ 927 } 928 929 void thread_init_primary(const struct thread_handlers *handlers) 930 { 931 init_handlers(handlers); 932 933 /* Initialize canaries around the stacks */ 934 init_canaries(); 935 936 init_thread_stacks(); 937 pgt_init(); 938 939 init_user_kcode(); 940 } 941 942 static void init_sec_mon(size_t pos __maybe_unused) 943 { 944 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 945 /* Initialize secure monitor */ 946 sm_init(GET_STACK(stack_tmp[pos])); 947 #endif 948 } 949 950 static uint32_t __maybe_unused get_midr_implementer(uint32_t midr) 951 { 952 return (midr >> MIDR_IMPLEMENTER_SHIFT) & MIDR_IMPLEMENTER_MASK; 953 } 954 955 static uint32_t __maybe_unused get_midr_primary_part(uint32_t midr) 956 { 957 return (midr >> MIDR_PRIMARY_PART_NUM_SHIFT) & 958 MIDR_PRIMARY_PART_NUM_MASK; 959 } 960 961 static vaddr_t get_excp_vect(void) 962 { 963 #ifdef CFG_CORE_WORKAROUND_SPECTRE_BP_SEC 964 uint32_t midr = read_midr(); 965 966 if (get_midr_implementer(midr) != MIDR_IMPLEMENTER_ARM) 967 return (vaddr_t)thread_excp_vect; 968 969 switch (get_midr_primary_part(midr)) { 970 #ifdef ARM32 971 case CORTEX_A8_PART_NUM: 972 case CORTEX_A9_PART_NUM: 973 case CORTEX_A17_PART_NUM: 974 #endif 975 case CORTEX_A57_PART_NUM: 976 case CORTEX_A72_PART_NUM: 977 case CORTEX_A73_PART_NUM: 978 case CORTEX_A75_PART_NUM: 979 return (vaddr_t)thread_excp_vect_workaround; 980 #ifdef ARM32 981 case CORTEX_A15_PART_NUM: 982 return (vaddr_t)thread_excp_vect_workaround_a15; 983 #endif 984 default: 985 return (vaddr_t)thread_excp_vect; 986 } 987 #endif /*CFG_CORE_WORKAROUND_SPECTRE_BP_SEC*/ 988 989 return (vaddr_t)thread_excp_vect; 990 } 991 992 void thread_init_per_cpu(void) 993 { 994 size_t pos = get_core_pos(); 995 struct thread_core_local *l = thread_get_core_local(); 996 997 init_sec_mon(pos); 998 999 set_tmp_stack(l, GET_STACK(stack_tmp[pos]) - STACK_TMP_OFFS); 1000 set_abt_stack(l, GET_STACK(stack_abt[pos])); 1001 1002 thread_init_vbar(get_excp_vect()); 1003 } 1004 1005 struct thread_specific_data *thread_get_tsd(void) 1006 { 1007 return &threads[thread_get_id()].tsd; 1008 } 1009 1010 struct thread_ctx_regs *thread_get_ctx_regs(void) 1011 { 1012 struct thread_core_local *l = thread_get_core_local(); 1013 1014 assert(l->curr_thread != -1); 1015 return &threads[l->curr_thread].regs; 1016 } 1017 1018 void thread_set_foreign_intr(bool enable) 1019 { 1020 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1021 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1022 struct thread_core_local *l; 1023 1024 l = thread_get_core_local(); 1025 1026 assert(l->curr_thread != -1); 1027 1028 if (enable) { 1029 threads[l->curr_thread].flags |= 1030 THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1031 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1032 } else { 1033 /* 1034 * No need to disable foreign interrupts here since they're 1035 * already disabled above. 1036 */ 1037 threads[l->curr_thread].flags &= 1038 ~THREAD_FLAGS_FOREIGN_INTR_ENABLE; 1039 } 1040 } 1041 1042 void thread_restore_foreign_intr(void) 1043 { 1044 /* thread_get_core_local() requires foreign interrupts to be disabled */ 1045 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1046 struct thread_core_local *l; 1047 1048 l = thread_get_core_local(); 1049 1050 assert(l->curr_thread != -1); 1051 1052 if (threads[l->curr_thread].flags & THREAD_FLAGS_FOREIGN_INTR_ENABLE) 1053 thread_set_exceptions(exceptions & ~THREAD_EXCP_FOREIGN_INTR); 1054 } 1055 1056 #ifdef CFG_WITH_VFP 1057 uint32_t thread_kernel_enable_vfp(void) 1058 { 1059 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1060 struct thread_ctx *thr = threads + thread_get_id(); 1061 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1062 1063 assert(!vfp_is_enabled()); 1064 1065 if (!thr->vfp_state.ns_saved) { 1066 vfp_lazy_save_state_final(&thr->vfp_state.ns); 1067 thr->vfp_state.ns_saved = true; 1068 } else if (thr->vfp_state.sec_lazy_saved && 1069 !thr->vfp_state.sec_saved) { 1070 /* 1071 * This happens when we're handling an abort while the 1072 * thread was using the VFP state. 1073 */ 1074 vfp_lazy_save_state_final(&thr->vfp_state.sec); 1075 thr->vfp_state.sec_saved = true; 1076 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 1077 /* 1078 * This can happen either during syscall or abort 1079 * processing (while processing a syscall). 1080 */ 1081 vfp_lazy_save_state_final(&tuv->vfp); 1082 tuv->saved = true; 1083 } 1084 1085 vfp_enable(); 1086 return exceptions; 1087 } 1088 1089 void thread_kernel_disable_vfp(uint32_t state) 1090 { 1091 uint32_t exceptions; 1092 1093 assert(vfp_is_enabled()); 1094 1095 vfp_disable(); 1096 exceptions = thread_get_exceptions(); 1097 assert(exceptions & THREAD_EXCP_FOREIGN_INTR); 1098 exceptions &= ~THREAD_EXCP_FOREIGN_INTR; 1099 exceptions |= state & THREAD_EXCP_FOREIGN_INTR; 1100 thread_set_exceptions(exceptions); 1101 } 1102 1103 void thread_kernel_save_vfp(void) 1104 { 1105 struct thread_ctx *thr = threads + thread_get_id(); 1106 1107 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1108 if (vfp_is_enabled()) { 1109 vfp_lazy_save_state_init(&thr->vfp_state.sec); 1110 thr->vfp_state.sec_lazy_saved = true; 1111 } 1112 } 1113 1114 void thread_kernel_restore_vfp(void) 1115 { 1116 struct thread_ctx *thr = threads + thread_get_id(); 1117 1118 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1119 assert(!vfp_is_enabled()); 1120 if (thr->vfp_state.sec_lazy_saved) { 1121 vfp_lazy_restore_state(&thr->vfp_state.sec, 1122 thr->vfp_state.sec_saved); 1123 thr->vfp_state.sec_saved = false; 1124 thr->vfp_state.sec_lazy_saved = false; 1125 } 1126 } 1127 1128 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 1129 { 1130 struct thread_ctx *thr = threads + thread_get_id(); 1131 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1132 1133 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1134 assert(!vfp_is_enabled()); 1135 1136 if (!thr->vfp_state.ns_saved) { 1137 vfp_lazy_save_state_final(&thr->vfp_state.ns); 1138 thr->vfp_state.ns_saved = true; 1139 } else if (tuv && uvfp != tuv) { 1140 if (tuv->lazy_saved && !tuv->saved) { 1141 vfp_lazy_save_state_final(&tuv->vfp); 1142 tuv->saved = true; 1143 } 1144 } 1145 1146 if (uvfp->lazy_saved) 1147 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 1148 uvfp->lazy_saved = false; 1149 uvfp->saved = false; 1150 1151 thr->vfp_state.uvfp = uvfp; 1152 vfp_enable(); 1153 } 1154 1155 void thread_user_save_vfp(void) 1156 { 1157 struct thread_ctx *thr = threads + thread_get_id(); 1158 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 1159 1160 assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR); 1161 if (!vfp_is_enabled()) 1162 return; 1163 1164 assert(tuv && !tuv->lazy_saved && !tuv->saved); 1165 vfp_lazy_save_state_init(&tuv->vfp); 1166 tuv->lazy_saved = true; 1167 } 1168 1169 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 1170 { 1171 struct thread_ctx *thr = threads + thread_get_id(); 1172 1173 if (uvfp == thr->vfp_state.uvfp) 1174 thr->vfp_state.uvfp = NULL; 1175 uvfp->lazy_saved = false; 1176 uvfp->saved = false; 1177 } 1178 #endif /*CFG_WITH_VFP*/ 1179 1180 #ifdef ARM32 1181 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1182 { 1183 uint32_t s; 1184 1185 if (!is_32bit) 1186 return false; 1187 1188 s = read_spsr(); 1189 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1190 s |= CPSR_MODE_USR; 1191 if (entry_func & 1) 1192 s |= CPSR_T; 1193 *spsr = s; 1194 return true; 1195 } 1196 #endif 1197 1198 #ifdef ARM64 1199 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1200 { 1201 uint32_t s; 1202 1203 if (is_32bit) { 1204 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1205 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1206 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1207 } else { 1208 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1209 } 1210 1211 *spsr = s; 1212 return true; 1213 } 1214 #endif 1215 1216 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1217 unsigned long a2, unsigned long a3, unsigned long user_sp, 1218 unsigned long entry_func, bool is_32bit, 1219 uint32_t *exit_status0, uint32_t *exit_status1) 1220 { 1221 uint32_t spsr; 1222 1223 tee_ta_update_session_utime_resume(); 1224 1225 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1226 *exit_status0 = 1; /* panic */ 1227 *exit_status1 = 0xbadbadba; 1228 return 0; 1229 } 1230 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1231 spsr, exit_status0, exit_status1); 1232 } 1233 1234 #ifdef CFG_CORE_UNMAP_CORE_AT_EL0 1235 void thread_get_user_kcode(struct mobj **mobj, size_t *offset, 1236 vaddr_t *va, size_t *sz) 1237 { 1238 core_mmu_get_user_va_range(va, NULL); 1239 *mobj = mobj_tee_ram; 1240 *offset = thread_user_kcode_va - CFG_TEE_RAM_START; 1241 *sz = thread_user_kcode_size; 1242 } 1243 #endif 1244 1245 #if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \ 1246 defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64) 1247 void thread_get_user_kdata(struct mobj **mobj, size_t *offset, 1248 vaddr_t *va, size_t *sz) 1249 { 1250 vaddr_t v; 1251 1252 core_mmu_get_user_va_range(&v, NULL); 1253 *va = v + thread_user_kcode_size; 1254 *mobj = mobj_tee_ram; 1255 *offset = (vaddr_t)thread_user_kdata_page - CFG_TEE_RAM_START; 1256 *sz = sizeof(thread_user_kdata_page); 1257 } 1258 #endif 1259 1260 void thread_add_mutex(struct mutex *m) 1261 { 1262 struct thread_core_local *l = thread_get_core_local(); 1263 int ct = l->curr_thread; 1264 1265 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1266 assert(m->owner_id == MUTEX_OWNER_ID_NONE); 1267 m->owner_id = ct; 1268 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1269 } 1270 1271 void thread_rem_mutex(struct mutex *m) 1272 { 1273 struct thread_core_local *l = thread_get_core_local(); 1274 int ct = l->curr_thread; 1275 1276 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1277 assert(m->owner_id == ct); 1278 m->owner_id = MUTEX_OWNER_ID_NONE; 1279 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1280 } 1281 1282 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1283 { 1284 bool rv; 1285 size_t n; 1286 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1287 1288 lock_global(); 1289 1290 for (n = 0; n < CFG_NUM_THREADS; n++) { 1291 if (threads[n].state != THREAD_STATE_FREE) { 1292 rv = false; 1293 goto out; 1294 } 1295 } 1296 1297 rv = true; 1298 for (n = 0; n < CFG_NUM_THREADS; n++) { 1299 if (threads[n].rpc_arg) { 1300 mobj_free(threads[n].rpc_mobj); 1301 *cookie = threads[n].rpc_carg; 1302 threads[n].rpc_carg = 0; 1303 threads[n].rpc_arg = NULL; 1304 goto out; 1305 } 1306 } 1307 1308 *cookie = 0; 1309 thread_prealloc_rpc_cache = false; 1310 out: 1311 unlock_global(); 1312 thread_unmask_exceptions(exceptions); 1313 return rv; 1314 } 1315 1316 bool thread_enable_prealloc_rpc_cache(void) 1317 { 1318 bool rv; 1319 size_t n; 1320 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_FOREIGN_INTR); 1321 1322 lock_global(); 1323 1324 for (n = 0; n < CFG_NUM_THREADS; n++) { 1325 if (threads[n].state != THREAD_STATE_FREE) { 1326 rv = false; 1327 goto out; 1328 } 1329 } 1330 1331 rv = true; 1332 thread_prealloc_rpc_cache = true; 1333 out: 1334 unlock_global(); 1335 thread_unmask_exceptions(exceptions); 1336 return rv; 1337 } 1338 1339 void thread_rpc_free_arg(uint64_t cookie) 1340 { 1341 if (cookie) { 1342 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1343 OPTEE_SMC_RETURN_RPC_FREE 1344 }; 1345 1346 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 1347 thread_rpc(rpc_args); 1348 } 1349 } 1350 1351 struct mobj *thread_rpc_alloc_arg(size_t size, uint64_t *cookie) 1352 { 1353 paddr_t pa; 1354 uint64_t co; 1355 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1356 OPTEE_SMC_RETURN_RPC_ALLOC, size 1357 }; 1358 struct mobj *mobj = NULL; 1359 1360 thread_rpc(rpc_args); 1361 1362 pa = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1363 co = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1364 1365 if (!ALIGNMENT_IS_OK(pa, struct optee_msg_arg)) 1366 goto err; 1367 1368 /* Check if this region is in static shared space */ 1369 if (core_pbuf_is(CORE_MEM_NSEC_SHM, pa, size)) 1370 mobj = mobj_shm_alloc(pa, size); 1371 else if ((!(pa & SMALL_PAGE_MASK)) && size <= SMALL_PAGE_SIZE) 1372 mobj = mobj_mapped_shm_alloc(&pa, 1, 0, co); 1373 1374 if (!mobj) 1375 goto err; 1376 1377 *cookie = co; 1378 return mobj; 1379 err: 1380 thread_rpc_free_arg(co); 1381 mobj_free(mobj); 1382 *cookie = 0; 1383 return NULL; 1384 } 1385 1386 static bool get_rpc_arg(uint32_t cmd, size_t num_params, 1387 struct optee_msg_arg **arg_ret, uint64_t *carg_ret) 1388 { 1389 struct thread_ctx *thr = threads + thread_get_id(); 1390 struct optee_msg_arg *arg = thr->rpc_arg; 1391 struct mobj *mobj; 1392 size_t sz = OPTEE_MSG_GET_ARG_SIZE(THREAD_RPC_MAX_NUM_PARAMS); 1393 uint64_t c; 1394 1395 if (num_params > THREAD_RPC_MAX_NUM_PARAMS) 1396 return false; 1397 1398 if (!arg) { 1399 mobj = thread_rpc_alloc_arg(sz, &c); 1400 if (!mobj) 1401 return false; 1402 1403 arg = mobj_get_va(mobj, 0); 1404 if (!arg) 1405 goto bad; 1406 1407 thr->rpc_arg = arg; 1408 thr->rpc_carg = c; 1409 thr->rpc_mobj = mobj; 1410 } 1411 1412 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(num_params)); 1413 arg->cmd = cmd; 1414 arg->num_params = num_params; 1415 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1416 1417 *arg_ret = arg; 1418 *carg_ret = thr->rpc_carg; 1419 return true; 1420 1421 bad: 1422 thread_rpc_free_arg(c); 1423 return false; 1424 } 1425 1426 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1427 struct optee_msg_param *params) 1428 { 1429 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1430 struct optee_msg_arg *arg; 1431 uint64_t carg; 1432 size_t n; 1433 1434 /* 1435 * Break recursion in case plat_prng_add_jitter_entropy_norpc() 1436 * sleeps on a mutex or unlocks a mutex with a sleeper (contended 1437 * mutex). 1438 */ 1439 if (cmd != OPTEE_MSG_RPC_CMD_WAIT_QUEUE) 1440 plat_prng_add_jitter_entropy_norpc(); 1441 1442 if (!get_rpc_arg(cmd, num_params, &arg, &carg)) 1443 return TEE_ERROR_OUT_OF_MEMORY; 1444 1445 memcpy(arg->params, params, sizeof(*params) * num_params); 1446 1447 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1448 thread_rpc(rpc_args); 1449 for (n = 0; n < num_params; n++) { 1450 switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) { 1451 case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT: 1452 case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT: 1453 case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT: 1454 case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT: 1455 case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT: 1456 case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT: 1457 params[n] = arg->params[n]; 1458 break; 1459 default: 1460 break; 1461 } 1462 } 1463 return arg->ret; 1464 } 1465 1466 /** 1467 * Free physical memory previously allocated with thread_rpc_alloc() 1468 * 1469 * @cookie: cookie received when allocating the buffer 1470 * @bt: must be the same as supplied when allocating 1471 * @mobj: mobj that describes allocated buffer 1472 * 1473 * This function also frees corresponding mobj. 1474 */ 1475 static void thread_rpc_free(unsigned int bt, uint64_t cookie, struct mobj *mobj) 1476 { 1477 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1478 struct optee_msg_arg *arg; 1479 uint64_t carg; 1480 1481 if (!get_rpc_arg(OPTEE_MSG_RPC_CMD_SHM_FREE, 1, &arg, &carg)) 1482 return; 1483 1484 arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1485 arg->params[0].u.value.a = bt; 1486 arg->params[0].u.value.b = cookie; 1487 arg->params[0].u.value.c = 0; 1488 1489 mobj_free(mobj); 1490 1491 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1492 thread_rpc(rpc_args); 1493 } 1494 1495 /** 1496 * Allocates shared memory buffer via RPC 1497 * 1498 * @size: size in bytes of shared memory buffer 1499 * @align: required alignment of buffer 1500 * @bt: buffer type OPTEE_MSG_RPC_SHM_TYPE_* 1501 * @payload: returned physical pointer to buffer, 0 if allocation 1502 * failed. 1503 * @cookie: returned cookie used when freeing the buffer 1504 */ 1505 static struct mobj *thread_rpc_alloc(size_t size, size_t align, unsigned int bt, 1506 uint64_t *cookie) 1507 { 1508 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1509 struct optee_msg_arg *arg; 1510 uint64_t carg; 1511 struct mobj *mobj = NULL; 1512 1513 if (!get_rpc_arg(OPTEE_MSG_RPC_CMD_SHM_ALLOC, 1, &arg, &carg)) 1514 goto fail; 1515 1516 arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1517 arg->params[0].u.value.a = bt; 1518 arg->params[0].u.value.b = size; 1519 arg->params[0].u.value.c = align; 1520 1521 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1522 thread_rpc(rpc_args); 1523 1524 if (arg->ret != TEE_SUCCESS) 1525 goto fail; 1526 1527 if (arg->num_params != 1) 1528 goto fail; 1529 1530 if (arg->params[0].attr == OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) { 1531 *cookie = arg->params[0].u.tmem.shm_ref; 1532 mobj = mobj_shm_alloc(arg->params[0].u.tmem.buf_ptr, 1533 arg->params[0].u.tmem.size); 1534 } else if (arg->params[0].attr == (OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT | 1535 OPTEE_MSG_ATTR_NONCONTIG)) { 1536 *cookie = arg->params[0].u.tmem.shm_ref; 1537 mobj = msg_param_mobj_from_noncontig( 1538 arg->params[0].u.tmem.buf_ptr, 1539 arg->params[0].u.tmem.size, 1540 *cookie, 1541 true); 1542 } else 1543 goto fail; 1544 1545 if (!mobj) 1546 goto free_first; 1547 1548 assert(mobj_is_nonsec(mobj)); 1549 return mobj; 1550 1551 free_first: 1552 thread_rpc_free(bt, *cookie, mobj); 1553 fail: 1554 *cookie = 0; 1555 return NULL; 1556 } 1557 1558 struct mobj *thread_rpc_alloc_payload(size_t size, uint64_t *cookie) 1559 { 1560 return thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie); 1561 } 1562 1563 void thread_rpc_free_payload(uint64_t cookie, struct mobj *mobj) 1564 { 1565 thread_rpc_free(OPTEE_MSG_RPC_SHM_TYPE_APPL, cookie, mobj); 1566 } 1567