core: generic_entry_a64.S: use adr_l to allow bigger data sections

Fixes the following linker errors which happens when adding a big
global array of data:

.../generic_entry_a64.o: In function `_sta

core: generic_entry_a64.S: use adr_l to allow bigger data sections

Fixes the following linker errors which happens when adding a big
global array of data:

.../generic_entry_a64.o: In function `_start`:
.../generic_entry_a64.S:95:(.text._start+0x30): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__bss_start` defined in .bss.__malloc_spinlock section in all_objs.o
.../generic_entry_a64.S:96:(.text._start+0x34): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__bss_end` defined in .bss.__malloc_spinlock section in all_objs.o
.../generic_entry_a64.o: In function `clear_bss`:
.../generic_entry_a64.S:108:(.text._start+0x84): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__text_start` defined in .bss.__malloc_spinlock section in all_objs.o
.../generic_entry_a64.S:139:(.text._start+0xc4): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__text_start` defined in .bss.__malloc_spinlock section in all_objs.o

The root cause is the 'adr x0, symbol' instructions. They generate a
relocation of type R_AARCH64_ADR_PREL_LO21, therefore 'symbol' can
only be +/-1MB away from the current PC (otherwise the linker emits the
above error). The problem is, in _start() and clear_bss() there is no
guarantee that the referenced symbols are in the allowed range.

The linker script core/arch/arm/kernel/link_dummy.ld, which is used
to generate all_objs.o, places __bss_start, __bss_end, __text_start
etc. at the end of the binary. The _start() and clear_bss() functions,
on the other hand, are near the start. If the total size of the binary
is sufficiently increased (for instance by adding global data), the
error will occur.

The __text_start error could probably be avoided by modifying
link_dummy.ld -- the actual location of the __* symbols does not matter
much in this phase of the build. However, the references to __bss_start
and __bss_end are still likely to be problematic in the final link
phase, because .bss can very well be more than 1MB away from .text
(with .rodata and .data between them).

So, let's use the adr_l macro which splits 'adr x0, symbol' in two
steps: 'adrp x0, symbol' (which generates a relocation of type
R_AARCH64_ADR_PREL_PG_HI21 for the 4K page offset) followed by
'add x0, x0, :lo12:symbol' (which generates a R_AARCH64_ADD_ABS_LO12
relocation for the offset into the page). The accessible range becomes
+/- 4GB.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reported-by: Guanchao Liang <liangguanchao1@huawei.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm64: add adr_l assembly macro

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

Use mempool API from libutils for bignum allocations

Uses the Use mempool API from libutils for bignum allocations.

Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jerome Forissie

Use mempool API from libutils for bignum allocations

Uses the Use mempool API from libutils for bignum allocations.

Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ltc: detect GCM counter re-use

Upstream commit 7d418b34b3fe ("Fix GCM counter reuse"):

GCM should error out after processing (2^32)-1 blocks / (2^39)-256 bits

[Note: LibTomCrypt GCM is used when C

ltc: detect GCM counter re-use

Upstream commit 7d418b34b3fe ("Fix GCM counter reuse"):

GCM should error out after processing (2^32)-1 blocks / (2^39)-256 bits

[Note: LibTomCrypt GCM is used when CFG_CRYPTO_AES_GCM_FROM_CRYPTOLIB=y
which is not the default]

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ti: Restore GIC context on resume

The resume path may need to re-setup the GIC. This is cleared in
some suspend paths and so should be restored.

Signed-off-by: Andrew F. Davis <afd@ti.com>

hikey: register additional dyn shm

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

hikey: fix typo

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

core: calculate size of special rx map at EL0

Calculate the required size the read-only executable mapping of kernel
mode code while in user mode (EL0) instead of the old hard coded 8k
size.

Review

core: calculate size of special rx map at EL0

Calculate the required size the read-only executable mapping of kernel
mode code while in user mode (EL0) instead of the old hard coded 8k
size.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm64: use SMCCC_ARCH_WORKAROUND_1

Use SMCCC_ARCH_WORKAROUND_1 to implement CVE-2017-5715 in AArch64.
Previous workarounds for CVE-2017-5715 haven't been fully effective.

Fixes CVE-2017-5715

core: arm64: use SMCCC_ARCH_WORKAROUND_1

Use SMCCC_ARCH_WORKAROUND_1 to implement CVE-2017-5715 in AArch64.
Previous workarounds for CVE-2017-5715 haven't been fully effective.

Fixes CVE-2017-5715
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm64: provide special rw kernel page at EL0

Provide a special kernel read/write mapped page while in EL0 if compiled
with CFG_CORE_UNMAP_CORE_AT_EL0 and CFG_CORE_WORKAROUND_SPECTRE_BP_SEC.
Th

core: arm64: provide special rw kernel page at EL0

Provide a special kernel read/write mapped page while in EL0 if compiled
with CFG_CORE_UNMAP_CORE_AT_EL0 and CFG_CORE_WORKAROUND_SPECTRE_BP_SEC.
This page will later be used as a temporary replacement of
thread_core_local. thread_core_local is not completely replaced, the new
memory is only used for temporary storage of registers via the stack
pointer.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: add thread_smc()

Adds thread_smc() for simple SMC calls to dispatcher in EL3

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@l

core: arm: add thread_smc()

Adds thread_smc() for simple SMC calls to dispatcher in EL3

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add smccc.h

Adds <smccc.h> introducing new features in SMC calling convention v1.1

See also
Link: https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigat

core: add smccc.h

Adds <smccc.h> introducing new features in SMC calling convention v1.1

See also
Link: https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ltc: mpa: fix potential memory leak in exptmod()

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reported-by: Oliver Chiang <oliver.chiang@mstarsemi.com>
Acked-by: Jens Wiklander <jens

ltc: mpa: fix potential memory leak in exptmod()

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reported-by: Oliver Chiang <oliver.chiang@mstarsemi.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core/arch/arm/pta/sdp_pta.c: Fix compile error

There will be a "format" compile error when using gcc 6.2.1.
It is not allowed to change type from "struct" to "void *"
in gcc 6.2.1.

Signed-off-by: E

core/arch/arm/pta/sdp_pta.c: Fix compile error

There will be a "format" compile error when using gcc 6.2.1.
It is not allowed to change type from "struct" to "void *"
in gcc 6.2.1.

Signed-off-by: Edison Ai <edison.ai@arm.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: crypto: arm32: add counter increment in ce_aes_ctr_encrypt()

Commit 628a9a10ca36 ("ltc: ctr: improve performance") reveals a bug in
the Aarch32 accelerated crypto code (AES CTR mode), which ca

core: crypto: arm32: add counter increment in ce_aes_ctr_encrypt()

Commit 628a9a10ca36 ("ltc: ctr: improve performance") reveals a bug in
the Aarch32 accelerated crypto code (AES CTR mode), which causes xtest
9159 to fail with some invalid buffer content: encrypting 96 bytes of
data in one pass does not yield the same result than encrypting 3 * 32
bytes. The problem is fixed by adding a missing counter increment in
ce_aes_ctr_encrypt().

Fixes: 9ff4f2ccc026 ("arm32: AES using ARMv8-A cryptographic extensions")
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)
Acked-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: minor cleanup related to pseudo TAs

tee_kta_trace.h is unused and useless.
Reword "static TA" into "pseudo TA" in comments.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Revie

core: minor cleanup related to pseudo TAs

tee_kta_trace.h is unused and useless.
Reword "static TA" into "pseudo TA" in comments.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: deprecate TA property flags EXEC_DDR and USER_MODE

TA property flags TA_FLAG_EXEC_DDR and TA_FLAG_USER_MODE were
not really useful in the OP-TEE and now they are meaningless.

Define the mask

core: deprecate TA property flags EXEC_DDR and USER_MODE

TA property flags TA_FLAG_EXEC_DDR and TA_FLAG_USER_MODE were
not really useful in the OP-TEE and now they are meaningless.

Define the mask of flags a TA may pretend to and assert loaded
TAs do not expect flags set outside of the defined supported bit
flags.

Fix gmon.h against duplicate round macros.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: deprecate TA_FLAG_USER_MODE

Differentiate user TA and pseudo TA contexts based on the TA operation
structure registered in the TA context and specific to each.

Change gprof pTA to test uTA at

core: deprecate TA_FLAG_USER_MODE

Differentiate user TA and pseudo TA contexts based on the TA operation
structure registered in the TA context and specific to each.

Change gprof pTA to test uTA attribute when targeting uTA client instead
of testing !pTA attribute.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-ls: Add support for fetching SSK from armv8 platform flavour.

- PLATFORM = ls-ls1046ardb, ls-ls1043ardb, ls-ls1012ardb

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Sumit

plat-ls: Add support for fetching SSK from armv8 platform flavour.

- PLATFORM = ls-ls1046ardb, ls-ls1043ardb, ls-ls1012ardb

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
[jf: s/?=y/?= y/]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: crypto: enable 4096-bit RSA keys

RSA key size can be allowed to be as large as CFG_CORE_BIGNUM_MAX_BITS
(4096 by default).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Review

core: crypto: enable 4096-bit RSA keys

RSA key size can be allowed to be as large as CFG_CORE_BIGNUM_MAX_BITS
(4096 by default).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: crypto: ltc: introduce CFG_CORE_BIGNUM_MAX_BITS

Make the size of big numbers in the TEE core configurable. The default
(4096 bits) may be reduced if such a large key size is not needed, to
sav

core: crypto: ltc: introduce CFG_CORE_BIGNUM_MAX_BITS

Make the size of big numbers in the TEE core configurable. The default
(4096 bits) may be reduced if such a large key size is not needed, to
save core memory.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove vm_info_get_user_range()

Removes the now unused function vm_info_get_user_range().

Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260/pager/GP)
Reviewed-by: Etienne Carri

core: remove vm_info_get_user_range()

Removes the now unused function vm_info_get_user_range().

Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260/pager/GP)
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: document struct user_ta_ctx

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: mm: support map update to active context

Adds support in vm_map() to update an active context. vm_set_prot() is
also updated, but still requires a call to tee_mmu_set_ctx() for the
changes to

core: mm: support map update to active context

Adds support in vm_map() to update an active context. vm_set_prot() is
also updated, but still requires a call to tee_mmu_set_ctx() for the
changes to be effective.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: tee_mmu.c: add internal umap_remove_region()

Adds an internal helper function umap_remove_region() to remove and free
a region from a struct vm_info.

Reviewed-by: Etienne Carriere <etienne.ca

core: tee_mmu.c: add internal umap_remove_region()

Adds an internal helper function umap_remove_region() to remove and free
a region from a struct vm_info.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...