| 40004d9a | 27-Sep-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
abort.c: always save VFP state with thread context
Saving VFP state requires a thread context, if none is available print abort info and panic().
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@e
abort.c: always save VFP state with thread context
Saving VFP state requires a thread context, if none is available print abort info and panic().
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Fixes: cfa34ec63699 ("abort.c: manipulate with VFP state only if thread is active") Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey AArch64 pager) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 973e8908 | 01-Oct-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: trace out size of the pager physical page pool
Add a nice info trace about the size of the pager physical page pool.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by:
core: trace out size of the pager physical page pool
Add a nice info trace about the size of the pager physical page pool.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0f93de74 | 01-Oct-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: correct unpaged constraint on GIC driver
Release of secondary boot cores on 32bit machine use SMC that issue a SGI on secondary core. Since the interrupt is raised from the monitor mode, the r
core: correct unpaged constraint on GIC driver
Release of secondary boot cores on 32bit machine use SMC that issue a SGI on secondary core. Since the interrupt is raised from the monitor mode, the related GIC driver resources must be tagged as unpaged.
This change costs around 300 bytes of unpaged resident memory.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| db783ff8 | 01-Oct-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: correct dt_find_compatible_driver() if no driver found
By convention the compatible array for driver probing ends with a NULL compatible string ID reference.
This change ensures such NULL ref
core: correct dt_find_compatible_driver() if no driver found
By convention the compatible array for driver probing ends with a NULL compatible string ID reference.
This change ensures such NULL reference is properly handled as the end of the compatible array references.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 439203cb | 26-Sep-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
Allow mixed declaration and code
Removes the -Wdeclaration-after-statement compiler flag to allow mixed declaration and code
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by:
Allow mixed declaration and code
Removes the -Wdeclaration-after-statement compiler flag to allow mixed declaration and code
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2197c7c2 | 26-Sep-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
optee_msg.h: remove OPTEE_MSG_ATTR_FRAGMENT
OPTEE_MSG_ATTR_FRAGMENT isn't defined. Remove it from comments and replace with OPTEE_MSG_ATTR_NONCONTIG where applicable.
Acked-by: Jerome Forissier <je
optee_msg.h: remove OPTEE_MSG_ATTR_FRAGMENT
OPTEE_MSG_ATTR_FRAGMENT isn't defined. Remove it from comments and replace with OPTEE_MSG_ATTR_NONCONTIG where applicable.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 85771856 | 12-Sep-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: reference count registered shared memory
* Adds a reference counter to registered shared memory to make sure that it's not unregistered while in use. * Updates entry_std to use the reference
core: reference count registered shared memory
* Adds a reference counter to registered shared memory to make sure that it's not unregistered while in use. * Updates entry_std to use the reference counting functions
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 19cae8dc | 12-Sep-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
entry_std: use READ_ONCE() to read from shared memory
Use the READ_ONCE() macro everywhere shared memory is read to make sure that unexpected values can not be used.
Reviewed-by: Volodymyr Babchuk
entry_std: use READ_ONCE() to read from shared memory
Use the READ_ONCE() macro everywhere shared memory is read to make sure that unexpected values can not be used.
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 62b4cdb5 | 07-Sep-2018 |
Jun Nie <jun.nie@linaro.org> |
core: arm: imx: Support psci feature query
Support PSCI call to query features list. So that non-secure world knows what features are supported by ATF. The feature list is based on current implement
core: arm: imx: Support psci feature query
Support PSCI call to query features list. So that non-secure world knows what features are supported by ATF. The feature list is based on current implemented iMX psci functions.
Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Peng Fan <peng.fan@nxp.com>
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| fa152a4e | 06-Sep-2018 |
Christopher Tam <godtamit@google.com> |
Fix copying dirty values in copy_in_params()
If the OP-TEE driver from the rich OS specifies a message with a number of params < TEE_NUM_PARAMS, copy_in_params() will copy in undefined values from p
Fix copying dirty values in copy_in_params()
If the OP-TEE driver from the rich OS specifies a message with a number of params < TEE_NUM_PARAMS, copy_in_params() will copy in undefined values from pt[i] (where i >= the number of params). This is because the pt array is an uninitialized local value, and per the C99 standard 6.7.8:
If an object that has automatic storage duration is not initialized explicitly, its value is indeterminate.
This change fixes this issue by clearing out the unused parts of pt.
Signed-off-by: Christopher Tam <godtamit@google.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d7a893d3 | 07-Sep-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix tee_tadb_ta_create() panic
Fixes a panic triggered in tee_tadb_ta_create(). Before this patch tee_tadb_ta_create() was calling tadb_put() if tee_tadb_open() failed. This is incorrect as th
core: fix tee_tadb_ta_create() panic
Fixes a panic triggered in tee_tadb_ta_create(). Before this patch tee_tadb_ta_create() was calling tadb_put() if tee_tadb_open() failed. This is incorrect as the reference counter hasn't been increased then. This patch fixes that by only calling tadb_put() once tee_tadb_open() has succeeded.
Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| eecd6bd2 | 03-Sep-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
entry_std: use READ_ONCE in strategic places
Code that deals with command buffers follows rule "read once, validate, use". Problem is that compiler does not know about this rule, so it can optimize
entry_std: use READ_ONCE in strategic places
Code that deals with command buffers follows rule "read once, validate, use". Problem is that compiler does not know about this rule, so it can optimize out temporary variables and read data twice from the shared buffer.
READ_ONCE() will ensure that compiler will not try to optimize such reads.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 81801f83 | 03-Sep-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
io.h: add READ_ONCE macro
Compiler can rearrange memory reads and writes if it does not see any dependency on them. This can be troublesome if we deal with memory which is shared with non-secure wor
io.h: add READ_ONCE macro
Compiler can rearrange memory reads and writes if it does not see any dependency on them. This can be troublesome if we deal with memory which is shared with non-secure world.
READ_ONCE macro ensures that compiler will read memory only once. It is simple wrapper over __compiler_atomic_load(), but it's name emphasizes it's function.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5f142e39 | 13-Jun-2018 |
Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> |
plat-rpi3: Modify addresses to work with upstream TF-A.
The upstream arm-trusted-firmware reserves 0x10100000-0x11000000 for secure DRAM. Change the address according to the upstream TF-A.
To help
plat-rpi3: Modify addresses to work with upstream TF-A.
The upstream arm-trusted-firmware reserves 0x10100000-0x11000000 for secure DRAM. Change the address according to the upstream TF-A.
To help troubleshoot discrepancies, this commit goes well with the TF-A at commit aa49bde8a3e8 ("rpi3: Move NS-DRAM out of the protected region")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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| c3d0b15d | 17-Aug-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: generate gicv3 register access code
Replaces the hand crafted system register code in <arm32.h> with generated code based on arm32_gicv3_sysreg.txt which is extracted from The ARM Gener
core: arm32: generate gicv3 register access code
Replaces the hand crafted system register code in <arm32.h> with generated code based on arm32_gicv3_sysreg.txt which is extracted from The ARM Generic Interrupt Controller Architecture Specification GIC architecture version 3.0 and version 4.0.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 18b58024 | 16-Aug-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: generate system register access code
Replaces the hand crafted system register code in <arm32.h> and <arm32_macros.S> with generated code based on arm32_sysreg.txt which is extracted fr
core: arm32: generate system register access code
Replaces the hand crafted system register code in <arm32.h> and <arm32_macros.S> with generated code based on arm32_sysreg.txt which is extracted from the ARM Architecture Reference Manual.
The remaining hand crafted code for cp15 accesses is not covered by the ARM Architecture Reference Manual.
A script is added to generate both assembly macros and static inline functions to access the system registers.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6cea5715 | 23-Aug-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename read_idpfr1() to read_id_pfr1()
Renames the assembly macro read_idpfr1() to read_id_pfr1() to use the real register name.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Si
core: rename read_idpfr1() to read_id_pfr1()
Renames the assembly macro read_idpfr1() to read_id_pfr1() to use the real register name.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bbd8f31b | 17-Aug-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename to read_pmu_ccnt() to read_pmccntr()
Renames read_pmu_ccnt() to read_pmccntr() to use the real register name.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by:
core: rename to read_pmu_ccnt() to read_pmccntr()
Renames read_pmu_ccnt() to read_pmccntr() to use the real register name.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e72c941f | 14-Aug-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: sm: optimize padding in struct sm_ctx
Removes redundant padding in struct sm_ctx and sub-structs with regards to CFG_SM_NO_CYCLE_COUNTING. Saves 4 bytes per core if CFG_SM_NO_CYCLE_COUNT
core: arm: sm: optimize padding in struct sm_ctx
Removes redundant padding in struct sm_ctx and sub-structs with regards to CFG_SM_NO_CYCLE_COUNTING. Saves 4 bytes per core if CFG_SM_NO_CYCLE_COUNTING is defined.
Removes assumptions in monitor assembly code about where the padding in struct sm_ctx is located.
Adds compile time asserts are added to check that struct sm_ctx is properly aligned.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| dd24684e | 13-Aug-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: sm: fix FIQ from normal world
When compiled with "CFG_SM_NO_CYCLE_COUNTING=y" sm_save_unbanked_regs() doesn't return with r0 pointing to ctx->nsec.r8 even if that's assumed in sm_fiq_entr
core: arm: sm: fix FIQ from normal world
When compiled with "CFG_SM_NO_CYCLE_COUNTING=y" sm_save_unbanked_regs() doesn't return with r0 pointing to ctx->nsec.r8 even if that's assumed in sm_fiq_entry(). Fixes this by calculating the pointer based on sp instead or relying on a certain value in r0.
Fixes: 8267e19bbcce ("core: arm: sm: initialize PMCR.DP to 1 and save/restore PMCR") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a06857f9 | 10-Aug-2018 |
Vinitha V Pillai <vinitha.pillai@nxp.com> |
plat-ls:add LS2088ARDB platform flavors
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com> |
| 0ecda02b | 10-Aug-2018 |
Vinitha V Pillai <vinitha.pillai@nxp.com> |
plat-ls:add LS1088ARDB platform flavors
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.co
plat-ls:add LS1088ARDB platform flavors
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
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| 17eba58a | 10-Aug-2018 |
Vinitha V Pillai <vinitha.pillai@nxp.com> |
plat-ls:add LS1012AFRWY platform flavors
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.c
plat-ls:add LS1012AFRWY platform flavors
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| 929b5671 | 06-Aug-2018 |
Vinitha V Pillai <vinitha.pillai.nxp.com> |
core:arch:arm:plat-ls: make generic layout for all platforms
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Sahil Malhotra <
core:arch:arm:plat-ls: make generic layout for all platforms
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| aa1288ed | 01-Aug-2018 |
Vinitha V Pillai <vinitha.pillai.nxp.com> |
core:arch:arm:plat-ls: remove platform specific function get_core_pos_mpidr
get_core_pos_mpidr return value was being set as MPIDR_CPU_MASK which returned only the core ID, and ignored the cluster v
core:arch:arm:plat-ls: remove platform specific function get_core_pos_mpidr
get_core_pos_mpidr return value was being set as MPIDR_CPU_MASK which returned only the core ID, and ignored the cluster value. Hence all threads that were requested execution by optee_os, were getting serviced only by the cores of 1st cluster, irrespective of the number of clusters present. Hence removing the file and getting the value from generic function that returns correct core_id based on the cluster it belongs to.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
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