core: split core/arch/arm/kernel/thread.c

Splits core/arch/arm/kernel/thread.c into one generic and one
architecture specific file.

Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Marou

core: split core/arch/arm/kernel/thread.c

Splits core/arch/arm/kernel/thread.c into one generic and one
architecture specific file.

Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: split core/arch/arm/include/kernel/thread.h

Splits core/arch/arm/include/kernel/thread.h into one generic and one
architecture specific file.

Reviewed-by: Jerome Forissier <jerome@forissier.o

core: split core/arch/arm/include/kernel/thread.h

Splits core/arch/arm/include/kernel/thread.h into one generic and one
architecture specific file.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: move thread_private.h to an include directory

Moves core/arch/arm/kernel/thread_private.h to a include directory to be
included as <kernel/thread_private.h>.

Reviewed-by: Jerome Forissier <je

core: move thread_private.h to an include directory

Moves core/arch/arm/kernel/thread_private.h to a include directory to be
included as <kernel/thread_private.h>.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core/include/kernel/asan.h: include <compiler.h>

Each .h (and .c) file should include their needed .h files so add this
missing include.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-b

core/include/kernel/asan.h: include <compiler.h>

Each .h (and .c) file should include their needed .h files so add this
missing include.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sam: pm: add support for setting suspend mode

PSCI allows entering platform suspend with SYSTEM_SUSPEND call which
is meant to enter the system in its deepest power state. sama5d2
platform supp

plat-sam: pm: add support for setting suspend mode

PSCI allows entering platform suspend with SYSTEM_SUSPEND call which
is meant to enter the system in its deepest power state. sama5d2
platform supports multiple suspend power states. Currently, Linux
supports the atmel.pm_modes command line option which allows to select
this suspend state. Since Linux uses PSCI SYSTEM_SUSPEND to enter
suspend mode, we are not able to pass information (such as done for
CPU_SUSPEND). In order to select the mode that will be entered by
SYSTEM_SUSPEND from normal world and thus select the desired suspend state,
SMCs are added to allow selecting and getting this power mode.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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plat-sam: add sm_platform_handler() stub

Add sm_platform_handler() to handle SMC. For the moment, this is
stubbed and will allow to handle SiP specific SMC.

Acked-by: Jens Wiklander <jens.wiklander

plat-sam: add sm_platform_handler() stub

Add sm_platform_handler() to handle SMC. For the moment, this is
stubbed and will allow to handle SiP specific SMC.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: caam: instantiate RNG state handle with prediction resistance

Instantiate RNG state handles with Prediction Resistance (PR) support.
This way SW further downstream (e.g. Rich OS, boot loade

drivers: caam: instantiate RNG state handle with prediction resistance

Instantiate RNG state handles with Prediction Resistance (PR) support.
This way SW further downstream (e.g. Rich OS, boot loader etc.) is able
to use the "PR" bit in RNG generation descriptors (forcing TRNG
re-seeding before PRNG / DRBG outputs random data).

Note: current patch does not deal with RNG state handles that have
already been initialized, but without PR support (this could happen if
U-boot would run before OP-TEE etc.). In this case, RNG state handle
would have to be deinstantiated first, and then reinstantiated with
PR support.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: mm: vm.c: remove arm.h and include config.h

Removes arm.h from include list as it is not used and explicitly add
config.h for IS_ENABLED macro.

Signed-off-by: Marouene Boubakri <marouene.boub

core: mm: vm.c: remove arm.h and include config.h

Removes arm.h from include list as it is not used and explicitly add
config.h for IS_ENABLED macro.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: mm: move tee_pager.h to core/include/mm

The tee_pager.h header file does not contain architecture-specific code,
move it from core/arch/arm/include/mm to core/include/mm

Signed-off-by: Maroue

core: mm: move tee_pager.h to core/include/mm

The tee_pager.h header file does not contain architecture-specific code,
move it from core/arch/arm/include/mm to core/include/mm

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: mm: move pgt_cache.h to core/include/mm

The pgt_cache.h header file does not contain architecture-specific code,
move it from core/arch/arm/include/mm to core/include/mm

Signed-off-by: Maroue

core: mm: move pgt_cache.h to core/include/mm

The pgt_cache.h header file does not contain architecture-specific code,
move it from core/arch/arm/include/mm to core/include/mm

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: kernel: move abort.h to core/include/kernel

The abort.h header file does not contain architecture-specific code, move
it from core/arch/arm/include/kernel/ to core/include/kernel

Signed-off-b

core: kernel: move abort.h to core/include/kernel

The abort.h header file does not contain architecture-specific code, move
it from core/arch/arm/include/kernel/ to core/include/kernel

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: kernel: include: remove multiple blank lines in spinlock.h

Remove multiple blank lines in spinlock.h to satisfy checkpatch.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-

core: kernel: include: remove multiple blank lines in spinlock.h

Remove multiple blank lines in spinlock.h to satisfy checkpatch.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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core: kernel: move spinlock.h to core/include/kernel

Header file spinlock.h does not contain architecture-specific code
and it is being included by lib code as well, therefore, move it
from core/arc

core: kernel: move spinlock.h to core/include/kernel

Header file spinlock.h does not contain architecture-specific code
and it is being included by lib code as well, therefore, move it
from core/arch/arm/include to core/include/kernel

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: kernel: move spin_lock_debug.c to core/kernel

Source file spin_lock_debug.c does not contain architecture-specific code
therefore, move it from core/arch/arm/kernel to core/kernel and remove
u

core: kernel: move spin_lock_debug.c to core/kernel

Source file spin_lock_debug.c does not contain architecture-specific code
therefore, move it from core/arch/arm/kernel to core/kernel and remove
unused header thread_private.h

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: ffa: add thread_spmc_register_secondary_ep()

Adds thread_spmc_register_secondary_ep() which replaces the previous
platforms specific functions ffa_secondary_cpu_ep_register() in
plat-vexpress

core: ffa: add thread_spmc_register_secondary_ep()

Adds thread_spmc_register_secondary_ep() which replaces the previous
platforms specific functions ffa_secondary_cpu_ep_register() in
plat-vexpress and plat-totalcompute.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: Calculate CFG_TZDRAM_START and CFG_NSEC_DDR_0_SIZE

Move assignement in order to calculate the value instead of
hardcoded.

0x2000000 is the sum of 0x01e00000 and 0x00200000

Signed-off-by

core: imx: Calculate CFG_TZDRAM_START and CFG_NSEC_DDR_0_SIZE

Move assignement in order to calculate the value instead of
hardcoded.

0x2000000 is the sum of 0x01e00000 and 0x00200000

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Clement Faure <clement.faure@nxp.com>

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crypto: drivers: se050: remove implicit dependency

The SE05X device is platform independent and therefore does not need
the iMX I2C driver but the actual driver for the particular platform
is connec

crypto: drivers: se050: remove implicit dependency

The SE05X device is platform independent and therefore does not need
the iMX I2C driver but the actual driver for the particular platform
is connected into.

Implementing these changes required a fix in the Plug-and-Trust tree
(the addition of a missing dependency), therefore we will also bump
the Plug-and-Trust version used in the Azure pipeline.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome@forissier.org>

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plat-sam: add support for SAIC init

Initialize SAIC in main_init_gic() and add itr_core_handler() function
which calls atmel_saic_it_handle() to handle interrupts.

Acked-by: Jens Wiklander <jens.wi

plat-sam: add support for SAIC init

Initialize SAIC in main_init_gic() and add itr_core_handler() function
which calls atmel_saic_it_handle() to handle interrupts.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: atmel_saic: add SAIC driver

Add a driver to handle interrupt that are targeting the secure
interrupt controller. This driver will be used to handle watchdog and
matrix interrupts.

Acked-by

drivers: atmel_saic: add SAIC driver

Add a driver to handle interrupt that are targeting the secure
interrupt controller. This driver will be used to handle watchdog and
matrix interrupts.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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core: Add property to check feature PAUTH in TEE property set

Add an entry in TEE_PROPSET_TEE_IMPLEMENTATION for a boolean
property org.trustedfirmware.optee.cpu.feat_pauth_implemented.
The property

core: Add property to check feature PAUTH in TEE property set

Add an entry in TEE_PROPSET_TEE_IMPLEMENTATION for a boolean
property org.trustedfirmware.optee.cpu.feat_pauth_implemented.
The property is set true only if CFG_TA_PAUTH is configured and
the underlying CPU supports FEAT_PAuth/FEAT_PAuth2.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Add basic pointer authentication support for TA's

APIAKey is used for usespace TA's where these keys are generated
for every TA at load time. The TEE core maintains the key value
for each TA is resp

Add basic pointer authentication support for TA's

APIAKey is used for usespace TA's where these keys are generated
for every TA at load time. The TEE core maintains the key value
for each TA is responsible for storing/restorign them during
switch to EL0 and back.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm64: Add registers and bits for pointer authentication support

The ARMv8.3 PAuth (pointer authentication) extension adds:

- Fields in register ID_AA64ISAR1 to report the presence of pointer
aut

arm64: Add registers and bits for pointer authentication support

The ARMv8.3 PAuth (pointer authentication) extension adds:

- Fields in register ID_AA64ISAR1 to report the presence of pointer
authentication functionality.
- Control bits in SCTLR_ELx to enable this functionality.
- New registers to hold the keys necessary for this
functionality.
- New ESR_ELx.EC codes used when the new instructions are affected by
configurable traps

These will be used in later patches as support for pointer
authentication is added.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sam: psci: add support for suspend and idle.

Based on the previous work to add suspend on sama5d2 platform, add
the PSCI glue to call suspend function. psci_cpu_suspend() is used to
put the pla

plat-sam: psci: add support for suspend and idle.

Based on the previous work to add suspend on sama5d2 platform, add
the PSCI glue to call suspend function. psci_cpu_suspend() is used to
put the platform in light suspend mode (STANDBY) whereas
psci_system_suspend() puts the system into the suspend mode selected by
CFG_ATMEL_PM_SUSPEND_MODE at compile time.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: atmel_shdwc: add call to suspend init

Since there is no "suspend" controller per se and that the general
controller used for suspend is the shutdown controller, call suspend
init from shdwc

drivers: atmel_shdwc: add call to suspend init

Since there is no "suspend" controller per se and that the general
controller used for suspend is the shutdown controller, call suspend
init from shdwc driver.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: pm: sam: add suspend support

Add suspend support for sama5d2 platform. This support allows to use
all the available modes of suspend present on the sama5d2 platform:
- STANDBY
- ULP0
- ULP0

drivers: pm: sam: add suspend support

Add suspend support for sama5d2 platform. This support allows to use
all the available modes of suspend present on the sama5d2 platform:
- STANDBY
- ULP0
- ULP0 Fast
- ULP1
- BACKUP

By default, STANDBY mode is used as default suspend mode.
This support is meant to be used by PSCI.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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