core: riscv: spinlock.c: implement spin-locking primitives

Implement __cpu_spin_lock(), __cpu_spin_unlock() and __cpu_spin_trylock()
Use atomic-instruction amoswap in "A" extension for locks and ens

core: riscv: spinlock.c: implement spin-locking primitives

Implement __cpu_spin_lock(), __cpu_spin_unlock() and __cpu_spin_trylock()
Use atomic-instruction amoswap in "A" extension for locks and ensure memory
ordering using fence instruction.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: riscv: add tlb_helpers.h

The tlbi_asid() function is required by core/mm/vm.c
and tlbi_all() function is required by core/mm/core_mmu.c
Declare them in core/arch/riscv/include/kernel/tlb_helpe

core: riscv: add tlb_helpers.h

The tlbi_asid() function is required by core/mm/vm.c
and tlbi_all() function is required by core/mm/core_mmu.c
Declare them in core/arch/riscv/include/kernel/tlb_helpers.h

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: riscv: plat-spike: add platform configuration header file

Introduces a minimalist platform_config.h to be used by linker scripts.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>

core: riscv: plat-spike: add platform configuration header file

Introduces a minimalist platform_config.h to be used by linker scripts.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: riscv: riscv.mk: setup compiler for the RISC-V core module

Setup compiler for the risc-v core module on 32 and 64 bits definitions.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com

core: riscv: riscv.mk: setup compiler for the RISC-V core module

Setup compiler for the risc-v core module on 32 and 64 bits definitions.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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riscv: create makefiles and directories tree for riscv

This commits creates the very first makefiles, directories and
subdirectories for RISC-V port. It also creates a new platform flavor
named plat

riscv: create makefiles and directories tree for riscv

This commits creates the very first makefiles, directories and
subdirectories for RISC-V port. It also creates a new platform flavor
named plat-spike. Spike is a reference functional RISC-V ISA simulator
which provides full system emulation and it is developed alongside the
RISC-V toolchain.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: include: io.h: define io_read64() and io_write64() helpers

Add 64 bits read/write functions.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jerome Forissier <jerome

core: include: io.h: define io_read64() and io_write64() helpers

Add 64 bits read/write functions.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: deprecate vm_add_rwmem() and vm_rem_rwmem()

Deprecates vm_add_rwmem() and vm_rem_rwmem(), they should only be
called from mobj_seccpy_shm_alloc() and mobj_seccpy_shm_free().

Reviewed-by: Etie

core: deprecate vm_add_rwmem() and vm_rem_rwmem()

Deprecates vm_add_rwmem() and vm_rem_rwmem(), they should only be
called from mobj_seccpy_shm_alloc() and mobj_seccpy_shm_free().

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: scmi-msg: Fix parameter type

In order to make clock.c and voltage_domain.c compile on
64 bit architecture, we cannot use unsigned int in the
function prototype and size_t in the function de

drivers: scmi-msg: Fix parameter type

In order to make clock.c and voltage_domain.c compile on
64 bit architecture, we cannot use unsigned int in the
function prototype and size_t in the function definition.

Signed-off-by: Ludvig Pärsson <ludvig.parsson@axis.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: drivers: Fix SA2UL background firewall size

For GP devices this first firewall region should be a background region
that spans the whole address space managed by this firewall. This allows

plat-k3: drivers: Fix SA2UL background firewall size

For GP devices this first firewall region should be a background region
that spans the whole address space managed by this firewall. This allows
normal use of devices behind it even when not explicitly permitted.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: drivers: Add SA2UL RNG driver

TI K3 family devices contain a set of crypto accelerators under
the umbrella device SA2UL. Add support for setting up the power
and firewalls for this device.

plat-k3: drivers: Add SA2UL RNG driver

TI K3 family devices contain a set of crypto accelerators under
the umbrella device SA2UL. Add support for setting up the power
and firewalls for this device. Then add support for the TRNG
sub-device.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: Move TI-SCI setup out of HUK function

The TI-SCI components are used for more than just the hardware
unique key, move the setup out into a service_init so it is
not tied to just HUK.

While

plat-k3: Move TI-SCI setup out of HUK function

The TI-SCI components are used for more than just the hardware
unique key, move the setup out into a service_init so it is
not tied to just HUK.

While here remove the device check for HUK, it works on all
supported K3 devices.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: drivers: ti-sci: Add support for setting firewall state

This adds support for the TI-SCI firewall messages:
* TI_SCI_MSG_FWL_SET
* TI_SCI_MSG_FWL_GET
* TI_SCI_MSG_FWL_CHANGE_OWNER

Signe

plat-k3: drivers: ti-sci: Add support for setting firewall state

This adds support for the TI-SCI firewall messages:
* TI_SCI_MSG_FWL_SET
* TI_SCI_MSG_FWL_GET
* TI_SCI_MSG_FWL_CHANGE_OWNER

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: drivers: ti-sci: Add support for setting device state

This adds support for the TI-SCI TI_SCI_MSG_SET_DEVICE_STATE message.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Foriss

plat-k3: drivers: ti-sci: Add support for setting device state

This adds support for the TI-SCI TI_SCI_MSG_SET_DEVICE_STATE message.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: remove stm32_clock_*() helpers

Removes function that were deprecated: stm32_clock_is_enabled(),
stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().

Signed-off-by:

drivers: clk: remove stm32_clock_*() helpers

Removes function that were deprecated: stm32_clock_is_enabled(),
stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: armv7: fix ASLR error

With commit 528dabb28254 ("core: suppress text relocation on
stack_tmp_export") the stack pointer is calculated using a relative
address instead of based on an absolute a

core: armv7: fix ASLR error

With commit 528dabb28254 ("core: suppress text relocation on
stack_tmp_export") the stack pointer is calculated using a relative
address instead of based on an absolute address which is relocated with
ASLR enabled.

Prior to this on Armv7 we compensate for a relocation update for
stack_tmp_export_rel in reset_secondary() just after the stack pointer
was initialized. So now when the relocation update of stack_tmp_export_rel
is gone remove the compensating code too.

Fixes: 528dabb28254 ("core: suppress text relocation on stack_tmp_export")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: sp: handle memory regions w/o base address

The FF-A spec states that in the SP manifest a base address is not
mandatory for memory regions. If the field is not present, the specified
memory re

core: sp: handle memory regions w/o base address

The FF-A spec states that in the SP manifest a base address is not
mandatory for memory regions. If the field is not present, the specified
memory region must be allocated by the SPMC and mapped to the SP's
context.

A copy of the SP manifest fdt is used for passing the memory region
virtual addresses to the SP. Additional space is allocated when copying
the fdt so the originally not present base address fields can be added
later.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
[jf: edit description to avoid checkpatch spelling warning]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: sp: map memory regions from SP manifest

Currently the SP manifest processing only handles the device regions,
add support to handle the normal memory regions too.

Note: if the region's base a

core: sp: map memory regions from SP manifest

Currently the SP manifest processing only handles the device regions,
add support to handle the normal memory regions too.

Note: if the region's base address is a PA, according to the FF-A spec
it has to be identity mapped to the same VA. This requirement will be
removed in the spec's next version, so the current implementation should
be acceptable.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

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core: sp: refactor manifest attribute checks

Simplify memory access attribute checks when parsing the SP manifest.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <e

core: sp: refactor manifest attribute checks

Simplify memory access attribute checks when parsing the SP manifest.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

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core: sp: reorganize init functions

Move some of the SP init functions to prepare for the needed order in
the upcoming patches. This change doesn't modify functionality.

Acked-by: Jens Wiklander <j

core: sp: reorganize init functions

Move some of the SP init functions to prepare for the needed order in
the upcoming patches. This change doesn't modify functionality.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

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drivers: se050: scp: add support for more boards

Add the board specific persistent keys required to stablish the SCP03
sessions with the secure element.

See https://www.nxp.com/docs/en/application-

drivers: se050: scp: add support for more boards

Add the board specific persistent keys required to stablish the SCP03
sessions with the secure element.

See https://www.nxp.com/docs/en/application-note/AN12436.pdf

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: pm: sam: clarify that the pm_suspend.S file was relicensed

Clarify that this file was imported from Linux and relicensed to avoid
any licensing issue.

Acked-by: Nicolas Ferre <nicolas.ferr

drivers: pm: sam: clarify that the pm_suspend.S file was relicensed

Clarify that this file was imported from Linux and relicensed to avoid
any licensing issue.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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plat-rockchip: rk3399: set CFG_CRYPTO_WITH_CE ?= y

Enables Arm Cryptography Extensions by default for the rk3399 SoC since
they are supported [1].

Link: [1] http://opensource.rock-chips.com/images/

plat-rockchip: rk3399: set CFG_CRYPTO_WITH_CE ?= y

Enables Arm Cryptography Extensions by default for the rk3399 SoC since
they are supported [1].

Link: [1] http://opensource.rock-chips.com/images/d/d7/Rockchip_RK3399_Datasheet_V2.1-20200323.pdf
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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zynqmp: platform: provide uart configuration during compilation

Add possibility to provide UART configuration as a compile
flag (CFG_UART_BASE, CFG_UART_IT, CFG_UART_CLK_HZ).

Acked-by: Jerome Foris

zynqmp: platform: provide uart configuration during compilation

Add possibility to provide UART configuration as a compile
flag (CFG_UART_BASE, CFG_UART_IT, CFG_UART_CLK_HZ).

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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plat-vexpress: juno: default enable hwrng from smccc trng interface

Changes juno default configuration to get random bytes from TF-A
SMCCC TRNG interface instead of the pseudo-RNG support form OP-TE

plat-vexpress: juno: default enable hwrng from smccc trng interface

Changes juno default configuration to get random bytes from TF-A
SMCCC TRNG interface instead of the pseudo-RNG support form OP-TEE.

Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: smccc_trng: get entropy from secure monitor

Implements random noise generation interface from Arm SMCCC TRNG
specification. Configuration switch CFG_ARM_SMCCC_TRNG must be enabled
to embed

drivers: smccc_trng: get entropy from secure monitor

Implements random noise generation interface from Arm SMCCC TRNG
specification. Configuration switch CFG_ARM_SMCCC_TRNG must be enabled
to embed the RNG driver that use this interface.

When CFG_ARM_SMCCC_TRNG is enable and CFG_WITH_SOFTWARE_PRNG is
disable, use SMCCC TRNG driver as entropy source. When
both CFG_ARM_SMCCC_TRNG and CFG_WITH_SOFTWARE_PRNG are enable, seed
OP-TEE PRNG with 32byte of TRNG entropy.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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