core: SP: Add dump state

Add dump state for SPs. This will make it possible for the symbolize
script to print SP call stack on a panic,

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Acked-by: Jens

core: SP: Add dump state

Add dump state for SPs. This will make it possible for the symbolize
script to print SP call stack on a panic,

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_snvs: fix the is_otpmk_valid() logic

The logic wanted was the inverse of the one implemented.

Fixes: ea4f7ad67d ("drivers: imx_snvs: add master key selection")
Signed-off-by: Franck LE

drivers: imx_snvs: fix the is_otpmk_valid() logic

The logic wanted was the inverse of the one implemented.

Fixes: ea4f7ad67d ("drivers: imx_snvs: add master key selection")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_snvs: fix SNVS register read operation

A coding mistake in the precedence order of C operators is causing
an incorrect read of the SNVS register. This error would return a wrong
board l

drivers: imx_snvs: fix SNVS register read operation

A coding mistake in the precedence order of C operators is causing
an incorrect read of the SNVS register. This error would return a wrong
board lifecycle state by snvs_get_security_cfg().

Fixes: 5cd93c5a ("drivers: imx_snvs: fix SNVS security configuration values")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-k3: Add DDR setup in k3 platform

This patch introduces DDR setup for possible use of
CFG_CORE_DYN_SHM/dynamic shared memory on k3 platform.

Acked-by: Jerome Forissier <jerome.forissier@linaro.

plat-k3: Add DDR setup in k3 platform

This patch introduces DDR setup for possible use of
CFG_CORE_DYN_SHM/dynamic shared memory on k3 platform.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>

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plat-stm32mp1: conf: enable SCMI with MSG header

Changes stm32mp1 platform configuration to default enable
CFG_SCMI_MSG_SHM_MSG and not mandate SMT message header protocol support
when SCMI PTA serv

plat-stm32mp1: conf: enable SCMI with MSG header

Changes stm32mp1 platform configuration to default enable
CFG_SCMI_MSG_SHM_MSG and not mandate SMT message header protocol support
when SCMI PTA service are embedded. The reason is that SCMI client
using threaded execution of SCMI messages, through the SCMI PTA service,
may use TEE shared memory and MSG header to transfer SCMI messages
instead of SMT header messages over IOMEM shared memory.

CFG_SCMI_MSG_SMT must be enabled when using SCMI SIP SMC services which
uses IOMEM shared memory only.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: pta: scmi: new API to support MSG header communication protocol

in the SCMI PTA.
Adds a new capability and a new command to the SCMI PTA API to support
SCMI MSG header communication protocol.

core: pta: scmi: new API to support MSG header communication protocol

in the SCMI PTA.
Adds a new capability and a new command to the SCMI PTA API to support
SCMI MSG header communication protocol. Capability
PTA_SCMI_CAPS_MSG_HEADER allows client and service to negotiate the
desired transport configuration. Command PTA_SCMI_CMD_PROCESS_MSG_CHANNEL
allows client to request processing of a message sent based on that
message exchange protocol where input and output SCMI messages are
exchange using OP-TEE shared memory references provided by the
client.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: add SCMI MSG message protocol

Implements MSG header protocol to handle SCMI messages. MSG header
protocol was introduced in Linux kernel v5.15 [1]. It relies on normal
cached shar

drivers: scmi-msg: add SCMI MSG message protocol

Implements MSG header protocol to handle SCMI messages. MSG header
protocol was introduced in Linux kernel v5.15 [1]. It relies on normal
cached shared memory buffer using a 32bit header followed by the SCMI
message payload.

To support this message interface, the SCMI PTA defines a new capability
and a new command. Capability PTA_SCMI_CAPS_MSG_HEADER allows client and
service to negotiate the desired transport configuration. Command
PTA_SCMI_CMD_PROCESS_MSG_CHANNEL allows client to request processing
of a message sent based on that message exchange protocol.

Platforms shall enable configuration switch CFG_SCMI_MSG_SHM_MSG to have
their SCMI service supporting that communication protocol.

Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f301bba0ca7392d16a6ea4f1d264a91f1fadea1a
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_snvs: use snvs_is_device_closed() for RPMB key status

Call the function snvs_is_device_closed() to know if the platform is
closed or not in plat_rpmb_key_is_ready() instead of reading t

drivers: imx_snvs: use snvs_is_device_closed() for RPMB key status

Call the function snvs_is_device_closed() to know if the platform is
closed or not in plat_rpmb_key_is_ready() instead of reading the
platform security configuration.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: caam: set OTP as master key

Before the CAAM initialization, set the OTP as the SNVS master key
if the device is in closed state.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-

drivers: caam: set OTP as master key

Before the CAAM initialization, set the OTP as the SNVS master key
if the device is in closed state.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat: imx: enable SNVS driver by default

Enable SNVS driver by default for the following platforms:
* imx6
* imx7
* imx8m

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Fo

plat: imx: enable SNVS driver by default

Enable SNVS driver by default for the following platforms:
* imx6
* imx7
* imx8m

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx: force CFG_IMX_UART to y for all imx6/7 and imx8m

Force the CFG_IMX_UART compilation flag to 'y' for all imx6/7 platforms
and imx8m platforms.
CFG_IMX_UART=n is an invalid configuration an

core: imx: force CFG_IMX_UART to y for all imx6/7 and imx8m

Force the CFG_IMX_UART compilation flag to 'y' for all imx6/7 platforms
and imx8m platforms.
CFG_IMX_UART=n is an invalid configuration and triggers a link error:
LD out/arm-plat-imx/core/all_objs.o
arm-none-linux-gnueabihf-ld.bfd: out/arm-plat-imx/core/arch/arm/plat-imx/main.o: in function `console_init'
core/arch/arm/plat-imx/main.c:113: undefined reference to `imx_uart_init'

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_snvs: fix SNVS_SSM_MODE_SECURE value

The value for SNVS_SSM_MODE_SECURE is 15 instead of 14.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.for

drivers: imx_snvs: fix SNVS_SSM_MODE_SECURE value

The value for SNVS_SSM_MODE_SECURE is 15 instead of 14.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_snvs: fix SNVS security configuration values

The SYS_SECURITY_CFG field values of the HPSR register are different on
imx8m platforms. Also, this bit field is 4 bits wide on imx8m platfo

drivers: imx_snvs: fix SNVS security configuration values

The SYS_SECURITY_CFG field values of the HPSR register are different on
imx8m platforms. Also, this bit field is 4 bits wide on imx8m platforms
and 3 bits wide on the imx6/7 platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_snvs: add master key selection

Select the OTPMK as the SNVS master key when the platforms is in closed
state.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Fori

drivers: imx_snvs: add master key selection

Select the OTPMK as the SNVS master key when the platforms is in closed
state.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx8m: add SNVS_SIZE value

Add SNVS_SIZE value for all imx8m platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

plat: imx7: add SNVS_SIZE value

Add SNVS_SIZE value for imx7 platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: imx6: add SNVS_SIZE value

Add SNVS_SIZE for all imx6 platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: drivers: merge i.MX SNVS driver files

Move the implementation of plat_rpmb_key_is_ready() from
plat-imx/drivers/imx_snvs.c to drivers/imx_snvs.c

Signed-off-by: Clement Faure <clement.faure@nx

core: drivers: merge i.MX SNVS driver files

Move the implementation of plat_rpmb_key_is_ready() from
plat-imx/drivers/imx_snvs.c to drivers/imx_snvs.c

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y

Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and
simplify the platforms conf.mk accordingly.

Signed-off-by: Jerome

core: arm.mk: set CFG_ARM32_core=y when CFG_ARM34_core != y

Updates core/arch/arm/arm.mk to assume 32-bit mode when not 64-bit and
simplify the platforms conf.mk accordingly.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y

Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the
common file core/arch/arm/arm.mk instead of leaving it to the platfo

core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y

Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the
common file core/arch/arm/arm.mk instead of leaving it to the platforms.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: SCMI reset domains require rstctrl exclusivity

Changes platform to forbid access to SCMI reset domains for which reset
controller exclusivity was not acquired.

Acked-by: Jens Wikland

plat-stm32mp1: SCMI reset domains require rstctrl exclusivity

Changes platform to forbid access to SCMI reset domains for which reset
controller exclusivity was not acquired.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: provision tee threads when using SCMI

Increase the default number of tee threads provisioned
by OP-TEE. SCMI messages needs a thread context
while xtest requires 2 when pager is enabl

plat-stm32mp1: provision tee threads when using SCMI

Increase the default number of tee threads provisioned
by OP-TEE. SCMI messages needs a thread context
while xtest requires 2 when pager is enabled. Use
higher value when pager is disabled since we have
plenty of secure memory.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: default disable SCMI SiP SMC entry

Default disable CFG_STM32MP1_SCMI_SIP as not used by
current mainline Linux kernel. This also relaxes few
kbytes a internal RAM.

Acked-by: Jens Wik

plat-stm32mp1: default disable SCMI SiP SMC entry

Default disable CFG_STM32MP1_SCMI_SIP as not used by
current mainline Linux kernel. This also relaxes few
kbytes a internal RAM.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-ti: Disable SECURE_DATA_PATH until xtest is fixed

While SDP support is being re-worked disable support by default to
prevent failing test cases. This will be re-enabled when the REE-side
suppor

plat-ti: Disable SECURE_DATA_PATH until xtest is fixed

While SDP support is being re-worked disable support by default to
prevent failing test cases. This will be re-enabled when the REE-side
support is restored.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: Disable SECURE_DATA_PATH until xtest is fixed

While SDP support is being re-worked disable support by default to
prevent failing test cases. This will be re-enabled when the REE-side
suppor

plat-k3: Disable SECURE_DATA_PATH until xtest is fixed

While SDP support is being re-worked disable support by default to
prevent failing test cases. This will be re-enabled when the REE-side
support is restored.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

show more ...