History log of /optee_os/core/ (Results 1226 – 1250 of 6495)
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b51aaa6205-Jan-2024 Clement Faure <clement.faure@nxp.com>

core: arm: fix dead code when ARM32 is not defined

Remove dead code warning when ARM32=n.
When ARM32=n, ret is always equal to TEE_ERROR_NOT_SUPPORTED. It makes
the following if() else if () useless

core: arm: fix dead code when ARM32 is not defined

Remove dead code warning when ARM32=n.
When ARM32=n, ret is always equal to TEE_ERROR_NOT_SUPPORTED. It makes
the following if() else if () useless.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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e33c3ff505-Jan-2024 Clement Faure <clement.faure@nxp.com>

core: kernel: check device tree property pointer

Assert `prop` pointer before using it in fdt32_to_cpu().

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.

core: kernel: check device tree property pointer

Assert `prop` pointer before using it in fdt32_to_cpu().

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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5ca2c36510-Jan-2024 Clement Faure <clement.faure@nxp.com>

core: remove unnecessary includes

Remove unnecessary includes.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander

core: remove unnecessary includes

Remove unnecessary includes.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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34d6dc2b10-Jan-2024 Clement Faure <clement.faure@nxp.com>

plat-vexpress: remove unnecessary includes

Remove unnecessary includes.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens

plat-vexpress: remove unnecessary includes

Remove unnecessary includes.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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c344db9810-Jan-2024 Alvin Chang <alvinga@andestech.com>

riscv: mm: Set A/D bits of PTE(page table entry) by default

According to RISC-V privileged ISA manual:
Each leaf PTE contains an accessed (A) and dirty (D) bit. The A bit
indicates the virtual page

riscv: mm: Set A/D bits of PTE(page table entry) by default

According to RISC-V privileged ISA manual:
Each leaf PTE contains an accessed (A) and dirty (D) bit. The A bit
indicates the virtual page has been read, written, or fetched from since
the last time the A bit was cleared. The D bit indicates the virtual
page has been written since the last time the D bit was cleared.
When a virtual page is accessed and the A bit is clear, or is written
and the D bit is clear, a page-fault exception is raised.

And the manual also suggests:
If the supervisor software does not rely on accessed and/or dirty bits,
it should always set them to 1 in the PTE to improve performance.

Since OP-TEE does not rely on A/D bits, we by default set them to 1 to
avoid unnecessary page-fault exceptions when OP-TEE touches those pages.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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472c70be15-Jan-2024 Alvin Chang <alvinga@andestech.com>

core: riscv: Rename thread_return_to_ree() to thread_return_to_udomain()

The terminology "udomain", which means untrusted domain, is more precise
terminology for RISC-V architecture, where "domain"

core: riscv: Rename thread_return_to_ree() to thread_return_to_udomain()

The terminology "udomain", which means untrusted domain, is more precise
terminology for RISC-V architecture, where "domain" has already been
defined in RISC-V CoVE and Smmtt specifications.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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655625e016-Jan-2024 Imre Kis <imre.kis@arm.com>

core: ffa: Read FF-A version from the SP manifest

Read the SP's FF-A version from the ffa-version property of the SP
manifest. This property is mandatory according to the FF-A
specification.
SPs are

core: ffa: Read FF-A version from the SP manifest

Read the SP's FF-A version from the ffa-version property of the SP
manifest. This property is mandatory according to the FF-A
specification.
SPs are still able to do runtime version negotiation via the FFA_VERSION
interface.

Signed-off-by: Imre Kis <imre.kis@arm.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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602ff4f611-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

pta: scmi: remove noisy info level message on message process

Remove useless trace message emitted each time SCP-firmware
successfully processes an SCMI message.

Reviewed-by: Jens Wiklander <jens.w

pta: scmi: remove noisy info level message on message process

Remove useless trace message emitted each time SCP-firmware
successfully processes an SCMI message.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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3f7122d915-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: scmi_msg: fix size_t trace format

Fix format specifier for size_t type argument.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@f

drivers: scmi_msg: fix size_t trace format

Fix format specifier for size_t type argument.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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37fbce0112-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_i2c: fix header file inclusion order

Fix the order of header file inclusions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carrier

drivers: stm32_i2c: fix header file inclusion order

Fix the order of header file inclusions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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5395fe8911-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: i2c: add missing __unused in stubbed function

Fix statc inline stub implementation of i2c_dt_get_dev() that
lacks a __unused attribute on an unused argument.

Fixes: b357d34fe91f ("core: dt

drivers: i2c: add missing __unused in stubbed function

Fix statc inline stub implementation of i2c_dt_get_dev() that
lacks a __unused attribute on an unused argument.

Fixes: b357d34fe91f ("core: dt_driver: swap TEE_result and retrieved device reference")
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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8a6ca14820-Oct-2023 Etienne Carriere <etienne.carriere@foss.st.com>

core: arm: get DDR range from embedded DTB

Find main memory (DDR) physical range(s) from the secure embedded DTB
if not found from the external DDR.

Reviewed-by: Jens Wiklander <jens.wiklander@lina

core: arm: get DDR range from embedded DTB

Find main memory (DDR) physical range(s) from the secure embedded DTB
if not found from the external DDR.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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c425380f17-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

driver: i2c: stm32_i2c: fix call to stm32_i2c_init()

Fix call to stm32_i2c_init() that returns an int value, not a TEE_Result
code.

Fixes: 5bc9f8e5618b ("drivers: stm32_i2c: register a DT_DRIVER_I2

driver: i2c: stm32_i2c: fix call to stm32_i2c_init()

Fix call to stm32_i2c_init() that returns an int value, not a TEE_Result
code.

Fixes: 5bc9f8e5618b ("drivers: stm32_i2c: register a DT_DRIVER_I2C driver")
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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2b9d766116-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_i2c: apply pinctrl config at init

Add missing load of stm32_i2c pinctrl state at driver init.

Fixes: 73ba32eb0f6c ("drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL")
Reviewed-by: Gat

drivers: stm32_i2c: apply pinctrl config at init

Add missing load of stm32_i2c pinctrl state at driver init.

Fixes: 73ba32eb0f6c ("drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL")
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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87aead6f16-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_i2c: analog filter config cannot fail

Local function i2c_config_analog_filter() cannot failed. Remove
useless test on bus state and useless return value.

Reviewed-by: Gatien Chevalli

drivers: stm32_i2c: analog filter config cannot fail

Local function i2c_config_analog_filter() cannot failed. Remove
useless test on bus state and useless return value.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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29b4cb6e17-Jan-2024 Sahil Malhotra <sahil.malhotra@nxp.com>

core: imx: disable ELE support on imx8ulp, imx93 by default

On imx8ulp and imx93, there is only one MU to communicate with
ELE, which cannot be dedicated on OP-TEE side all the time.
There may be EL

core: imx: disable ELE support on imx8ulp, imx93 by default

On imx8ulp and imx93, there is only one MU to communicate with
ELE, which cannot be dedicated on OP-TEE side all the time.
There may be ELE services running on Linux side, which can
cause conflict with OP-TEE.
So disablig ELE by default for now.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Clement Faure <clement.faure@nxp.com>

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5d3112cb16-Jan-2024 Volodymyr Babchuk <volodymyr_babchuk@epam.com>

plat: rcar-gen3: disable HWRNG by default

Sometimes ROM code fails to provide random numbers, which leads to
OP-TEE panic with "ROM_GetRndVector() returned error!" message.

So far this behavior was

plat: rcar-gen3: disable HWRNG by default

Sometimes ROM code fails to provide random numbers, which leads to
OP-TEE panic with "ROM_GetRndVector() returned error!" message.

So far this behavior was observed only on M3 Ver.3.0, but it is
unclear if other SoCs are affected. There is a workaround which
retries and operation and this workaround seems to work, but again, it
is unclear if this is the correct way to deal with the issue. So it is
better to disable use of HWRNG by default, until we get clarification
on those errors from Renesas.

This patch moves HWRNG code under CFG_RCAR_GEN3_HWRNG option, so
expert user still can try to use it.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ec0d74f216-Jan-2024 Volodymyr Babchuk <volodymyr_babchuk@epam.com>

plat-rcar: romapi: retry call to ROM_GetRndVector

Sometimes ROM_GetRndVector() function returns an error, which causes
OP-TEE panic down the call path, as OP-TEE can't handle errors from
the hardwar

plat-rcar: romapi: retry call to ROM_GetRndVector

Sometimes ROM_GetRndVector() function returns an error, which causes
OP-TEE panic down the call path, as OP-TEE can't handle errors from
the hardware random number generator. As a workaround, we can try to
repeat call to the ROM_GetRndVector() because it succeeds on the next
try.

Anyways, this hardly can be considered as a normal behavior so it is
better to disable HW RNG by default, which will be done in a separate
patch.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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a040ef6e17-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: fix misnamed 157C_EV1_SCMI flavor

Correct platform flavor name 157C_EV1_SCMI, not 157F_EV1_SCMI.

Fixes: 36f1fd6d4930 ("dts: add stm32mp15*-scmi.dts files for when RCC is secure")
Ack

plat-stm32mp1: fix misnamed 157C_EV1_SCMI flavor

Correct platform flavor name 157C_EV1_SCMI, not 157F_EV1_SCMI.

Fixes: 36f1fd6d4930 ("dts: add stm32mp15*-scmi.dts files for when RCC is secure")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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5c4a6d1b11-Jan-2024 Andrew Davis <afd@ti.com>

plat-k3: sa2ul_rng: Use mutex instead of spinlock for critical section

While spinlock are slightly more lightweight, they currently require that
interrupts are disabled during the critical section.

plat-k3: sa2ul_rng: Use mutex instead of spinlock for critical section

While spinlock are slightly more lightweight, they currently require that
interrupts are disabled during the critical section. If this section is
long enough it can have a negative affect on realtime sensitive tasks
that require deterministic preemption.

As our RNG gathering can loop while waiting for new random numbers to
become available we cannot know how long this section will take, so we
should use a mutex. Do that here.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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8e9d8acc09-Jan-2024 Jens Wiklander <jens.wiklander@linaro.org>

plat-vexpress: configure CFG_CORE_ASYNC_NOTIF_GIC_INTID

When compiled for SPMC at S-EL1 (CFG_CORE_SEL1_SPMC=y), configure
CFG_CORE_ASYNC_NOTIF_GIC_INTID to an unused secure SGI that can be
donated t

plat-vexpress: configure CFG_CORE_ASYNC_NOTIF_GIC_INTID

When compiled for SPMC at S-EL1 (CFG_CORE_SEL1_SPMC=y), configure
CFG_CORE_ASYNC_NOTIF_GIC_INTID to an unused secure SGI that can be
donated to the normal world.

In boot_primary_init_intc(), only donate the interrupt id if it's in the
predefined secure SGI range.

Fixes: 462028ede02d ("qemu_armv8a: add GIC v3 redistributor base address")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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7313a9ba09-Jan-2024 Jens Wiklander <jens.wiklander@linaro.org>

plat-vexpress: fvp: configure GIC redistributor base address

Configure GIC redistributor base address needed with GICv3.

Fixes: 462028ede02d ("qemu_armv8a: add GIC v3 redistributor base address")
S

plat-vexpress: fvp: configure GIC redistributor base address

Configure GIC redistributor base address needed with GICv3.

Fixes: 462028ede02d ("qemu_armv8a: add GIC v3 redistributor base address")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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a3d550e610-Jan-2024 Jens Wiklander <jens.wiklander@linaro.org>

core: arm: ffa: optionally use CFG_CORE_ASYNC_NOTIF_GIC_INTID

Allow an FF-A configuration to optionally use
CFG_CORE_ASYNC_NOTIF_GIC_INTID to configure the interrupt used to notify
the normal world

core: arm: ffa: optionally use CFG_CORE_ASYNC_NOTIF_GIC_INTID

Allow an FF-A configuration to optionally use
CFG_CORE_ASYNC_NOTIF_GIC_INTID to configure the interrupt used to notify
the normal world that there are pending notifications. For FF-A
CFG_CORE_ASYNC_NOTIF_GIC_INTID is only dealt with in platform code so
relax the static assert about interrupt IDs in (the unused)
add_optee_dt_node().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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2afd9b1527-Mar-2023 Clément Léger <clement.leger@bootlin.com>

plat-sam: enable nvmem support

Enable nvmem support to allow reading hardware unique key from the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thoma

plat-sam: enable nvmem support

Enable nvmem support to allow reading hardware unique key from the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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2466ab4927-Mar-2023 Clément Léger <clement.leger@bootlin.com>

dts: sama5d2: add sfc node for the secure fuse controller

Add the definition of the atmel_sfc controller in the sama5d2 device-tree.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-

dts: sama5d2: add sfc node for the secure fuse controller

Add the definition of the atmel_sfc controller in the sama5d2 device-tree.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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