drivers: caam: fix DSA_DUMPDESC macro

Fix typo in DSA_DUMPDESC and replace MP_TRACE with DSA_TRACE.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier

drivers: caam: fix DSA_DUMPDESC macro

Fix typo in DSA_DUMPDESC and replace MP_TRACE with DSA_TRACE.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: caam: add missing header

Add missing caam_status.h include.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

drivers: caam: add class field to FIFO_ST macro

Add class field to FIFO_ST macro and update existing
usage of FIFO_ST with required CLASS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Sig

drivers: caam: add class field to FIFO_ST macro

Add class field to FIFO_ST macro and update existing
usage of FIFO_ST with required CLASS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: move CFG_CORE_BIGNUM_MAX_BITS default definition

Move CFG_CORE_BIGNUM_MAX_BITS definition to mk/crypto.mk to allow crypto
drivers to override the default value.

Signed-off-by: Clement Faure <

core: move CFG_CORE_BIGNUM_MAX_BITS default definition

Move CFG_CORE_BIGNUM_MAX_BITS definition to mk/crypto.mk to allow crypto
drivers to override the default value.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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dts: stm32: add RIFSC compatible to RIFSC node in stm32mp251.dtsi

Add the compatible to allow a match between the driver and the node.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.co

dts: stm32: add RIFSC compatible to RIFSC node in stm32mp251.dtsi

Add the compatible to allow a match between the driver and the node.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: Add RIFSC configuration support for stm32mp257f-ev1

Defines RIFSC configuration for stm32mp257f-ev1 board.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by:

dts: stm32: Add RIFSC configuration support for stm32mp257f-ev1

Defines RIFSC configuration for stm32mp257f-ev1 board.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp2: conf: enable RIFSC driver

Enable the RIFSC driver for STM32MP2x platforms

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carr

plat-stm32mp2: conf: enable RIFSC driver

Enable the RIFSC driver for STM32MP2x platforms

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add RIFSC to default bindings config for STM32MP25

The RIFSC header is now part of default bindings header file for
STM32MP25.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.

dt-bindings: add RIFSC to default bindings config for STM32MP25

The RIFSC header is now part of default bindings header file for
STM32MP25.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add RIFSC bindings

Add bindings for the RIFSC configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.co

dt-bindings: add RIFSC bindings

Add bindings for the RIFSC configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: add stm32 RIFSC support

Add the RIFSC new driver support.

RIFSC (RIF Security Controller) is responsible for the isolation
of hardware resources like memory or peripherals. It is composed

drivers: add stm32 RIFSC support

Add the RIFSC new driver support.

RIFSC (RIF Security Controller) is responsible for the isolation
of hardware resources like memory or peripherals. It is composed of:

-RISC registers(slave peripherals) with RISUP(Resource Isolation
Slave Unit for Peripherals) OR RISAL(Resource Isolation Slave Unit
for Address space - Lite) logics.
-RIMC registers(Non RIF-Aware masters counterpart) with RIMU
(Resource Isolation Master Unit) logic. It is possible for a master to
inherit from its slave port(RISUP) configuration.

This driver parses the RIFSC device tree configuration and applies
it to put the firewall in place. Therefore, the device tree is
mandatory.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp2: conf: support RIF driver

Default enable RIF driver for STM32MP2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.car

plat-stm32mp2: conf: support RIF driver

Default enable RIF driver for STM32MP2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add RIF to default bindings config for stm32mp25

Add a list of default bindings for STM32MP25 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: E

dt-bindings: add RIF to default bindings config for stm32mp25

Add a list of default bindings for STM32MP25 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: firewall: add RIF bindings

Add defines for Resource Isolation Framework (RIF) sub-system
configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Et

dt-bindings: firewall: add RIF bindings

Add defines for Resource Isolation Framework (RIF) sub-system
configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: firewall: add stm32_rif driver for common RIF features

The resource isolation framework (RIF) is a comprehensive set of
hardware blocks designed to enforce and manage the isolation of
STM32

drivers: firewall: add stm32_rif driver for common RIF features

The resource isolation framework (RIF) is a comprehensive set of
hardware blocks designed to enforce and manage the isolation of
STM32MP25xx hardware resources, like memories and peripherals.

The RIF manages security and privilege levels as well as compartment
filtering. Each compartment is identified by a Compartment ID (CID).

Therefore, the access filtering can be, depending on the case:
• restricted to none, one or more than one CID
• secure-only, non-secure only, or both
• privileged-only or privileged/unprivileged
• read-only, write-only, or read/write

Add a firewall driver folder that contains firewall drivers.
This RIF driver contains generic features shared between all drivers
managing RIF configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: io: fix IO_READ32_POLL_TIMEOUT() when delay is 0us

Fix detection of timeout condition in IO_READ32_POLL_TIMEOUT() that was
never triggered when delay argument is 0us. Indeed 0 is not a useful

core: io: fix IO_READ32_POLL_TIMEOUT() when delay is 0us

Fix detection of timeout condition in IO_READ32_POLL_TIMEOUT() that was
never triggered when delay argument is 0us. Indeed 0 is not a useful
increment value for a timeout counter.

Fixes: 97ea199a2ae8 ("core: io: IO_READ32_POLL_TIMEOUT()")
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: default enable SAES software fallback

Default enable SAES software fallback for 192bit keys support.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne

plat-stm32mp1: default enable SAES software fallback

Default enable SAES software fallback for 192bit keys support.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32_saes: fallback to software on 192bit AES keys

Implement AES software operation for 192 bits keys as these are not
supported by the STM32 SAES peripheral. For that purpose ciph

drivers: crypto: stm32_saes: fallback to software on 192bit AES keys

Implement AES software operation for 192 bits keys as these are not
supported by the STM32 SAES peripheral. For that purpose ciphering final,
context copy and context freeing operations common functions are split
into CRYP/SAES peripheral specific functions.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: cleanup cipher operation structure

Move cryp_ops definition in the source file to have it defined right
next to the CRYP ciphering operation handlers.

Add missing static key

drivers: crypto: stm32: cleanup cipher operation structure

Move cryp_ops definition in the source file to have it defined right
next to the CRYP ciphering operation handlers.

Add missing static keyword in CRYP and SAES operation handlers
structures that are local to the source file.

No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: move context allocation/free functions

Move cipher context allocation and free functions to place them
next to each other for CRYP and SAES support to ease their maintenance

drivers: crypto: stm32: move context allocation/free functions

Move cipher context allocation and free functions to place them
next to each other for CRYP and SAES support to ease their maintenance
as the context free sequence is the counter part of the context
allocation sequence. No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: clean function references

Remove useless & operator in function references of stm32 crypto drivers.
No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss

drivers: crypto: stm32: clean function references

Remove useless & operator in function references of stm32 crypto drivers.
No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-hikey: Replace register_dynamic_shm() with register_ddr()

Use register_ddr() instead of register_dynamic_shm() that is
deprecated.

Signed-off-by: Wen Bin <a1231512a@163.com>
Acked-by: Jens Wik

plat-hikey: Replace register_dynamic_shm() with register_ddr()

Use register_ddr() instead of register_dynamic_shm() that is
deprecated.

Signed-off-by: Wen Bin <a1231512a@163.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-hikey: make DRAM1_BASE configurable

This commit introduces the CFG_DRAM1_BASE configuration switch
in the plat-hikey platform.

Signed-off-by: Wen Bin <a1231512a@163.com>
Acked-by: Etienne Carr

plat-hikey: make DRAM1_BASE configurable

This commit introduces the CFG_DRAM1_BASE configuration switch
in the plat-hikey platform.

Signed-off-by: Wen Bin <a1231512a@163.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: clk: sam: update to support slow clock for sama7g5

Add CLK_DT_DECLARE for sama7g5's slow clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissie

drivers: clk: sam: update to support slow clock for sama7g5

Add CLK_DT_DECLARE for sama7g5's slow clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add PMC definitions for sama7g5

Add PMC definitions to "at91_pmc.h" for sama7g5.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@lin

drivers: clk: sam: add PMC definitions for sama7g5

Add PMC definitions to "at91_pmc.h" for sama7g5.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add UTMI clocks for sama7g5 USB PHY

Add functions for configuring UTMI clocks for sama7g5 USB PHY.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <je

drivers: clk: sam: add UTMI clocks for sama7g5 USB PHY

Add functions for configuring UTMI clocks for sama7g5 USB PHY.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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