| 90c16066 | 15-Aug-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename to core_mmu_init_phys_mem()
Rename core_mmu_init_ta_ram() to core_mmu_init_phys_mem() for a more accurate name of the function.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org
core: rename to core_mmu_init_phys_mem()
Rename core_mmu_init_ta_ram() to core_mmu_init_phys_mem() for a more accurate name of the function.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| de19cacb | 08-May-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: replace tee_mm_sec_ddr with phys_mem functions
Replace the tee_mm_sec_ddr mm pool with the phys_mem functions. This doesn't change the behaviour.
Signed-off-by: Jens Wiklander <jens.wiklander
core: replace tee_mm_sec_ddr with phys_mem functions
Replace the tee_mm_sec_ddr mm pool with the phys_mem functions. This doesn't change the behaviour.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| c596d835 | 26-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add phys_mem allocation functions
Add nex_phys_mem and phys_mem allocation functions. These functions are intended to replace the previous calls to tee_mm functions on with the virt_mapper_poo
core: add phys_mem allocation functions
Add nex_phys_mem and phys_mem allocation functions. These functions are intended to replace the previous calls to tee_mm functions on with the virt_mapper_pool or tee_mm_sec_ddr as arguments.
The pool of physical memory is divided into two parts, core and ta. All physical TA memory allocations are done from the core pool if a ta pool isn't added. This might be the case if core and ta physical memory resides in the same physical memory range.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 10b19e73 | 09-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: add core_mmu_for_each_map()
Add core_mmu_for_each_map() to iterate over all memory regions, struct tee_mmap_region.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by:
core: mm: add core_mmu_for_each_map()
Add core_mmu_for_each_map() to iterate over all memory regions, struct tee_mmap_region.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e53d1206 | 16-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add_phys_mem(): fix mergeable physical memory
The test in add_phys_mem() to see if two physical memory ranges can be merged only checks for overlapping memory ranges, but consecutive ranges ar
core: add_phys_mem(): fix mergeable physical memory
The test in add_phys_mem() to see if two physical memory ranges can be merged only checks for overlapping memory ranges, but consecutive ranges are not detected even if they can be merged. Fix this by also checking if the byte after the lowest range matches the beginning of the next range.
The resulting merged entry might be mergeable with the previous or next entry, so add checks for that and merge if possible.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| b8ef8d0b | 08-May-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: introduce struct memory_map
Introduce struct memory_map to keep track of the array of struct tee_mmap_region, covering number of used entries and number of allocated entries.
core_mmap_is
core: mm: introduce struct memory_map
Introduce struct memory_map to keep track of the array of struct tee_mmap_region, covering number of used entries and number of allocated entries.
core_mmap_is_end_of_table() and MEM_AREA_END are now unused so remove them.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e7f046f3 | 09-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mobj_phys_alloc(): remove unused memory types
In mobj_phys_alloc() remove support for the two unused memory types CORE_MEM_TEE_RAM and CORE_MEM_TA_RAM.
Signed-off-by: Jens Wiklander <jens.wik
core: mobj_phys_alloc(): remove unused memory types
In mobj_phys_alloc() remove support for the two unused memory types CORE_MEM_TEE_RAM and CORE_MEM_TA_RAM.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8c95493b | 08-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove unused mobj_sec_ddr
Remove the unused global variable mobj_sec_ddr.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.co
core: remove unused mobj_sec_ddr
Remove the unused global variable mobj_sec_ddr.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bfb714a2 | 10-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mm: ensure all pager VA space is mapped with small pages
Fix can_map_at_level() to ensure all memory areas related the pager pageable virtual memory are mapped with small pages. This change fi
core: mm: ensure all pager VA space is mapped with small pages
Fix can_map_at_level() to ensure all memory areas related the pager pageable virtual memory are mapped with small pages. This change fixes an issue found when the pager physical RAM ends on a section boundary (e.g. 512MB or 2MB on LPAE case) making the virtual memory mapping above that boundary to be prepared with pgdir or wider MMU tables while pager implementation expects 4kB page MMU tables.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ac5bf9ba | 09-Jul-2024 |
wentao.sun <wentao.sun@amlogic.com> |
core: mm: strip the tag of VA when check_pa_matches_va
When CFG_TEE_CORE_DEBUG=y and CFG_MEMTAG=y, core will crash, if there are some modules call virt_to_phys() or core_vbuf_is() and so on. Because
core: mm: strip the tag of VA when check_pa_matches_va
When CFG_TEE_CORE_DEBUG=y and CFG_MEMTAG=y, core will crash, if there are some modules call virt_to_phys() or core_vbuf_is() and so on. Because the MM can not find map by the tagged VA, so strip the tag of VA when check_pa_matches_va().
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: wentao.sun <wentao.sun@amlogic.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 7cc4ae7c | 26-Jun-2024 |
Yu Chien Peter Lin <peterlin@andestech.com> |
core: mm: core_mmu: skip unmapped regions when searching by PA
Currently, OP-TEE OS on RISC-V platforms uses the external device-tree located at 'Domain1 Next Arg1' passed by previous boot stages (i
core: mm: core_mmu: skip unmapped regions when searching by PA
Currently, OP-TEE OS on RISC-V platforms uses the external device-tree located at 'Domain1 Next Arg1' passed by previous boot stages (i.e. U-Boot SPL and OpenSBI). For example:
Domain1 Name : trusted-domain ... Domain1 Next Address : 0x0000000010000000 // OP-TEE OS > Domain1 Next Arg1 : 0x000000000187f760 // device-tree Domain1 Next Mode : S-mode
In this case, 0x0187f760 lies in SHM_VASPACE, which is not yet mapped and not intended to load an external DT:
type TEE_RAM_RX va 0x10000000..0x10092fff pa 0x10000000..0x10092fff type TEE_RAM_RW va 0x10093000..0x101fffff pa 0x10093000..0x101fffff type RES_VASPACE va 0x10200000..0x10bfffff pa 0x00000000..0x009fffff > type SHM_VASPACE va 0x10c00000..0x12bfffff pa 0x00000000..0x01ffffff type TA_RAM va 0x12c00000..0x139fffff pa 0x10200000..0x10ffffff type IO_SEC va 0x13a00000..0x13bfffff pa 0xf0200000..0xf03fffff
To address this issue, add a memory region attribute check to skip such regions. In this way, when init_external_dt() calls core_mmu_get_type_by_pa(), it can properly return MEM_AREA_MAXTYPE (i.e. valid region not found) and map a MEM_AREA_EXT_DT region.
Note that this bug cannot be reproduced on QEMU virt machine, as its memory regions have no overlapping with the external DT.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f15052a2 | 21-Jun-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mm: add CFG_PGT_CACHE_ENTRIES
Add CFG_PGT_CACHE_ENTRIES to allow platforms to customize the page table cache size. This is needed for example when a platform is to support very large TAs of se
core: mm: add CFG_PGT_CACHE_ENTRIES
Add CFG_PGT_CACHE_ENTRIES to allow platforms to customize the page table cache size. This is needed for example when a platform is to support very large TAs of several dozen of Mbytes of private memory (code/data).
Move PGT_CACHE_SIZE macro definition from pgt_cache.h to pgt_cache.c since it is used only in that source file.
By the way, fix pgt_cache.h layout to have header files includes first followed by macro definitions.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fdf696b7 | 12-Jun-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename tee_mm_shm to core_virt_shm_pool
Rename tee_mm_shm to core_virt_shm_pool to make it clear that it handles virtual memory allocations for shared memory.
Signed-off-by: Jens Wiklander <j
core: rename tee_mm_shm to core_virt_shm_pool
Rename tee_mm_shm to core_virt_shm_pool to make it clear that it handles virtual memory allocations for shared memory.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9b0ee59d | 12-Jun-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename tee_mm_vcore to core_virt_mem_pool
Rename tee_mm_vcore to core_virt_mem_pool to make it clear that it handles virtual memory allocations.
Signed-off-by: Jens Wiklander <jens.wiklander@
core: rename tee_mm_vcore to core_virt_mem_pool
Rename tee_mm_vcore to core_virt_mem_pool to make it clear that it handles virtual memory allocations.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 99e1ad26 | 12-Jun-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: move tee_mm_{sec_ddr,vcore,shm}
Move tee_mm_sec_ddr, tee_mm_vcore, and tee_mm_shm into core/mm/core_mmu.c.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Foriss
core: move tee_mm_{sec_ddr,vcore,shm}
Move tee_mm_sec_ddr, tee_mm_vcore, and tee_mm_shm into core/mm/core_mmu.c.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e92be0c6 | 23-Feb-2024 |
Alvin Chang <alvinga@andestech.com> |
core: mm: move mobj_dyn_shm.c to mm
To enable RISC-V platforms to utilize dynamic shared memory, relocate the non-architecture-specific mobj_dyn_shm.c to the mm directory.
Signed-off-by: Alvin Chan
core: mm: move mobj_dyn_shm.c to mm
To enable RISC-V platforms to utilize dynamic shared memory, relocate the non-architecture-specific mobj_dyn_shm.c to the mm directory.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| d20a1d40 | 30-Apr-2024 |
Sungbae Yoo <sungbaey@nvidia.com> |
core: mmu: fix memory regions found from ff-a manifest
Fix the 6th parameter of add_phys_mem() in collect_device_mem_ranges() that has to be the size of memory region and not the end address of the
core: mmu: fix memory regions found from ff-a manifest
Fix the 6th parameter of add_phys_mem() in collect_device_mem_ranges() that has to be the size of memory region and not the end address of the region.
Fixes: 72a6827a6353 ("core: arm: SPMC obtain device memory info from DTB") Signed-off-by: Sungbae Yoo <sungbaey@nvidia.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a2c1c8e4 | 20-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
core: mmu: add MEM_AREA_ROM_SEC in check_mem_map()
Handle MEM_AREA_ROM_SEC in check_mem_map() switch case to prevent OP-TEE core from panicking when such area is mapped.
Fixes: fc7e0cc38b99 ("core:
core: mmu: add MEM_AREA_ROM_SEC in check_mem_map()
Handle MEM_AREA_ROM_SEC in check_mem_map() switch case to prevent OP-TEE core from panicking when such area is mapped.
Fixes: fc7e0cc38b99 ("core: MEM_AREA_ROM_SEC maps secure read only cached memory") Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ba4f5940 | 12-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add is_nexus() and refactor is_unpaged()
Add the function is_nexus() to tell if an address is an address available to the nexus when non-secure virtualization is enabled (CFG_NS_VIRTUALIZATION
core: add is_nexus() and refactor is_unpaged()
Add the function is_nexus() to tell if an address is an address available to the nexus when non-secure virtualization is enabled (CFG_NS_VIRTUALIZATION=y). The function is stubbed to return true for non-null arguments if non-secure virtualization isn't enabled, else false.
Make the argument for is_unpaged() const void * for consistency with the is_nexus() function. The stubbed version of is_unpaged() when paging isn't enabled is updated to perform a NULL check on the argument.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 8f3afe0e | 05-Jan-2024 |
Clement Faure <clement.faure@nxp.com> |
core: mmu: assert pointer to manifest device tree
Assert pointer to manifest device tree before using it in fdt_node_offset_by_compatible().
Signed-off-by: Clement Faure <clement.faure@nxp.com> Rev
core: mmu: assert pointer to manifest device tree
Assert pointer to manifest device tree before using it in fdt_node_offset_by_compatible().
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 5ca2c365 | 10-Jan-2024 |
Clement Faure <clement.faure@nxp.com> |
core: remove unnecessary includes
Remove unnecessary includes.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander
core: remove unnecessary includes
Remove unnecessary includes.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a05577ea | 23-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
tree wide: clarify PTA ABI
Explicitly describe the statistics PTA ABI using dedicated inline comments and moving struct pta_stats_ta and struct pta_stats_alloc from respectively tee_ta_manager.c and
tree wide: clarify PTA ABI
Explicitly describe the statistics PTA ABI using dedicated inline comments and moving struct pta_stats_ta and struct pta_stats_alloc from respectively tee_ta_manager.c and malloc.h to pta_stats.h header file.
For that purpose, define ALLOC_ID_* macros to identify each allocator one can query information from through the statistics PTA API.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2617f49f | 22-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
tree wide: rename struct malloc_stats
Rename struct malloc_stats to struct pta_stats_alloc to prepare the creation of pta_stats.h header file that will define the whole statistics PTA API and ABI, l
tree wide: rename struct malloc_stats
Rename struct malloc_stats to struct pta_stats_alloc to prepare the creation of pta_stats.h header file that will define the whole statistics PTA API and ABI, located in libutee/include/ as already done for all other PTAs.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| cbaf4c83 | 20-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mmu: fix nsec ddr discovery regarding MEM_AREA_RAM_NSEC
Memory registered as MEM_AREA_RAM_NSEC can be part of the non-secure shared memory. This change fixes core_mmu_set_discovered_nsec_ddr()
core: mmu: fix nsec ddr discovery regarding MEM_AREA_RAM_NSEC
Memory registered as MEM_AREA_RAM_NSEC can be part of the non-secure shared memory. This change fixes core_mmu_set_discovered_nsec_ddr() to not check such memory area do not overlap with non-secure RAM. This is no issue physical pages from MEM_AREA_RAM_NSEC memory are also handled and mapped as dynamic non-secure memory by OP-TEE.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ffeb2994 | 20-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mm: use MEM_AREA_END to detect mapping area end
Change verify_special_mem_areas() prototype to remove the 'len' argument that is useless since end of the static mapping areas array is already
core: mm: use MEM_AREA_END to detect mapping area end
Change verify_special_mem_areas() prototype to remove the 'len' argument that is useless since end of the static mapping areas array is already defined by a MEM_AREA_END cell.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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