| 7222fc6a | 06-Aug-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
core: driver: generic resources for crypto device driver
Add a generic cryptographic driver interface connecting TEE Crypto generic APIs to HW driver interface
The Generic Crypto Driver interface i
core: driver: generic resources for crypto device driver
Add a generic cryptographic driver interface connecting TEE Crypto generic APIs to HW driver interface
The Generic Crypto Driver interface in the core/driver/crypto/crypto_api is implemented to be able to use a HW driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| f1c2959f | 12-Aug-2019 |
Clement Faure <clement.faure@nxp.com> |
core: imx: add device tree support for uart
Allow driver to read device tree to enable uart.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@lin
core: imx: add device tree support for uart
Allow driver to read device tree to enable uart.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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| 922308b3 | 11-Dec-2017 |
Peng Fan <peng.fan@nxp.com> |
drivers: imx_wdog: update wdog support for mx7ulp
Update watchdog for imx7ulp SoC support.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 601976a5 | 11-Dec-2017 |
Peng Fan <peng.fan@nxp.com> |
drivers: imx_lpuart: add i.MX lpuart driver
add new lpuart driver This driver is used by the i.MX 7ulp SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@li
drivers: imx_lpuart: add i.MX lpuart driver
add new lpuart driver This driver is used by the i.MX 7ulp SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| cbb41c91 | 30-May-2019 |
Abhishek Shah <abhishek.shah@broadcom.com> |
drivers: wdt: Add arm SP805 watchdog driver
Add sp805 watchdog driver with following functionality: - start/reload watchdog with specified timeout - stop watchdog - ping watchdog (clear watchdog int
drivers: wdt: Add arm SP805 watchdog driver
Add sp805 watchdog driver with following functionality: - start/reload watchdog with specified timeout - stop watchdog - ping watchdog (clear watchdog interrupt and reload it) - register watchdog interrupt handler
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com> Reviewed-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| eb5d5313 | 27-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers/stpmic1: unpaged low power sequence
STPMIC1 is used by the secure world to driver the system low power sequences. Since these sequences are executed in unpaged context, the driver gets the c
drivers/stpmic1: unpaged low power sequence
STPMIC1 is used by the secure world to driver the system low power sequences. Since these sequences are executed in unpaged context, the driver gets the configuration from the DTB during the initialization and provides optimized functions to load target configuration at runtime.
This change makes STPMIC1 driver to call the memory footprint optimized function stm32_i2c_read_write_membyte() for I2C transfer instead of generic stm32_i2c_mem_read()/stm32_i2c_mem_write(). This is more suitable to OP-TEE pager constraints on the platform.
This changes removes now unused STPMIC1_I2C_TIMEOUT_US.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c7cf2933 | 06-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
core: introduce STPMIC1 driver
STPMIC1 is a power management chip for the stm32mp1 platform. It is accessed through an I2C bus. STPMIC1 provides regulators and other features as interrupt sources an
core: introduce STPMIC1 driver
STPMIC1 is a power management chip for the stm32mp1 platform. It is accessed through an I2C bus. STPMIC1 provides regulators and other features as interrupt sources and watchdogs.
STPMIC1 configuration is expected from a secure device tree blob, that currently is the embedded DTB.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c6563194 | 17-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_i2c: save DTB status
This change saves DTB status value found in the I2C node and introduces i2c_is_secure() to state the bus state.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
stm32_i2c: save DTB status
This change saves DTB status value found in the I2C node and introduces i2c_is_secure() to state the bus state.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 834ce4c6 | 03-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_i2c: optimized I2C 1 byte memory transfer
Introduce stm32_i2c_read_write_membyte() to operate a single byte data transfer in memory mode. This function will be used by the power management seq
stm32_i2c: optimized I2C 1 byte memory transfer
Introduce stm32_i2c_read_write_membyte() to operate a single byte data transfer in memory mode. This function will be used by the power management sequence in order to relax pager resident memory footprint when I2C need to execute in an unpaged context.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| a3104caa | 06-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: counting GPIOZ bank pins
Get the GPIOZ bank pin count from the device tree. The shared resources driver uses this information to validate GPIO pin numbers.
Signed-off-by: Etienne Carriere
stm32mp1: counting GPIOZ bank pins
Get the GPIOZ bank pin count from the device tree. The shared resources driver uses this information to validate GPIO pin numbers.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 68c4a16b | 15-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: use phys_to_virt_io_secure() where expected
This change updates platforms and drivers to use io_pa_or_va_secure() when expecting a secure mapped address.
PWR, RCC, GIC, TAMP, BSEC, ETZPC,
stm32mp1: use phys_to_virt_io_secure() where expected
This change updates platforms and drivers to use io_pa_or_va_secure() when expecting a secure mapped address.
PWR, RCC, GIC, TAMP, BSEC, ETZPC, I2C are always secure (when embedded).
RNG uses a secure or non-secure mapping according to its registration in platform shared_resource driver.
GPIOs IO memory is always access though non-secure mapped virtual addresses.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 00c55c25 | 07-May-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_etzpc: core driver level for pm operations
Change power transition ordering level for the ETZPC driver. The driver does not depend and clock configuration and the access filtering configuratio
stm32_etzpc: core driver level for pm operations
Change power transition ordering level for the ETZPC driver. The driver does not depend and clock configuration and the access filtering configuration shall be restored prior device drivers resumes sequence to reflect expected platform state.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 082f27ae | 03-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_uart: pin control with stm32_gpio
stm32_uart instance get related pins configuration from device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Foris
stm32_uart: pin control with stm32_gpio
stm32_uart instance get related pins configuration from device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 9d8a03df | 03-May-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_uart: register secure/non-secure device
stm32_uart instance registers as secure/non-secure resources according to device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com
stm32_uart: register secure/non-secure device
stm32_uart instance registers as secure/non-secure resources according to device tree content.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 61e7d84c | 29-Apr-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_i2c: expose standard speed in driver API
Move definition of I2C standard speeds configuration means from driver source file to its header file. This change allows bus owners to use appropriate
stm32_i2c: expose standard speed in driver API
Move definition of I2C standard speeds configuration means from driver source file to its header file. This change allows bus owners to use appropriate value for bus configuration.
Exposes struct i2c_speed_e and enum i2c_speed_e
This change fixes the driver API as enum i2c_speed_e is expected by the API.
Fixes: b844655c9519 ("stm32_i2c: driver for STM32 I2C bus")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| 563f6249 | 29-Apr-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_gpio: fix pinctrl sanity test against platform
When parsing device tree nodes, skip non matching GPIO banks rather than panicking straight. Function ckeck_gpio_bank() already panics if not fin
stm32_gpio: fix pinctrl sanity test against platform
When parsing device tree nodes, skip non matching GPIO banks rather than panicking straight. Function ckeck_gpio_bank() already panics if not finding a matching GPIO bank node.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| ae49405b | 02-May-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_i2c: correct timeout detection on transfer stop event
Fix timeout detection in i2c_wait_stop().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.
stm32_i2c: correct timeout detection on transfer stop event
Fix timeout detection in i2c_wait_stop().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| fee710d0 | 03-May-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_i2c: fix bug in device tree support
Correct missing local variable in stm32_i2c_get_setup_from_fdt().
Fixes: c75303f777b7 ("stm32_i2c: handle pinctrl")
Signed-off-by: Etienne Carriere <etien
stm32_i2c: fix bug in device tree support
Correct missing local variable in stm32_i2c_get_setup_from_fdt().
Fixes: c75303f777b7 ("stm32_i2c: handle pinctrl")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| cc0a90c2 | 29-Apr-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_i2c: minor clean in driver makefile
Sort stm32_* drivers list in alphabetical ordering.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@lin
stm32_i2c: minor clean in driver makefile
Sort stm32_* drivers list in alphabetical ordering.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| e61fc00f | 19-Apr-2019 |
Sandeep Tripathy <sandeep.tripathy@broadcom.com> |
drivers: bcm_gpio: add IPROC GPIO driver
low level driver for Broadcom IPROC GPIO controller.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Acked-by: Etienne Carriere <etienne.car
drivers: bcm_gpio: add IPROC GPIO driver
low level driver for Broadcom IPROC GPIO controller.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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| 47c0e86c | 15-Apr-2019 |
Victor Chong <victor.chong@linaro.org> |
pl022, pl061: add missing pager constraint on _ops struct
Add KEEP_PAGER() for pl022_ops and pl061_ops structs.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jens Wiklander <je
pl022, pl061: add missing pager constraint on _ops struct
Add KEEP_PAGER() for pl022_ops and pl061_ops structs.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 074131b0 | 12-Apr-2019 |
Victor Chong <victor.chong@linaro.org> |
pl022_spi: fix non-trivial typo
read16() was replaced with io_read8() instead of io_read16() so fix it.
Fixes: 918bb3a5 ("core: upgrade from write32() to io_write32() and friends")
Signed-off-by:
pl022_spi: fix non-trivial typo
read16() was replaced with io_read8() instead of io_read16() so fix it.
Fixes: 918bb3a5 ("core: upgrade from write32() to io_write32() and friends")
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e4b2e43c | 12-Apr-2019 |
Victor Chong <victor.chong@linaro.org> |
pl022_spi: simplify receive of remaining data
If the expected number of packets are not received during the transmit+receive cycle, just receive the remaining data after the cycle if the Receive FIF
pl022_spi: simplify receive of remaining data
If the expected number of packets are not received during the transmit+receive cycle, just receive the remaining data after the cycle if the Receive FIFO (SSPSR_RNE) is not empty, without depending on the busy (SSPSR_BSY) flag, else we might miss reading some data as indicated in [1].
LINK: [1] https://github.com/OP-TEE/optee_os/issues/1461#issuecomment-306156463
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e8e7f1c5 | 18-Mar-2019 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
tzc380: add region auto configuration function
The tzc_auto_configure() function takes an address, a size, the attribute and a region as arguments. It calculates the fitting tzc380 region configurat
tzc380: add region auto configuration function
The tzc_auto_configure() function takes an address, a size, the attribute and a region as arguments. It calculates the fitting tzc380 region configuration and applies it to the controller.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 7eedcd15 | 12-Mar-2019 |
Rouven Czerwinski <rouven@czerwinskis.de> |
tzc380: add function to retrieve action register
The TZC380 IP has an action configuration which defines the action taken if a region is accessed with the wrong permissions. Devices do not have to s
tzc380: add function to retrieve action register
The TZC380 IP has an action configuration which defines the action taken if a region is accessed with the wrong permissions. Devices do not have to set the action register explicitly, add a function to retrieve the default configuration.
Signed-off-by: Rouven Czerwinski <rouven@czerwinskis.de> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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