stm32_bsec: BSEC data access do not depend on non-closed device

BSEC driver does not need to check if device is closed_device or not
to tell which BSEC data non-secure world is allowed to access. Th

stm32_bsec: BSEC data access do not depend on non-closed device

BSEC driver does not need to check if device is closed_device or not
to tell which BSEC data non-secure world is allowed to access. This
change removes this support as it simplifies BSEC initialization
structure.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_bsec: introduce configuration switch for write support

Introduce configuration switch CFG_STM32_BSEC_WRITE to not embed
write operation support in BSEC.

Signed-off-by: Etienne Carriere <etien

stm32_bsec: introduce configuration switch for write support

Introduce configuration switch CFG_STM32_BSEC_WRITE to not embed
write operation support in BSEC.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_bsec: correct error detection in driver

Change stm32_bsec_read_otp() and stm32_bsec_write_otp() as accessing
BSEC shadow memory cannot report error.

Change check_no_error() to verify or not B

stm32_bsec: correct error detection in driver

Change stm32_bsec_read_otp() and stm32_bsec_write_otp() as accessing
BSEC shadow memory cannot report error.

Change check_no_error() to verify or not BSEC internal disturbance
error as only shadowing or writing OTPs can report BSEC disturbance
issues.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_bsec: simplify lock support functions

Change stm32_bsec_otp_lock() to only lock fuses as hardware safely does
not allow unlocking a locked BSEC word.

Functions to read a lock return a TEE_Res

stm32_bsec: simplify lock support functions

Change stm32_bsec_otp_lock() to only lock fuses as hardware safely does
not allow unlocking a locked BSEC word.

Functions to read a lock return a TEE_Result status aside from the
effective lock value read.

Rename stm32_bsec_wr_lock() into stm32_bsec_read_permanent_lock()
as it is more explicit.

Change IMSG() into DMSG() as traces refer to debug info rather than
informative info.

Use flag character '#' to prefix printed hexadecimal values with "0x".

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_bsec: correct OTP locked programming bit position

Correct BSEC_LOCK_PROGRAM value in stm32_bsec driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jen

stm32_bsec: correct OTP locked programming bit position

Correct BSEC_LOCK_PROGRAM value in stm32_bsec driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Allow platforms to configure num of JR entries

Currently JR entries is fixed to 10 in common file. Allow
this to be over-ridden by platform's conf.mk

Signed-off-by: Ruchika Gupta <r

drivers: caam: Allow platforms to configure num of JR entries

Currently JR entries is fixed to 10 in common file. Allow
this to be over-ridden by platform's conf.mk

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>

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drivers: caam: Fix bug in caam_hal_jr_flush()

After requesting the CAAM block for flushing the JR,
the function should wait till the halt is complete
(i.e HALT_ONGOING). The code currently erroneous

drivers: caam: Fix bug in caam_hal_jr_flush()

After requesting the CAAM block for flushing the JR,
the function should wait till the halt is complete
(i.e HALT_ONGOING). The code currently erroneously
checks this on HALT_COMPLETE which can result in
infinite loops on platforms where the halt gets
completed before this check exceutes for first time.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>

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drivers: caam: Modify access of 64 bit registers

The Address of Input/output Job ring and scatter gather table are
handled differently depending on platform

1. All BE CAAM platforms (LS1043, LS1012

drivers: caam: Modify access of 64 bit registers

The Address of Input/output Job ring and scatter gather table are
handled differently depending on platform

1. All BE CAAM platforms (LS1043, LS1012, LS1046)
and i.MX platforms (LE CAAM):
base + 0x0000 : most-significant 32 bits
base + 0x0004 : least-significant 32 bits

The 32-bit version of this core therefore has to write to base + 0x0004
to set the 32-bit wide DMA address.

2. All other LE CAAM platforms (LS2088, LS1088, LX2160 etc.)
base + 0x0000 : least-significant 32 bits
base + 0x0004 : most-significant 32 bits

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>

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drivers: caam: use pointers to out/inring_entry for CAAM

Use pointers to outring_entry and inring_entry as input for
caam_desc_pop(), caam_desc_push() and caam_desc_jobstatus() functions.

This quic

drivers: caam: use pointers to out/inring_entry for CAAM

Use pointers to outring_entry and inring_entry as input for
caam_desc_pop(), caam_desc_push() and caam_desc_jobstatus() functions.

This quick re-work originaly comes from the initiative to get rid of a
GGC 9.2 warning -Waddress-of-packed-member

core/drivers/crypto/caam/caam_jr.c: In function ‘do_jr_dequeue’:
core/drivers/crypto/caam/caam_jr.c:262:22: warning: taking address of packed member of ‘struct outring_entry’ may result in an unaligned pointer value [-Waddress-of-packed-member]
262 | if (caam_desc_pop(&jr_out->desc) == caller->pdesc) {
| ^~~~~~~~~~~~~
core/drivers/crypto/caam/caam_jr.c:265:26: warning: taking address of packed member of ‘struct outring_entry’ may result in an unaligned pointer value [-Waddress-of-packed-member]
265 | caam_read_jobstatus(&jr_out->status);
| ^~~~~~~~~~~~~~~

By doing this, we let the function safely extracting the field.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers/scmi-msg: smt entry points for incoming messages

This change implements SCMI channels for reading a SCMI message from a
shared memory and call the SCMI message drivers to route the message
t

drivers/scmi-msg: smt entry points for incoming messages

This change implements SCMI channels for reading a SCMI message from a
shared memory and call the SCMI message drivers to route the message
to the target platform services.

SMT refers to the shared memory management protocol which is used
to get/put message/response in shared memory. SMT is a 28byte header
stating shared memory state and exchanged protocol data.

The processing entry for a SCMI message can be a secure interrupt
(CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY=y), and fastcall SMC
(CFG_SCMI_MSG_SMT_FASTCALL_ENTRY=y) or a threaded execution
context entry (CFG_SCMI_MSG_SMT_THREAD_ENTRY=y).

SMT description in this implementation is based on the SCP-firmware
implementation [1].

Link: [1] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: support for reset domain protocol

Adds SCMI reset domain protocol support in the SCMI message drivers
as defined in SCMI specification v2.0 [1]. Not all the messages
defined in the

drivers/scmi-msg: support for reset domain protocol

Adds SCMI reset domain protocol support in the SCMI message drivers
as defined in SCMI specification v2.0 [1]. Not all the messages
defined in the specification are supported.

Embedded upon CFG_SCMI_MSG_RESET_DOMAIN=y.

scmi_msg_get_rd_handler() sanitizes the message_id value
against any speculative use of reset domain ID as a index since by
SCMI specification, IDs are indices.

SCMI resource in this implementation are dumped or inspired by the
SCP-firmware implementation [2] of the SCMI protocol, server side.

Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
Link: [2] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: support for clock protocol

Adds SCMI clock protocol support in the SCMI message drivers as
defined in SCMI specification v2.0 [1]. Not all the messages
defined in the specification

drivers/scmi-msg: support for clock protocol

Adds SCMI clock protocol support in the SCMI message drivers as
defined in SCMI specification v2.0 [1]. Not all the messages
defined in the specification are supported.

Embedded upon CFG_SCMI_MSG_CLOCK=y.

Platform can provide one of the plat_scmi_clock_*() handler for the
supported operations set/get state/rate and others.

scmi_msg_get_clock_handler() sanitizes the message_id value
against any speculative use of clock ID as a index since by
SCMI specification, IDs are indices.

SCMI resource in this implementation are dumped or inspired by the
SCP-firmware implementation [2] of the SCMI protocol, server side.

Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
Link: [2] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: driver for processing scmi messages

This change introduces drivers to allow a platform to create a SCMI
service and register handlers for client request (SCMI agent) on
system reso

drivers/scmi-msg: driver for processing scmi messages

This change introduces drivers to allow a platform to create a SCMI
service and register handlers for client request (SCMI agent) on
system resources. This is the first piece of the drivers: an entry
function, the SCMI base protocol support and helpers for create
the response message.

With this change, scmi_process_message() is the entry function to
process an incoming SCMI message. The function expect the message
is already copied from shared memory into secure memory. The message
structure stores message reference and output buffer reference where
response message shall be stored.

scmi_process_message() calls the SCMI protocol driver according to
the protocol ID in the message. The SCMI protocol driver will call
defined platform handlers according to the message content.

This change introduces only the SCMI base protocol as defined in
SCMI specification v2.0 [1]. Not all the messages defined
in the specification are supported.

SCMI resource in this implementation are dumped or inspired by the
SCP-firmware implementation [2] of the SCMI protocol, server side.

Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
Link: [2] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: merge tee_*_get_digest_size() into a single function

Rename tee_hash_get_digest_size() to tee_alg_get_digest_size().

Change tee_alg_get_digest_size() to use new libutee macro
TEE_ALG_GET_DIGE

core: merge tee_*_get_digest_size() into a single function

Rename tee_hash_get_digest_size() to tee_alg_get_digest_size().

Change tee_alg_get_digest_size() to use new libutee macro
TEE_ALG_GET_DIGEST_SIZE.

Remove tee_mac_get_digest_size() as its functionality
is handled by tee_alg_get_digest_size() now.

Signed-off-by: Albert Schwarzkopf <a.schwarzkopf@phytec.de>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/stm32_rng: register device as secure or non-secure

FDT data defines through the status/secure-status property whether
RNG device is assigned to the secure world or to the non-secure
world. T

drivers/stm32_rng: register device as secure or non-secure

FDT data defines through the status/secure-status property whether
RNG device is assigned to the secure world or to the non-secure
world. This change makes the device driver to register the
peripheral assignation at boot time.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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drivers/stm32_etzpc: fix tzma configuration

Correct TZMAs configuration restore sequence at PM resume.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Rouven Czerwinski <r.czerw

drivers/stm32_etzpc: fix tzma configuration

Correct TZMAs configuration restore sequence at PM resume.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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drivers: gic: allow set pending a non-secure SGI

Remove assertion in GIC driver function gic_it_set_pending()
preventing Core from setting as pending a non-secure SGI.

Reviewed-by: Etienne Carriere

drivers: gic: allow set pending a non-secure SGI

Remove assertion in GIC driver function gic_it_set_pending()
preventing Core from setting as pending a non-secure SGI.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>

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drivers/stm32_etzpc: initialize etzpc driver early

Changes initcall level for STM32 ETZPC driver so that in initializes
early, at service_init level. The driver does not depends on other
SoC drivers

drivers/stm32_etzpc: initialize etzpc driver early

Changes initcall level for STM32 ETZPC driver so that in initializes
early, at service_init level. The driver does not depends on other
SoC drivers and can be initialize early. This change allows other
driver_init level initialization sequence to use ETZPC resources.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: implement NXP CAAM driver - Cipher

Add the NXP CAAM drivers:
- Cipher (AES/DES/DES3)

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faur

drivers: caam: implement NXP CAAM driver - Cipher

Add the NXP CAAM drivers:
- Cipher (AES/DES/DES3)

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: driver: generic resources for crypto cipher driver

Add a generic cryptographic Cipher driver interface connecting
TEE Crypto generic APIs to HW driver interface

To make Cipher HW driver gener

core: driver: generic resources for crypto cipher driver

Add a generic cryptographic Cipher driver interface connecting
TEE Crypto generic APIs to HW driver interface

To make Cipher HW driver generic and to reduce the amount of function
parameters, add structure data for the initialization and update
function driver call.
Checks the Cipher operation's parameter in the generic part before
calling the HW driver.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: bnxt: add overflow check in bnxt_copy_crash_dump()

Adds a check that offset + len doesn't overflow when checking that the
resulting size is still less than BNXT_CRASH_LEN.

Reviewed-by: Joa

drivers: bnxt: add overflow check in bnxt_copy_crash_dump()

Adds a check that offset + len doesn't overflow when checking that the
resulting size is still less than BNXT_CRASH_LEN.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reported-by: Bastien Simondi <bsimondi@netflix.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: add descriptive defines for RSA key formats

Add descriptive defines for RSA private key formats for a better
readability.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-b

drivers: caam: add descriptive defines for RSA key formats

Add descriptive defines for RSA private key formats for a better
readability.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: driver: fix RSA encoded message length computation

Fix the RSA encoded message length computation when verifying the
message.
This fixes inconsistent xtest 4006.20 and 4006.32 fails.

Signed-o

core: driver: fix RSA encoded message length computation

Fix the RSA encoded message length computation when verifying the
message.
This fixes inconsistent xtest 4006.20 and 4006.32 fails.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: fix RSA key format number 3

Fix the RSA private key format number 3.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

drivers: caam: fix compilation warning hal_jr.c

Fix compilation warning when CFG_NXP_CAAM=y and CFG_CRYPTO_DRIVER=n

core/drivers/crypto/caam/hal/common/hal_jr.c:19:29: warning:
‘jr_backup’ defined

drivers: caam: fix compilation warning hal_jr.c

Fix compilation warning when CFG_NXP_CAAM=y and CFG_CRYPTO_DRIVER=n

core/drivers/crypto/caam/hal/common/hal_jr.c:19:29: warning:
‘jr_backup’ defined but not used [-Wunused-const-variable=]
static const struct reglist jr_backup[] = {

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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