| 064bf8dc | 27-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: scmi-msg: minor cleanup
Remove useless local headers file inclusion as "common.h" is included. Remove a useless inclusion of speculation_barrier.h. Use BIT() in clock.h. Refine inline descript
core: scmi-msg: minor cleanup
Remove useless local headers file inclusion as "common.h" is included. Remove a useless inclusion of speculation_barrier.h. Use BIT() in clock.h. Refine inline description of scmi_msg_channel::agent_name in scmi-msg.h. Fix typo in scmi_smt_fastcall_smc_entry() description inline comment.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| ef18a901 | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: assert regulator support at API function entries
Assert the regulator as a register offset defined (non zero) for the target support.
Low power modes mandate a non-zero low_power_reg offse
stpmic1: assert regulator support at API function entries
Assert the regulator as a register offset defined (non zero) for the target support.
Low power modes mandate a non-zero low_power_reg offset value in regulator description. Offset is stored in lp_reg for unpaged accesses to regulator.
Pull down support mandates a non-zero pull_down_reg offset value in regulator description. Offset in stored in pd_reg for unpaged accessed to regulator.
Mask reset support mandates a non-zero mask_reset_reg offset value in regulator description. Offset in stored in mrst_reg for unpaged accessed to regulator.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 44219e70 | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: fix boot-on minimal voltage
Change stpmic1_bo_voltage_cfg() to highlight voltage argument is a minimal desired boot-on voltage requirement, not an absolute voltage requested at boot-on, as
stpmic1: fix boot-on minimal voltage
Change stpmic1_bo_voltage_cfg() to highlight voltage argument is a minimal desired boot-on voltage requirement, not an absolute voltage requested at boot-on, as per DT binding property .
stpmic1_bo_voltage_unpg() that applies boot-on voltage is updated to not lower current voltage if above min voltage constraint.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 1764a894 | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: fix regulator identification for low power configuration
Fix name identification sequence in stpmic1_lp_voltage_cfg() and stpmic1_lp_set_voltage(). Identify names starting with "buck" using
stpmic1: fix regulator identification for low power configuration
Fix name identification sequence in stpmic1_lp_voltage_cfg() and stpmic1_lp_set_voltage(). Identify names starting with "buck" using strncmp(name, "buck", 4), not strcmp(name, "buck") that tests also string null termination. Fix also tests on regulator names starting with "ldo".
This change factorize all identification with helper functions regu_is_buck() and regu_is_ldo_but_ldo4();
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 972b3d9a | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: relax PMIC control API functions
Return an error if requested to save Low Power regulator data if there is no Low Power control defined. This changes stpmic1_lp_cfg(), stpmic1_lp_reg_on_off
stpmic1: relax PMIC control API functions
Return an error if requested to save Low Power regulator data if there is no Low Power control defined. This changes stpmic1_lp_cfg(), stpmic1_lp_reg_on_off() and stpmic1_lp_copy_reg() to return with a error if regulator does not support Low Power config.
Add helper function to stpmic1_regu_has_lp_cfg() to return if a regulator defines Low Power configuration.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 6149e2d8 | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: add stpmic1_bo_enable_cfg() to save boot-on config
Add a helper stpmic1_bo_enable_cfg() to save the minimal regulator data needed to operate at least the boot-on constraint: control on enab
stpmic1: add stpmic1_bo_enable_cfg() to save boot-on config
Add a helper stpmic1_bo_enable_cfg() to save the minimal regulator data needed to operate at least the boot-on constraint: control on enable/disable support: control register offset and bit position.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 3f692bdf | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: describe 5V fixed regulators
Describe regulators boost, pwr_sw1 and pwr_sw2 that are gated 5V fixed regulators.
These regulators have not reset mask support hence change stpmic1_regulator_
stpmic1: describe 5V fixed regulators
Describe regulators boost, pwr_sw1 and pwr_sw2 that are gated 5V fixed regulators.
These regulators have not reset mask support hence change stpmic1_regulator_mask_reset_set() to fail accordingly.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 42032ea0 | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: refine resources helper macros
Define bit fields in position xxx_POS rather than in bit mask. Use BIT() and GENMASK_32() rather than numerical values.
Signed-off-by: Etienne Carriere <etie
stpmic1: refine resources helper macros
Define bit fields in position xxx_POS rather than in bit mask. Use BIT() and GENMASK_32() rather than numerical values.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 68cfb83d | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: save enable bit position in regulator control
Add enable bit position info in STPMIC1 regulators description instead of assuming it is BIT(0). This allows to define other regulators with en
stpmic1: save enable bit position in regulator control
Add enable bit position info in STPMIC1 regulators description instead of assuming it is BIT(0). This allows to define other regulators with enable bit not at position 0.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 2619b28c | 29-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: stpmic1_is_regulator_enabled() returns a boolean
Change helper function stpmic1_is_regulator_enabled() to return a boolean value.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.o
stpmic1: stpmic1_is_regulator_enabled() returns a boolean
Change helper function stpmic1_is_regulator_enabled() to return a boolean value.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| f7e28951 | 28-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stpmic1: Fix LDO3 voltage table
Add VOUT2/2 (sink/source mode) value in LDO3 voltage table.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Nicolas Le Bayon <nicolas.le
stpmic1: Fix LDO3 voltage table
Add VOUT2/2 (sink/source mode) value in LDO3 voltage table.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| ec1f544d | 28-Apr-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32_rng: increase timeout to 10 ms
Use a longer timeout in RNG access sequence. When enabling STM32 RNG from reset state, it may take few milliseconds for the RNG to be ready.
Fixes panic at plat
stm32_rng: increase timeout to 10 ms
Use a longer timeout in RNG access sequence. When enabling STM32 RNG from reset state, it may take few milliseconds for the RNG to be ready.
Fixes panic at platform boot with trace: E/TC:0 0 Panic at core/arch/arm/plat-stm32mp1/rng_seed.c:48 <plat_rng_init>
Fixes: 4e0397eed2e5 ("stm32mp1: seed PRNG with STM32 RNG") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 7994d842 | 28-Jun-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_bsec: BSEC data access do not depend on non-closed device
BSEC driver does not need to check if device is closed_device or not to tell which BSEC data non-secure world is allowed to access. Th
stm32_bsec: BSEC data access do not depend on non-closed device
BSEC driver does not need to check if device is closed_device or not to tell which BSEC data non-secure world is allowed to access. This change removes this support as it simplifies BSEC initialization structure.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 301b3eb5 | 21-Feb-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_bsec: introduce configuration switch for write support
Introduce configuration switch CFG_STM32_BSEC_WRITE to not embed write operation support in BSEC.
Signed-off-by: Etienne Carriere <etien
stm32_bsec: introduce configuration switch for write support
Introduce configuration switch CFG_STM32_BSEC_WRITE to not embed write operation support in BSEC.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1ac4ea14 | 21-Feb-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_bsec: correct error detection in driver
Change stm32_bsec_read_otp() and stm32_bsec_write_otp() as accessing BSEC shadow memory cannot report error.
Change check_no_error() to verify or not B
stm32_bsec: correct error detection in driver
Change stm32_bsec_read_otp() and stm32_bsec_write_otp() as accessing BSEC shadow memory cannot report error.
Change check_no_error() to verify or not BSEC internal disturbance error as only shadowing or writing OTPs can report BSEC disturbance issues.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ef9888dc | 20-Apr-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_bsec: simplify lock support functions
Change stm32_bsec_otp_lock() to only lock fuses as hardware safely does not allow unlocking a locked BSEC word.
Functions to read a lock return a TEE_Res
stm32_bsec: simplify lock support functions
Change stm32_bsec_otp_lock() to only lock fuses as hardware safely does not allow unlocking a locked BSEC word.
Functions to read a lock return a TEE_Result status aside from the effective lock value read.
Rename stm32_bsec_wr_lock() into stm32_bsec_read_permanent_lock() as it is more explicit.
Change IMSG() into DMSG() as traces refer to debug info rather than informative info.
Use flag character '#' to prefix printed hexadecimal values with "0x".
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e03a4a45 | 21-Feb-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_bsec: correct OTP locked programming bit position
Correct BSEC_LOCK_PROGRAM value in stm32_bsec driver.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jen
stm32_bsec: correct OTP locked programming bit position
Correct BSEC_LOCK_PROGRAM value in stm32_bsec driver.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5c3559dc | 03-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Allow platforms to configure num of JR entries
Currently JR entries is fixed to 10 in common file. Allow this to be over-ridden by platform's conf.mk
Signed-off-by: Ruchika Gupta <r
drivers: caam: Allow platforms to configure num of JR entries
Currently JR entries is fixed to 10 in common file. Allow this to be over-ridden by platform's conf.mk
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 6819f38f | 03-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Fix bug in caam_hal_jr_flush()
After requesting the CAAM block for flushing the JR, the function should wait till the halt is complete (i.e HALT_ONGOING). The code currently erroneous
drivers: caam: Fix bug in caam_hal_jr_flush()
After requesting the CAAM block for flushing the JR, the function should wait till the halt is complete (i.e HALT_ONGOING). The code currently erroneously checks this on HALT_COMPLETE which can result in infinite loops on platforms where the halt gets completed before this check exceutes for first time.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 971110af | 03-Apr-2020 |
Ruchika Gupta <ruchika.gupta@nxp.com> |
drivers: caam: Modify access of 64 bit registers
The Address of Input/output Job ring and scatter gather table are handled differently depending on platform
1. All BE CAAM platforms (LS1043, LS1012
drivers: caam: Modify access of 64 bit registers
The Address of Input/output Job ring and scatter gather table are handled differently depending on platform
1. All BE CAAM platforms (LS1043, LS1012, LS1046) and i.MX platforms (LE CAAM): base + 0x0000 : most-significant 32 bits base + 0x0004 : least-significant 32 bits
The 32-bit version of this core therefore has to write to base + 0x0004 to set the 32-bit wide DMA address.
2. All other LE CAAM platforms (LS2088, LS1088, LX2160 etc.) base + 0x0000 : least-significant 32 bits base + 0x0004 : most-significant 32 bits
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Acked-by: Clement Faure <clement.faure@nxp.com>
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| 6a16bb35 | 03-Apr-2020 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: use pointers to out/inring_entry for CAAM
Use pointers to outring_entry and inring_entry as input for caam_desc_pop(), caam_desc_push() and caam_desc_jobstatus() functions.
This quic
drivers: caam: use pointers to out/inring_entry for CAAM
Use pointers to outring_entry and inring_entry as input for caam_desc_pop(), caam_desc_push() and caam_desc_jobstatus() functions.
This quick re-work originaly comes from the initiative to get rid of a GGC 9.2 warning -Waddress-of-packed-member
core/drivers/crypto/caam/caam_jr.c: In function ‘do_jr_dequeue’: core/drivers/crypto/caam/caam_jr.c:262:22: warning: taking address of packed member of ‘struct outring_entry’ may result in an unaligned pointer value [-Waddress-of-packed-member] 262 | if (caam_desc_pop(&jr_out->desc) == caller->pdesc) { | ^~~~~~~~~~~~~ core/drivers/crypto/caam/caam_jr.c:265:26: warning: taking address of packed member of ‘struct outring_entry’ may result in an unaligned pointer value [-Waddress-of-packed-member] 265 | caam_read_jobstatus(&jr_out->status); | ^~~~~~~~~~~~~~~
By doing this, we let the function safely extracting the field.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a58c4d70 | 16-Dec-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers/scmi-msg: smt entry points for incoming messages
This change implements SCMI channels for reading a SCMI message from a shared memory and call the SCMI message drivers to route the message t
drivers/scmi-msg: smt entry points for incoming messages
This change implements SCMI channels for reading a SCMI message from a shared memory and call the SCMI message drivers to route the message to the target platform services.
SMT refers to the shared memory management protocol which is used to get/put message/response in shared memory. SMT is a 28byte header stating shared memory state and exchanged protocol data.
The processing entry for a SCMI message can be a secure interrupt (CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY=y), and fastcall SMC (CFG_SCMI_MSG_SMT_FASTCALL_ENTRY=y) or a threaded execution context entry (CFG_SCMI_MSG_SMT_THREAD_ENTRY=y).
SMT description in this implementation is based on the SCP-firmware implementation [1].
Link: [1] https://github.com/ARM-software/SCP-firmware.git
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 56a1f10e | 02-Dec-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers/scmi-msg: support for reset domain protocol
Adds SCMI reset domain protocol support in the SCMI message drivers as defined in SCMI specification v2.0 [1]. Not all the messages defined in the
drivers/scmi-msg: support for reset domain protocol
Adds SCMI reset domain protocol support in the SCMI message drivers as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification are supported.
Embedded upon CFG_SCMI_MSG_RESET_DOMAIN=y.
scmi_msg_get_rd_handler() sanitizes the message_id value against any speculative use of reset domain ID as a index since by SCMI specification, IDs are indices.
SCMI resource in this implementation are dumped or inspired by the SCP-firmware implementation [2] of the SCMI protocol, server side.
Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf Link: [2] https://github.com/ARM-software/SCP-firmware.git
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a7a9e3ba | 02-Dec-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers/scmi-msg: support for clock protocol
Adds SCMI clock protocol support in the SCMI message drivers as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification
drivers/scmi-msg: support for clock protocol
Adds SCMI clock protocol support in the SCMI message drivers as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification are supported.
Embedded upon CFG_SCMI_MSG_CLOCK=y.
Platform can provide one of the plat_scmi_clock_*() handler for the supported operations set/get state/rate and others.
scmi_msg_get_clock_handler() sanitizes the message_id value against any speculative use of clock ID as a index since by SCMI specification, IDs are indices.
SCMI resource in this implementation are dumped or inspired by the SCP-firmware implementation [2] of the SCMI protocol, server side.
Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf Link: [2] https://github.com/ARM-software/SCP-firmware.git
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ae8c8068 | 01-Dec-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers/scmi-msg: driver for processing scmi messages
This change introduces drivers to allow a platform to create a SCMI service and register handlers for client request (SCMI agent) on system reso
drivers/scmi-msg: driver for processing scmi messages
This change introduces drivers to allow a platform to create a SCMI service and register handlers for client request (SCMI agent) on system resources. This is the first piece of the drivers: an entry function, the SCMI base protocol support and helpers for create the response message.
With this change, scmi_process_message() is the entry function to process an incoming SCMI message. The function expect the message is already copied from shared memory into secure memory. The message structure stores message reference and output buffer reference where response message shall be stored.
scmi_process_message() calls the SCMI protocol driver according to the protocol ID in the message. The SCMI protocol driver will call defined platform handlers according to the message content.
This change introduces only the SCMI base protocol as defined in SCMI specification v2.0 [1]. Not all the messages defined in the specification are supported.
SCMI resource in this implementation are dumped or inspired by the SCP-firmware implementation [2] of the SCMI protocol, server side.
Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf Link: [2] https://github.com/ARM-software/SCP-firmware.git
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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