| 21f58962 | 05-Oct-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add support for mx8dxl
Add support for mx8dxl platforms. The HAL support is identical to mx8qm/qxp platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Fo
drivers: caam: add support for mx8dxl
Add support for mx8dxl platforms. The HAL support is identical to mx8qm/qxp platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1bd3fe5d | 24-Aug-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
crypto: stm32: fix SAES reset at probe time
Uses SAES internal reset sequence only when external reset controller is not available. This change fixes a non-systematic SAES error seen when SAES inter
crypto: stm32: fix SAES reset at probe time
Uses SAES internal reset sequence only when external reset controller is not available. This change fixes a non-systematic SAES error seen when SAES internal reset is triggered right after external reset sequence. Whereas a fix could be to add a delay between external reset and internal reset sequences, this change simplifies the sequence as internal reset sequence is not needed when SAES instance is reset using its external reset controller.
Fixes: 4320f5cf30c5 ("crypto: stm32: SAES cipher support") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 280dd882 | 02-Jun-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add DEK blob support
The CAAM can generate a specific key blob called DEK blob - Data Encryption Key blob. It encapsulates and encrypts the plain text key used to encrypt the boot ima
drivers: caam: add DEK blob support
The CAAM can generate a specific key blob called DEK blob - Data Encryption Key blob. It encapsulates and encrypts the plain text key used to encrypt the boot image. This blob is decapsulated by the HAB - High Assurance boot at boot to decrypt the boot image.
The DEK blob is a specific CAAM blob as it requires a header and the key must be encapsulated from the CAAM secure memory.
Enable the CAAM DEK blob support on imx8m platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2a12ae23 | 02-Jun-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add CAAM secure memory driver
Add CAAM secure memory support. The CAAM secure memory is an embedded memory within the CAAM used for data protection and special operations.
Enable the
drivers: caam: add CAAM secure memory driver
Add CAAM secure memory support. The CAAM secure memory is an embedded memory within the CAAM used for data protection and special operations.
Enable the allocation of secure memory pages and partitions used by job rings as input/output for special cryptographic operations.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b7815eed | 02-Jun-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add HAL for secure memory driver
Add hardware abstraction layer for CAAM secure memory registers. The majority of the implementation is common to all i.MX platforms. Only the secure m
drivers: caam: add HAL for secure memory driver
Add hardware abstraction layer for CAAM secure memory registers. The majority of the implementation is common to all i.MX platforms. Only the secure memory physical address retrieve method is platform specific. In this commit, this method is implemented for imx8m platforms only.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bd738228 | 25-Aug-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: check OPTEE DDR location if the CAAM DMA is 32 bits width
On i.MX platforms, the CAAM DMA width is limited to 32 bits. That limitation requires OPTEE to be located in the 32 bits DDR
drivers: caam: check OPTEE DDR location if the CAAM DMA is 32 bits width
On i.MX platforms, the CAAM DMA width is limited to 32 bits. That limitation requires OPTEE to be located in the 32 bits DDR address space.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| dfb77f83 | 31-Aug-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: remove dead code
Remove value check as it cannot be true and appears to be dead code.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@li
drivers: caam: remove dead code
Remove value check as it cannot be true and appears to be dead code.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e2d69ac1 | 31-Aug-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: free resource upon sgtbuf initialization failure
Call caam_dmaobj_free() upon caam_dmaobj_input_sgtbuf() failure to free buffer allocated by caam_dmaobj_input_sgtbuf().
Signed-off-b
drivers: caam: free resource upon sgtbuf initialization failure
Call caam_dmaobj_free() upon caam_dmaobj_input_sgtbuf() failure to free buffer allocated by caam_dmaobj_input_sgtbuf().
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e86f18e2 | 24-Jul-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: remove dead code
Remove value check as it cannot be true and appears to be dead code. Use array index syntax instead of pointer arithmetic for better readability.
Signed-off-by: Clem
drivers: caam: remove dead code
Remove value check as it cannot be true and appears to be dead code. Use array index syntax instead of pointer arithmetic for better readability.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| d5268a72 | 24-Jul-2023 |
Clement Faure <clement.faure@nxp.com> |
crypto: rsamgf: initialize allocated buffer
In drvcrypt_rsa_mgf1() function, the memcpy() could potentially copy an uninitialized buffer. Allocate and initialize tmpdigest buffer with calloc() inste
crypto: rsamgf: initialize allocated buffer
In drvcrypt_rsa_mgf1() function, the memcpy() could potentially copy an uninitialized buffer. Allocate and initialize tmpdigest buffer with calloc() instead of malloc().
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e63825bd | 31-Jul-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: mp: fix memory on CAAM descriptor allocation failure
Free the output DMA object upon CAAM descriptor allocation failure.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by
drivers: caam: mp: fix memory on CAAM descriptor allocation failure
Free the output DMA object upon CAAM descriptor allocation failure.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 48c28829 | 31-Jul-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: free resource upon dmaobj initialization failure
Call caam_dmaobj_free() upon caam_dmaobj_init_[input|output}() failure to free buffer allocated by allocate_private().
Signed-off-by:
drivers: caam: free resource upon dmaobj initialization failure
Call caam_dmaobj_free() upon caam_dmaobj_init_[input|output}() failure to free buffer allocated by allocate_private().
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e55d0bca | 18-Jul-2023 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
crypto: stm32: use generic macro in authenc.c
Replace TOBE32 and FROMBE32 macros with generic TEE_U32_TO_BIG_ENDIAN and TEE_U32_FROM_BIG_ENDIAN respectively.
Signed-off-by: Thomas Bourgoin <thomas.
crypto: stm32: use generic macro in authenc.c
Replace TOBE32 and FROMBE32 macros with generic TEE_U32_TO_BIG_ENDIAN and TEE_U32_FROM_BIG_ENDIAN respectively.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b47697c0 | 07-Jul-2023 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: stm32_saes: redefine huk_subkey_derive()
We set huk_subkey_derive() as a weak function and we define it in SAES driver to be able to use SAES IP to make a secure key derivation from the SAE
drivers: stm32_saes: redefine huk_subkey_derive()
We set huk_subkey_derive() as a weak function and we define it in SAES driver to be able to use SAES IP to make a secure key derivation from the SAES only accessible SOC unique secret key.
We use the Key Derivation function (KDF) in counter mode defined in [1] using as the PRF (pseudo random function) the PRF(AES-CMAC). PRF(AES-CMAC) is hardware accelerated by SAES, and use the secure DHUK (derived hardware unique key) only readable by the SAES IP.
Link: https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-108r1.pdf [1] Co-developed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4320f5cf | 30-Jun-2023 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
crypto: stm32: SAES cipher support
Add SAES HW driver, and update OP-TEE cipher hooks to be able to use SAES or CRYP for cipher algorithms. SAES and CRYP cannot be enabled at the same time in OP-TEE
crypto: stm32: SAES cipher support
Add SAES HW driver, and update OP-TEE cipher hooks to be able to use SAES or CRYP for cipher algorithms. SAES and CRYP cannot be enabled at the same time in OP-TEE.
Co-developed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7ebfbe9a | 12-Jul-2023 |
Katsunori Kikuchi <Katsunori.Kikuchi@sony.com> |
core: crypto_api: fixes typo "bytes" to "bits"
Fixes a typo for *gen_keypair() in struct drvcrypt_ecc where the last parameter was "size_bytes" while the value represents bits, so fix this by renami
core: crypto_api: fixes typo "bytes" to "bits"
Fixes a typo for *gen_keypair() in struct drvcrypt_ecc where the last parameter was "size_bytes" while the value represents bits, so fix this by renaming it to "size_bits".
Fixes: d29cd2efcd46 ("core: driver: generic resources for crypto device driver - ECC") Signed-off-by: Katsunori Kikuchi <Katsunori.Kikuchi@sony.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3f6ed0a6 | 12-Jul-2023 |
Katsunori Kikuchi <Katsunori.Kikuchi@sony.com> |
drivers: crypto: fix to extract DH secret length from modulus
Prior to this patch, the DH secret, due to its mechanism, becomes a value less than the key length of the Private key. Consequently, whe
drivers: crypto: fix to extract DH secret length from modulus
Prior to this patch, the DH secret, due to its mechanism, becomes a value less than the key length of the Private key. Consequently, when obtaining the maximum size of the secret from the current key length of the Public key, the secret length falls short. So change this to extract DH secret length from modulus instead of public key length.
Fixes: f6e2b9e2d1a2 ("drivers: crypto: implement crypto driver - DH") Signed-off-by: Katsunori Kikuchi <Katsunori.Kikuchi@sony.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b2284b11 | 17-Jul-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: update FS storage API with user space buffer
Updates the create(), read(), and write() function pointers in struct ts_store_ops to take a user space buffer in addition to the previous core buf
core: update FS storage API with user space buffer
Updates the create(), read(), and write() function pointers in struct ts_store_ops to take a user space buffer in addition to the previous core buffer. Core buffers are normal secure memory while user space buffers should only be accessed using the user_access.h functions.
The different FS storage implementations are updated accordingly.
Note that the RPMB FS storage implementation resorts to using enter_user_access() and exit_user_access() due to internal complexities.
Fixes: 4e154320e47c ("core: Apply finer-grained PAN") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 9c4d0955 | 17-Jul-2023 |
loubaihui <loubaihui1@huawei.com> |
crypto: add drvcrypt_register_x25519() and drvcrypt_register_x448()
Add X25519 and X448 drvcrypt.
Signed-off-by: loubaihui <loubaihui1@huawei.com> Acked-by: Jerome Forissier <jerome.forissier@linar
crypto: add drvcrypt_register_x25519() and drvcrypt_register_x448()
Add X25519 and X448 drvcrypt.
Signed-off-by: loubaihui <loubaihui1@huawei.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9ef7a09c | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
drivers: stm32_i2c: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 73ba32eb | 23-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL
Updates stm32_i2c driver for when CFG_DRIVERS_PINCTRL is enabled making I2C driver to get pin control configuration using the generic pin control fram
drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL
Updates stm32_i2c driver for when CFG_DRIVERS_PINCTRL is enabled making I2C driver to get pin control configuration using the generic pin control framework. When enabled, stm32_i2c driver get the active and sleep pin control configuration from the device tree. Sleep pinctrl configuration is optional.
SE050 and STM32MP1 PMIC drivers that use the stm32_i2c bus are both updated accordingly.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e4b11726 | 04-Jul-2023 |
Olivier Masse <olivier.masse@nxp.com> |
drivers: caam: fix size of CMAC update data
In case of an update operation, the total input data size processed must be a multiple of a block size. The total block size is equal to the input data si
drivers: caam: fix size of CMAC update data
In case of an update operation, the total input data size processed must be a multiple of a block size. The total block size is equal to the input data size and the saved buffer size.
If the reallocation DMA buffer is less than the input data size, buffer length plus saved buffer size need to be adjusted to align on multiple of a block size.
Depending on the memory buffer input configuration, the function caam_dmaobj_sgtbuf_build() might modify the data size to be processed in the loop.
This case happens sometimes on i.MX platforms where the input buffer physical address in above 32 bits. This implies reporting the data size re-ajustment when data is saved in the context buffer.
Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e6027f48 | 05-Jul-2023 |
Alvin Chang <alvinga@andestech.com> |
core: arm: Move some DT functions to common kernel
Some existed functions for device tree in ARM could be also used for other architectures. This commit moves most of functions from ARM architecture
core: arm: Move some DT functions to common kernel
Some existed functions for device tree in ARM could be also used for other architectures. This commit moves most of functions from ARM architecture into "core/kernel/dt.c", including external DT descriptor, DT overlay, external DT initialization, API for adding DT child nodes and reserved-memory nodes. Since "core/kernel/dt.c" is dependent with CFG_DT, other functions which are independent with CFG_DT are put into new file "core/kernel/boot.c".
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e2ec831c | 03-Jul-2023 |
Jihwan Park <jihwp@amazon.com> |
core: crypto_bignum_free(): add indirection and set pointer to NULL
To prevent human mistake, crypto_bignum_free() sets the location of the bignum pointer to NULL after freeing it.
Signed-off-by: J
core: crypto_bignum_free(): add indirection and set pointer to NULL
To prevent human mistake, crypto_bignum_free() sets the location of the bignum pointer to NULL after freeing it.
Signed-off-by: Jihwan Park <jihwp@amazon.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 85bba90d | 03-May-2023 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: compare symmetric keys in constant time
Symmetric keys should be compared in constant time to protect against side channel attacks.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundrie
crypto: se050: compare symmetric keys in constant time
Symmetric keys should be compared in constant time to protect against side channel attacks.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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