xref: /optee_os/core/drivers/crypto/caam/caam_ctrl.c (revision bd738228e5936f90c9ffac7e45cbda54abf02357)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright 2017-2021 NXP
4  *
5  * Brief   CAAM Global Controller.
6  */
7 #include <assert.h>
8 #include <caam_acipher.h>
9 #include <caam_cipher.h>
10 #include <caam_common.h>
11 #include <caam_hal_cfg.h>
12 #include <caam_hal_clk.h>
13 #include <caam_hal_ctrl.h>
14 #include <caam_hash.h>
15 #include <caam_jr.h>
16 #include <caam_blob.h>
17 #include <caam_mp.h>
18 #include <caam_pwr.h>
19 #include <caam_rng.h>
20 #include <drivers/imx_snvs.h>
21 #include <initcall.h>
22 #include <kernel/panic.h>
23 #include <tee_api_types.h>
24 
25 /*
26  * If the CAAM DMA only supports 32 bits physical addresses, OPTEE must
27  * be located within the 32 bits address space.
28  */
29 #ifndef CFG_CAAM_64BIT
30 static_assert((CFG_TZDRAM_START + CFG_TZDRAM_SIZE) < UINT32_MAX);
31 #endif
32 
33 /* Crypto driver initialization */
34 static TEE_Result crypto_driver_init(void)
35 {
36 	TEE_Result retresult = TEE_ERROR_GENERIC;
37 	enum caam_status retstatus = CAAM_FAILURE;
38 	struct caam_jrcfg jrcfg = {};
39 
40 	/* Enable the CAAM Clock */
41 	caam_hal_clk_enable(true);
42 
43 	/* Set OTP as master key if the platform is closed */
44 	if (snvs_is_device_closed()) {
45 		retresult = imx_snvs_set_master_otpmk();
46 		if (retresult && retresult != TEE_ERROR_NOT_IMPLEMENTED)
47 			goto exit_init;
48 	}
49 
50 	retstatus = caam_hal_cfg_get_conf(&jrcfg);
51 	if (retstatus != CAAM_NO_ERROR) {
52 		retresult = TEE_ERROR_NOT_SUPPORTED;
53 		goto exit_init;
54 	}
55 
56 	/* Initialize the CAAM Controller */
57 	caam_hal_ctrl_init(jrcfg.base);
58 
59 	/* Initialize the Job Ring to be used */
60 	retstatus = caam_jr_init(&jrcfg);
61 	if (retstatus != CAAM_NO_ERROR) {
62 		retresult = TEE_ERROR_GENERIC;
63 		goto exit_init;
64 	}
65 
66 	/* Initialize the RNG Module */
67 	retstatus = caam_rng_init(jrcfg.base);
68 	if (retstatus != CAAM_NO_ERROR) {
69 		retresult = TEE_ERROR_GENERIC;
70 		goto exit_init;
71 	}
72 
73 	/* Initialize the Hash Module */
74 	retstatus = caam_hash_init(&jrcfg);
75 	if (retstatus != CAAM_NO_ERROR) {
76 		retresult = TEE_ERROR_GENERIC;
77 		goto exit_init;
78 	}
79 
80 	/* Initialize the MATH Module */
81 	retstatus = caam_math_init(&jrcfg);
82 	if (retstatus != CAAM_NO_ERROR) {
83 		retresult = TEE_ERROR_GENERIC;
84 		goto exit_init;
85 	}
86 
87 	/* Initialize the RSA Module */
88 	retstatus = caam_rsa_init(&jrcfg);
89 	if (retstatus != CAAM_NO_ERROR) {
90 		retresult = TEE_ERROR_GENERIC;
91 		goto exit_init;
92 	}
93 
94 	/* Initialize the Cipher Module */
95 	retstatus = caam_cipher_init(jrcfg.base);
96 	if (retstatus != CAAM_NO_ERROR) {
97 		retresult = TEE_ERROR_GENERIC;
98 		goto exit_init;
99 	}
100 
101 	/* Initialize the HMAC Module */
102 	retstatus = caam_hmac_init(&jrcfg);
103 	if (retstatus != CAAM_NO_ERROR) {
104 		retresult = TEE_ERROR_GENERIC;
105 		goto exit_init;
106 	}
107 
108 	/* Initialize the BLOB Module */
109 	retstatus = caam_blob_mkvb_init(jrcfg.base);
110 	if (retstatus != CAAM_NO_ERROR) {
111 		retresult = TEE_ERROR_GENERIC;
112 		goto exit_init;
113 	}
114 
115 	/* Initialize the CMAC Module */
116 	retstatus = caam_cmac_init(jrcfg.base);
117 	if (retstatus != CAAM_NO_ERROR) {
118 		retresult = TEE_ERROR_GENERIC;
119 		goto exit_init;
120 	}
121 
122 	/* Initialize the ECC Module */
123 	retstatus = caam_ecc_init(&jrcfg);
124 	if (retstatus != CAAM_NO_ERROR) {
125 		retresult = TEE_ERROR_GENERIC;
126 		goto exit_init;
127 	}
128 
129 	/* Initialize the DH Module */
130 	retstatus = caam_dh_init(&jrcfg);
131 	if (retstatus != CAAM_NO_ERROR) {
132 		retresult = TEE_ERROR_GENERIC;
133 		goto exit_init;
134 	}
135 
136 	/* Initialize the DSA Module */
137 	retstatus = caam_dsa_init(&jrcfg);
138 	if (retstatus != CAAM_NO_ERROR) {
139 		retresult = TEE_ERROR_GENERIC;
140 		goto exit_init;
141 	}
142 
143 	/* Initialize the Manufacturing Protection Module */
144 	retstatus = caam_mp_init(jrcfg.base);
145 	if (retstatus != CAAM_NO_ERROR && retstatus != CAAM_NOT_SUPPORTED) {
146 		retresult = TEE_ERROR_GENERIC;
147 		goto exit_init;
148 	}
149 
150 	/* Everything is OK, register the Power Management handler */
151 	caam_pwr_init();
152 
153 	/*
154 	 * Configure Job Rings to NS World
155 	 * If the Driver Crypto is not used CFG_NXP_CAAM_RUNTIME_JR is not
156 	 * enable, hence relax the JR used for the CAAM configuration to
157 	 * the Non-Secure
158 	 */
159 	if (jrcfg.base)
160 		caam_hal_cfg_setup_nsjobring(&jrcfg);
161 
162 	retresult = TEE_SUCCESS;
163 exit_init:
164 	if (retresult != TEE_SUCCESS) {
165 		EMSG("CAAM Driver initialization (0x%" PRIx32 ")", retresult);
166 		panic();
167 	}
168 
169 	return retresult;
170 }
171 
172 early_init(crypto_driver_init);
173 
174 /* Crypto driver late initialization to complete on-going CAAM operations */
175 static TEE_Result init_caam_late(void)
176 {
177 	enum caam_status ret = CAAM_BUSY;
178 
179 	ret = caam_jr_complete();
180 
181 	if (ret != CAAM_NO_ERROR) {
182 		EMSG("CAAM initialization failed");
183 		panic();
184 	}
185 
186 	return TEE_SUCCESS;
187 }
188 
189 early_init_late(init_caam_late);
190