| 06c4e95e | 08-Apr-2026 |
Harish Ediga <harish.ediga@amd.com> |
crypto: asu: send hash address in request buffer for digest
Update driver to read digest from hash address sent to firmware instead of response buffer
Fixes: 74ddb42edbe0 ("crypto: asu: Add crypto
crypto: asu: send hash address in request buffer for digest
Update driver to read digest from hash address sent to firmware instead of response buffer
Fixes: 74ddb42edbe0 ("crypto: asu: Add crypto hash driver") Signed-off-by: Harish Ediga <harish.ediga@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 20da862b | 06-Apr-2026 |
Harish Ediga <harish.ediga@amd.com> |
crypto: asu: fix command header length and race condition
- Updated asu_create_header() to pass command length in words (sizeof(*cp)/sizeof(uint32_t)) instead of zero, to align with ASUFW requir
crypto: asu: fix command header length and race condition
- Updated asu_create_header() to pass command length in words (sizeof(*cp)/sizeof(uint32_t)) instead of zero, to align with ASUFW requirements for proper command parsing. - Multiple crypto drivers can submit request to shared buffer. Make sure all queue parameters are update in spin_lock.
Fixes: 7f2d4e10736f ("drivers: amd: Add ASU support") Signed-off-by: Harish Ediga <harish.ediga@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a0862211 | 18-Mar-2026 |
zhaozheng7 <zhaozheng96@outlook.com> |
drivers: crypto: hisilicon: fix qp memory leak
Fix the null pointer access issue for hisilicon QM driver.
Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) module") Signed-of
drivers: crypto: hisilicon: fix qp memory leak
Fix the null pointer access issue for hisilicon QM driver.
Fixes: c7f9abcee87f ("drivers: implement HiSilicon Queue Management (QM) module") Signed-off-by: zhaozheng7 <zhaozheng96@outlook.com> Acked-by: Zexi Yu <yuzexi@hisilicon.com>
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| 74ddb42e | 26-Feb-2026 |
Harsh Jain <h.jain@amd.com> |
crypto: asu: Add crypto hash driver
Add support for following Hash algorithms SHA-256, SHA-384, SHA-512, SHA3-256, SHA3-384, SHA3-512
Signed-off-by: Harsh Jain <h.jain@amd.com> Signed-off-by: Aksha
crypto: asu: Add crypto hash driver
Add support for following Hash algorithms SHA-256, SHA-384, SHA-512, SHA3-256, SHA3-384, SHA3-512
Signed-off-by: Harsh Jain <h.jain@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3a7a97b9 | 27-Feb-2026 |
Martin Nyhus <martin@nyhus.dev> |
drivers: caam: fix cache invalidation of RSA buffer
When using CAAM to generate an RSA key the CPU caching of the DMA buffers need to be controlled to ensure the correct visibility for both devices.
drivers: caam: fix cache invalidation of RSA buffer
When using CAAM to generate an RSA key the CPU caching of the DMA buffers need to be controlled to ensure the correct visibility for both devices. For the n parameter the wrong address was used when invalidating the CPU cache after the DMA operation, resulting in <key length> bytes of the stack being invalidated (without flushing to memory) instead of the buffer.
The first potential consequence of this is that any parts of the n buffer that were cached during the key generation won't get read from RAM, resulting in a corrupt key. This is unlikely since the n buffer was correctly flushed immediately before starting the CAAM operation. To reliably reproduce this, a read that should normally be harmless can be inserted immediately before caam_jr_enqueue: ((volatile uint8_t *)genkey.n.data)[0];
The second effect of this bug is that parts of the do_gen_keypair stack frame will have its cache lines invalidated (again without write back to memory). With 4096 bit keys and a compiler that produces the right stack layout this affects callee saved registers, the return pointer and potentially a stack canary. I have not been able to see the effects of this on my iMX8MQ test device.
Fixes: ccbcceeb73c1 ("drivers: caam: add CAAM key support for RSA") Signed-off-by: Martin Nyhus <martin@nyhus.dev> Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| 30b35537 | 27-Feb-2026 |
Martin Nyhus <martin@nyhus.dev> |
drivers: caam: handle serialization of short params
Adjusts the caam key serialization code to account for keys where sec_size < buf.length. When that is the case the serialization can only touch th
drivers: caam: handle serialization of short params
Adjusts the caam key serialization code to account for keys where sec_size < buf.length. When that is the case the serialization can only touch the first sec_size bytes since the rest are invalid, and the serialized length is thus sec_size.
If the default key type has been changed to plain this can happen during RSA keygen if the d parameter ends up shorter than the key size in bytes. In that case the valid bytes are at the front of the buffer and do_gen_keypair accounts for this by setting sec_size correctly, and caam_key_serialize_to_bn is called with an inkey in the sec_size < buf.length state. This ended up creating corrupt keys for roughly 1% of keygens, and was caught by various RSA tests in optee_test.
Fixes: 1495f6c4a82a ("drivers: caam: add CAAM key driver") Signed-off-by: Martin Nyhus <martin@nyhus.dev> Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| ea36ae9b | 27-Feb-2026 |
Martin Nyhus <martin@nyhus.dev> |
drivers: caam: fix bits/bytes confusion
Fixes two mixups of bits and bytes in caam_key_init that roughly cancel each other out. Both sec_size and the result from caam_key_serialized_size are values
drivers: caam: fix bits/bytes confusion
Fixes two mixups of bits and bytes in caam_key_init that roughly cancel each other out. Both sec_size and the result from caam_key_serialized_size are values in bytes, so the key sizes in bits need to be converted. For plain text keys this makes no difference to the result since they cancel each other out exactly.
For the default key type of BLACK_CCM the blob overhead is now correctly counted as bytes instead of bits which decreases the headroom, but since the default config of 4576 was calculated correctly, the assert still shouldn't fail.
Fixes: 1495f6c4a82a ("drivers: caam: add CAAM key driver") Signed-off-by: Martin Nyhus <martin@nyhus.dev> Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| 3ca5b314 | 09-Feb-2026 |
Zexi Yu <yuzexi@hisilicon.com> |
driver: crypto: hisilicon: fix qm timeout variable type
The type of the timeout variable is fixed to prevent overflow
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com> Acked-by: Jens Wiklander <jens.wi
driver: crypto: hisilicon: fix qm timeout variable type
The type of the timeout variable is fixed to prevent overflow
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cfa66f03 | 04-Feb-2026 |
Zexi Yu <yuzexi@hisilicon.com> |
driver: crypto: hisilicon: fix CKEY_LEN macro value
Fix CKEY_LEN macro value for hisilicon SEC driver
Fixes: 562874beda99 ("drivers: crypto: hisilicon: Add cipher algorithm") Signed-off-by: Zexi Yu
driver: crypto: hisilicon: fix CKEY_LEN macro value
Fix CKEY_LEN macro value for hisilicon SEC driver
Fixes: 562874beda99 ("drivers: crypto: hisilicon: Add cipher algorithm") Signed-off-by: Zexi Yu <yuzexi@hisilicon.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e9eaf44a | 03-Feb-2026 |
Jens Wiklander <jens.wiklander@linaro.org> |
drivers: crypto: fix SM2 ECC encrypt and decrypt
Adds checks that the destination buffer has room for the result in ecc_sm2_decrypt() and ecc_sm2_encrypt(). Note that these two functions not reachab
drivers: crypto: fix SM2 ECC encrypt and decrypt
Adds checks that the destination buffer has room for the result in ecc_sm2_decrypt() and ecc_sm2_encrypt(). Note that these two functions not reachable upstream since none of the crypto drivers registers ECC encrypt or decrypt drivers. So fix this before it becomes a problem.
Fixes: f4f85ac774af ("drivers: crypto: add SM2 ECC encrypt and decrypt") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Zexi Yu <yuzexi@hisilicon.com>
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| 19dc9e1b | 18-Dec-2025 |
Martin Nyhus <martin@nyhus.dev> |
drivers: caam: improve empty aad updates
In caam_ae_update_aad an update without data was already handled as long as the data pointer was NULL. This change updates the logic to also account for the
drivers: caam: improve empty aad updates
In caam_ae_update_aad an update without data was already handled as long as the data pointer was NULL. This change updates the logic to also account for the case where the pointer is non-null but the length is zero. When that was the case caam_cpy_buf would exit early without allocating, leaving aad->data as NULL, making caam_cpy_block_src fail.
This was found through the Android Keymint tests because Rust represents empty buffers (Rust slices) with a non-null pointer and length 0.
Fixes: faaf0c5975d2 ("drivers: caam: Add AES GCM") Signed-off-by: Martin Nyhus <martin@nyhus.dev> Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| f224797a | 19-Nov-2025 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: update struct get_info_rsp{} fields
update struct get_info_rsp{} fields
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.or
drivers: ele: update struct get_info_rsp{} fields
update struct get_info_rsp{} fields
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 212ccf03 | 01-Apr-2025 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: enable getting HUK/RNG from ELE on i.MX943
Enable support for getting HUK/RNG from ELE on i.MX943
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Rouven Czerwinski <r
drivers: ele: enable getting HUK/RNG from ELE on i.MX943
Enable support for getting HUK/RNG from ELE on i.MX943
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 79b6146c | 18-Jul-2025 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: remove sab_init() initialization
ELE firmware has been divided into 2 firmwares for i.MX8ULP and i.MX95: Primary and secondary firmware. SAB init command is in Secondary firmware, whic
drivers: ele: remove sab_init() initialization
ELE firmware has been divided into 2 firmwares for i.MX8ULP and i.MX95: Primary and secondary firmware. SAB init command is in Secondary firmware, which will be loaded when rootfs comes up, so this command is not available when OP-TEE is initializing. Moreover, we are not using any ELE command which is available in secondary firmware, So removing sab_init() function. Will add it when it will be used in driver.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| de9f0c25 | 18-Jul-2025 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: update struct get_info_rsp{} fields
There has been an addition of PQC related fields in Get Info Command response for i.MX95.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Ac
drivers: ele: update struct get_info_rsp{} fields
There has been an addition of PQC related fields in Get Info Command response for i.MX95.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3d8c192a | 14-Jul-2025 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: enable getting HUK/RNG from ELE on imx95
Enable support of getting HUK and RNG from ELE on imx95
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.
drivers: ele: enable getting HUK/RNG from ELE on imx95
Enable support of getting HUK and RNG from ELE on imx95
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 49c69443 | 15-May-2025 |
Pavel Löbl <pavel@loebl.cz> |
caam: fix compilation when CFG_NXP_CAAM_AE_* are disabled
Similarly to other CAAM modules, define empty function if CAAM AE is not used, to avoid undefined reference to caam_ae_init().
Signed-off-b
caam: fix compilation when CFG_NXP_CAAM_AE_* are disabled
Similarly to other CAAM modules, define empty function if CAAM AE is not used, to avoid undefined reference to caam_ae_init().
Signed-off-by: Pavel Löbl <pavel@loebl.cz> Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 80e8ddc0 | 24-Apr-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
crypto: stm32: fix stm32_saes CTR mode on small input buffers
Fix missing cast when saving pre-computed masks in STM32 SAES driver CTR implementation when several small input data is provided to the
crypto: stm32: fix stm32_saes CTR mode on small input buffers
Fix missing cast when saving pre-computed masks in STM32 SAES driver CTR implementation when several small input data is provided to the update handler.
The issue is revealed by xtest regression_4017 when run with at least level 12, e.g. "xtest -l 15 regression_4017".
Fixes: 4320f5cf30c5 ("crypto: stm32: SAES cipher support") Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a9b7c5a8 | 23-Apr-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
crypto: stm32: fix stm32_cryp CTR mode on small input buffers
Fix missing cast when saving pre-computed masks in STM32 CRYP driver CTR implementation when several small input data is provided to the
crypto: stm32: fix stm32_cryp CTR mode on small input buffers
Fix missing cast when saving pre-computed masks in STM32 CRYP driver CTR implementation when several small input data is provided to the update handler.
The issue could be found, for example, by assigning STM32 CRYP to OP-TEE in stm32mp1-157C_DK2 board DTS file (patch below) and running xtest regression_4017 with level 15 ("xtest -l 15 regression_4017").
Example of a patch on stm32mp157c-dk2.dts file to use CRYP driver for AES operations: +&cryp1 { status = "okay"; }; + &etzpc { st,decprot = (...) - <DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, + <DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_S_RW, DECPROT_UNLOCK)>, (...) }
Fixes: 5e64ae6796b7 ("crypto: stm32: use CRYP IP for CIPHER algorithms") Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e880aa97 | 13-Sep-2021 |
Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> |
crypto: stm32: use HASH IP for HASH and HMAC algorithm
Add HASH IP drivers, and add hooks in OP-TEE crypto framework to use HASH IP to do HASH and HMAC process
Signed-off-by: Nicolas Toromanoff <ni
crypto: stm32: use HASH IP for HASH and HMAC algorithm
Add HASH IP drivers, and add hooks in OP-TEE crypto framework to use HASH IP to do HASH and HMAC process
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 85a5d97e | 03-May-2023 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: rng: get random number from ELE
TEE_GenerateRandom() supported by ELE get random command on imx93 & imx91.
Issues in the ELE FW have been found when both, secure and non-secure worlds
drivers: ele: rng: get random number from ELE
TEE_GenerateRandom() supported by ELE get random command on imx93 & imx91.
Issues in the ELE FW have been found when both, secure and non-secure worlds are communicating with ELE.
To prevent any issue, rely on RNG software in OPTEE. The compilation of hw_get_random_bytes() is conditioned by CFG_WITH_SOFTWARE_PRNG. Set CFG_WITH_SOFTWARE_PRNG=y by default.
With CFG_WITH_SOFTWARE_PRNG enabled in OP-TEE, ELE will not be used in OP-TEE at runtime and Linux can access the ELE without conflicts.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Olivier Masse <olivier.masse@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4734f2cf | 02-Aug-2023 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: add SAB init command
There has been addition of SAB init command for initializing the Edgeleock enclave services.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens
drivers: ele: add SAB init command
There has been addition of SAB init command for initializing the Edgeleock enclave services.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f680c915 | 02-Aug-2023 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
drivers: ele: update session open command parameters
Update session open command parameters to be compatible with ELE FW API doc
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jen
drivers: ele: update session open command parameters
Update session open command parameters to be compatible with ELE FW API doc
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bc7d76b6 | 11-May-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: ele: allocate data in heap for HUK derivation
Use the heap and the ELE memory allocator instead of using the stack.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahi
drivers: ele: allocate data in heap for HUK derivation
Use the heap and the ELE memory allocator instead of using the stack.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 66810831 | 11-May-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: ele: use the baseline API to retrieve the UID
Use the baseline API instead of the HSM to retrieve the UID. These two API calls are duplicates and the HSM call is soon deprecated.
Signed-of
drivers: ele: use the baseline API to retrieve the UID
Use the baseline API instead of the HSM to retrieve the UID. These two API calls are duplicates and the HSM call is soon deprecated.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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