| d2a2d362 | 06-Jun-2023 |
Balint Dobszay <balint.dobszay@arm.com> |
core: sp: fix session handling in sp_first_run
Currently the error handling after sp_enter() calls vm_unmap() without activating the correct session with ts_push_current_session(), fix this. Also fi
core: sp: fix session handling in sp_first_run
Currently the error handling after sp_enter() calls vm_unmap() without activating the correct session with ts_push_current_session(), fix this. Also fix the returned error code to use TEE_* instead of FFA_*.
Fixes: 6d618ba1d612 ("core: sp: map device regions from SP manifest") Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| 8e42ac92 | 03-May-2023 |
Balint Dobszay <balint.dobszay@arm.com> |
core: sp: fix unmap in sp_first_run
Fix the usage of vm_unmap() in sp_first_run. The functions expects the memory size as the last argument, but currently the number of pages is passed instead.
Fix
core: sp: fix unmap in sp_first_run
Fix the usage of vm_unmap() in sp_first_run. The functions expects the memory size as the last argument, but currently the number of pages is passed instead.
Fixes: 7e8d05e4c35d ("core: sp: Pass manifest fdt to SP") Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| be53ee7b | 06-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: fix default setting GPIO as non-secure
Fixes STM32MP13 sequence that default configures GPIO as non-secure from set_all_gpios_non_secure() registered at early_init_late initcall level
plat-stm32mp1: fix default setting GPIO as non-secure
Fixes STM32MP13 sequence that default configures GPIO as non-secure from set_all_gpios_non_secure() registered at early_init_late initcall level, that is at same level driver are initially probed by dt_driver framework. This result on set_all_gpios_non_secure() possibly needing a bank resource before it is probed. Fix that by removing initcall function set_all_gpios_non_secure() and default configuring GPIO pins for STM32MP13 variant on their GPIO bank registering.
Fixes: 077d486ef09d ("drivers: stm32_gpio: add helper function stm32_gpio_get_bank()") Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ca1a94a1 | 30-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: enable CFG_DRIVERS_GPIO
Enables CFG_DRIVERS_GPIO for platform stm32mp1.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@
plat-stm32mp1: enable CFG_DRIVERS_GPIO
Enables CFG_DRIVERS_GPIO for platform stm32mp1.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 145953d5 | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove unused gpio bank base address helper function
Removes stm32mp1 platform helper function stm32_get_gpio_bank_base().
Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked
plat-stm32mp1: remove unused gpio bank base address helper function
Removes stm32mp1 platform helper function stm32_get_gpio_bank_base().
Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7c67e9ca | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove unused gpio bank clock helper functions
Removes stm32mp1 platform helper functions stm32_get_gpio_bank_clock() and stm32_get_gpio_bank_clk().
Acked-by: Lionel Debieve <lionel.
plat-stm32mp1: remove unused gpio bank clock helper functions
Removes stm32mp1 platform helper functions stm32_get_gpio_bank_clock() and stm32_get_gpio_bank_clk().
Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ba69abea | 16-Feb-2023 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
arm: Add Aspeed AST2700 platform support
Aspeed AST2700 is a quad-core SoC with ARM Cortex-A35 CPU. This patch adds the platform support for AST2700 to execute 64-bits OP-TEE on top of ARMv8 TrustZo
arm: Add Aspeed AST2700 platform support
Aspeed AST2700 is a quad-core SoC with ARM Cortex-A35 CPU. This patch adds the platform support for AST2700 to execute 64-bits OP-TEE on top of ARMv8 TrustZone features.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2e5a3b0d | 26-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Implement function to print kernel stack
Implement the function to print the kernel stack. The code is referenced from ARM architecture.
Signed-off-by: Alvin Chang <alvinga@andestech.c
core: riscv: Implement function to print kernel stack
Implement the function to print the kernel stack. The code is referenced from ARM architecture.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4450510c | 26-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Add read_fp() and read_pc()
Implement inline functions to read PC and FP. This is required to trace back the kernel stack.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by:
core: riscv: Add read_fp() and read_pc()
Implement inline functions to read PC and FP. This is required to trace back the kernel stack.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b498b831 | 26-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Update the kernel mode unwinding
The data structure for RISC-V does not have sp, remove it in the function. Also the function and structure are renamed.
Signed-off-by: Alvin Chang <alv
core: riscv: Update the kernel mode unwinding
The data structure for RISC-V does not have sp, remove it in the function. Also the function and structure are renamed.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 27be144d | 26-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Add core compiler flags for stack unwinding
When the CFG_UNWIND is enabled, the frame pointer should not be omitted by compiler. Add "-fno-omit-frame-pointer" compiler flag when we enab
core: riscv: Add core compiler flags for stack unwinding
When the CFG_UNWIND is enabled, the frame pointer should not be omitted by compiler. Add "-fno-omit-frame-pointer" compiler flag when we enable the CFG_UNWIND to let compiler not to omit the frame pointer.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 37a778a5 | 26-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Save and restore register s0 when trap occurs
In RISC-V the frame pointer is stored into register s0. It is necessary to save/restore s0 when we enable CFG_UNWIND to process stack unwin
core: riscv: Save and restore register s0 when trap occurs
In RISC-V the frame pointer is stored into register s0. It is necessary to save/restore s0 when we enable CFG_UNWIND to process stack unwinding.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| aeee5d74 | 30-May-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Correct sp before boot_init_primary_late()
Fix the stack pointer according to mentioned commits. The sp should be assigned as thread#0's stack pointer, and the flag that indicates usage
core: riscv: Correct sp before boot_init_primary_late()
Fix the stack pointer according to mentioned commits. The sp should be assigned as thread#0's stack pointer, and the flag that indicates usage of the temporary stack must be cleared before boot_init_primary_late() is called. After boot_init_primary_late() is returned, we restore the previous sp and set the flag again.
Fixes: 59ac3801b756 ("core: split boot_init_primary()") Fixes: 1d88c0c03f3b ("core: clear temporary stack flag before entering boot_init_primary_late()")' Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 28a029b5 | 23-May-2023 |
Margarita Glushkin <rutigl@gmail.com> |
core: add plat-nuvoton
Adds support to Nuvoton npcm845x
Co-developed-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-
core: add plat-nuvoton
Adds support to Nuvoton npcm845x
Co-developed-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Margarita Glushkin <rutigl@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f7a5c21e | 29-May-2023 |
Jerome Forissier <jerome.forissier@linaro.org> |
arm64: memtag: strip tag from crash dumps
The MTE tag is not really useful when displaying a crash dump. In fact it makes it more complicated for tools like script/symbolize.py to retrieve the actua
arm64: memtag: strip tag from crash dumps
The MTE tag is not really useful when displaying a crash dump. In fact it makes it more complicated for tools like script/symbolize.py to retrieve the actual (untagged) virtual address, especially as we now support non-Arm architectures and therefore blindly stripping the MTE bits is not possible.
This commit strips the tag in call stacks displayed by print_stack_arm64(). It also removes it from the virtual address shown on abort (__print_abort_info()) since symbolize.py does try to resolve the address as symbol + offset ; but in this case the tagged address is printed as well, because it can be helpful to diagnose tag check faults.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9cc3a2ff | 25-Apr-2023 |
Imre Kis <imre.kis@arm.com> |
core: spmc: configure SP's NS interrupt action based on the manifest
Use mandatory ns-interrupts-action SP manifest property to configure signaled or queued non-secure interrupt handling.
Signed-of
core: spmc: configure SP's NS interrupt action based on the manifest
Use mandatory ns-interrupts-action SP manifest property to configure signaled or queued non-secure interrupt handling.
Signed-off-by: Imre Kis <imre.kis@arm.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4d028847 | 18-Apr-2023 |
Imre Kis <imre.kis@arm.com> |
core: spmc: handle non-secure interrupts
Add FFA_INTERRUPT and FFA_RUN support for signaling non-secure interrupts and for resuming to the secure world. If a secure partition is preempted by a non-s
core: spmc: handle non-secure interrupts
Add FFA_INTERRUPT and FFA_RUN support for signaling non-secure interrupts and for resuming to the secure world. If a secure partition is preempted by a non-secure interrupt OP-TEE saves the SP's state and sends an FFA_INTERRUPT to the normal world. After handling the interrupt the normal world should send an FFA_RUN to OP-TEE so it can continue running the SP. If OP-TEE is the active FF-A endpoint (i.e. it is running TAs) the non-secure interrupts are signaled by the existing OPTEE_FFA_YIELDING_CALL_RETURN_INTERRUPT message instead of FFA_INTERRUPT.
Signed-off-by: Imre Kis <imre.kis@arm.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2a5482f7 | 30-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: add missing inclusion of stm32_gpio.h
Adds inclusion of stm32_gpio.h from main.c that is needed when CFG_STM32MP13 is enabled.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org
plat-stm32mp1: add missing inclusion of stm32_gpio.h
Adds inclusion of stm32_gpio.h from main.c that is needed when CFG_STM32MP13 is enabled.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| cae2bfff | 23-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove unused stm32mp_gpio_bank_is_shared()
Removes platform function stm32mp_gpio_bank_is_shared() that is not used.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-b
plat-stm32mp1: remove unused stm32mp_gpio_bank_is_shared()
Removes platform function stm32mp_gpio_bank_is_shared() that is not used.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e1aad7e9 | 24-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: riscv: fix interrupt_main_handler() reference
Fixes itr_core_handler() reference in RiscV architecture that was renamed interrupt_main_handler() in commit referred below.
Fixes: 358bf47c0612
core: riscv: fix interrupt_main_handler() reference
Fixes itr_core_handler() reference in RiscV architecture that was renamed interrupt_main_handler() in commit referred below.
Fixes: 358bf47c0612 ("core: interrupt: rename itr_core_handler()") Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ffa93873 | 04-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: initialize my_rxtx.size
Adds missing initialization of my_rxtx.size with CFG_CORE_SEL2_SPMC=y.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balin
core: ffa: initialize my_rxtx.size
Adds missing initialization of my_rxtx.size with CFG_CORE_SEL2_SPMC=y.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f49f23f7 | 03-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: rename nw_rxtx to my_rxtx
Renames nw_rxtx to my_rxtx to be more clear when we have an SPMC at S-EL2 and the rxtx buffer is shared with the SPMC instead of normal world.
Reviewed-by: Jero
core: ffa: rename nw_rxtx to my_rxtx
Renames nw_rxtx to my_rxtx to be more clear when we have an SPMC at S-EL2 and the rxtx buffer is shared with the SPMC instead of normal world.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 923f61cd | 03-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: support FFA_VERSION from S-EL0 SPs only
FFA_VERSION using ERET as conduit is not permitted in the FF-A specification. So remove support for it in thread_spmc_msg_recv() but keep it in spm
core: ffa: support FFA_VERSION from S-EL0 SPs only
FFA_VERSION using ERET as conduit is not permitted in the FF-A specification. So remove support for it in thread_spmc_msg_recv() but keep it in spmc_sp_msg_handler() for S-EL0 SPs where the conduit is SVC.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 412d46f6 | 02-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: support FFA_SPM_ID_GET
Supports the FFA_SPM_ID_GET function introduced with FF-A v1.1.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobsza
core: ffa: support FFA_SPM_ID_GET
Supports the FFA_SPM_ID_GET function introduced with FF-A v1.1.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8af78138 | 02-May-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: rename spmc_get_id() to get_my_id()
Renames spmc_get_id() to get_my_id() in order to avoid confusion with the function FFA_SPM_ID_GET introduced with FF-A v1.1.
Reviewed-by: Jerome Foris
core: ffa: rename spmc_get_id() to get_my_id()
Renames spmc_get_id() to get_my_id() in order to avoid confusion with the function FFA_SPM_ID_GET introduced with FF-A v1.1.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Balint Dobszay <balint.dobszay@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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