drivers: convert sprd_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne

drivers: convert sprd_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert serial8250_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: E

drivers: convert serial8250_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert cdns_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne

drivers: convert cdns_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert imx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne

drivers: convert imx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert hi16xx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etien

drivers: convert hi16xx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert pl011 driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Car

drivers: convert pl011 driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: mm: add phys_to_virt_io()

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@

core: mm: add phys_to_virt_io()

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-vexpress: define SDP memory

qemu_virt and qemu_armv8 register a SDP memory at the bottom 3MByte
of the QEMU secure RAM.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-b

plat-vexpress: define SDP memory

qemu_virt and qemu_armv8 register a SDP memory at the bottom 3MByte
of the QEMU secure RAM.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (qemu, b2260, GP)

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core: allow SDP buffers as memory reference parameters

Before this change, at OP-TEE entry (from non secure), memory
reference parameters needed to match the 'shm_mobj': the nonsecure
shared memory.

core: allow SDP buffers as memory reference parameters

Before this change, at OP-TEE entry (from non secure), memory
reference parameters needed to match the 'shm_mobj': the nonsecure
shared memory.

This change allows memory reference parameters to match the
registered SDP memories and be used when invoking TA that
claimed the SDP support through TA_FLAG_SECURE_DATA_PATH.

As SDP memory is not default mapped in OP-TEE core, nonsecure cannot
invoke a pseudo/static TA with a SDP memref parameter. only a user TA
can invoke a pseudo/static TA with a SDP memref parameter.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: identify SDP memories though memory objects

SDP memory objects are used to identified memref parameters
related to Secure-Data-Path.

This change creates SDP memory objects during inits. Each

core: identify SDP memories though memory objects

SDP memory objects are used to identified memref parameters
related to Secure-Data-Path.

This change creates SDP memory objects during inits. Each mobj
identifies a registered SDP memory.

SDP memory object are not default mapped to core, hence a default
null virtual address.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: platform registers SDP memories

Secure data path support is conditioned to CFG_SECURE_DATA_PATH.

Core statically defines the SDP shared memory objects through macro
register_sdp_shm().

Confi

core: platform registers SDP memories

Secure data path support is conditioned to CFG_SECURE_DATA_PATH.

Core statically defines the SDP shared memory objects through macro
register_sdp_shm().

Configuration directives CFG_TEE_SDP_SHM_BASE/_SIZE allow to register
a "default" SDP memory area from generic implementation.

SDP memories are not default map in OP-TEE core hence locations
are not tested against OP-TEE memory layout. This change verifies
the SDP memories layout against OP-TEE memory mapping memory. This
is mandatory to prevent false identification of memory references
if referring only to the list of the registered SDP memories when
identifying a memory reference (later changes for SDP support).

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: minor cleaning in cache resources

Do not hard code the enumerated 'cache_op' IDs.
Remove unsupported (and unused) WRITE_BUFFER_DRAIN operation.
Deprecate L2CACHE_xxx operation IDs and use the

core: minor cleaning in cache resources

Do not hard code the enumerated 'cache_op' IDs.
Remove unsupported (and unused) WRITE_BUFFER_DRAIN operation.
Deprecate L2CACHE_xxx operation IDs and use the already existing
DCACHE_xxx operation IDs instead.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: rename cache_maintenance_l1() into cache_op_inner()

Rename cache_maintenance_l1() into cache_op_inner() to prevent
confusion as the function targets inner cache and not only level1
cache.

Fix

core: rename cache_maintenance_l1() into cache_op_inner()

Rename cache_maintenance_l1() into cache_op_inner() to prevent
confusion as the function targets inner cache and not only level1
cache.

Fix return type of cache_op_inner().

Suggested-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: rename cache_maintenance_l2() into cache_op_outer()

Rename cache_maintenance_l2() into cache_op_outer() to prevent
confusion as the function targets outer cache only, not specific
level2 cache

core: rename cache_maintenance_l2() into cache_op_outer()

Rename cache_maintenance_l2() into cache_op_outer() to prevent
confusion as the function targets outer cache only, not specific
level2 cache, even if current implementation supports only the
PL310 that is mainly used as a level2 cache.

Fix return type of cache_op_outer().

Suggested-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: prevent useless cache clean on cache flush operation

If there is no outer cache, a cache flush request ends in a cache
clean followed by a cache flush sequence. This change prevents former
cac

core: prevent useless cache clean on cache flush operation

If there is no outer cache, a cache flush request ends in a cache
clean followed by a cache flush sequence. This change prevents former
cache clean request in case no outer cache is supported. Note that
the sole outer cache currently supported is the PL310.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: move cache_operation() out of SVC cache services

cache_operation() is moved to a specific tee/cache.c source file.
This will allow core to call cache maintenance routine without
needing to rel

core: move cache_operation() out of SVC cache services

cache_operation() is moved to a specific tee/cache.c source file.
This will allow core to call cache maintenance routine without
needing to rely on the cache maintenance SVC services.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: move svc_cache.h from local directory to generic includes

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by:

core: move svc_cache.h from local directory to generic includes

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: rename type t_cache_operation_id

Rename defined enumerate type "t_cache_operation_id" into
"enum cache_op".

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome F

core: rename type t_cache_operation_id

Rename defined enumerate type "t_cache_operation_id" into
"enum cache_op".

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-zynq7k: fix NSACR initialization

Bits #9..#0 of CPU register NSACR are specified by ARM as SBZP ("Set
Bit to Zero or Preserve on write"). This change fixes plat-zynq7k to
conform with the specs

plat-zynq7k: fix NSACR initialization

Bits #9..#0 of CPU register NSACR are specified by ARM as SBZP ("Set
Bit to Zero or Preserve on write"). This change fixes plat-zynq7k to
conform with the specs.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: fix comments for ACTRL and NSACR initialization

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

core: use mov_imm instead of movw/movt

Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklan

core: use mov_imm instead of movw/movt

Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-zynq7k: fix cpu power control register init

Before this change, a reserved bit was set in the PCR instead of
enabling the clock gating support, as configured in other supported
Cortex-A9 platfo

plat-zynq7k: fix cpu power control register init

Before this change, a reserved bit was set in the PCR instead of
enabling the clock gating support, as configured in other supported
Cortex-A9 platforms.

Reported-by: Yves Lefloch <YvesMarie_Lefloch@sigmadesigns.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: introduce TA_FLAG_SECURE_DATA_PATH

Rename TA_FLAG_UNSAFE_NW_PARAMS into TA_FLAG_SECURE_DATA_PATH.

This change does NOT able secure data path support in OP-TEE. It is
rather a pre-requisite fo

core: introduce TA_FLAG_SECURE_DATA_PATH

Rename TA_FLAG_UNSAFE_NW_PARAMS into TA_FLAG_SECURE_DATA_PATH.

This change does NOT able secure data path support in OP-TEE. It is
rather a pre-requisite for later changes in OP-TEE regarding SDP
support.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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core: fix plat_cpu_reset_early weak definition

The plat_cpu_reset_early() function is invoked from early start-up
code even before the stack is setup. Therefore it is not correct
to define this func

core: fix plat_cpu_reset_early weak definition

The plat_cpu_reset_early() function is invoked from early start-up
code even before the stack is setup. Therefore it is not correct
to define this function in C. This change moves the weak function
from C source to assembly source implementation.

Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: ignore ~OPTEE_SMC_NSEC_CAP_UNIPROCESSOR

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklan

core: arm: ignore ~OPTEE_SMC_NSEC_CAP_UNIPROCESSOR

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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