core: arm32: generate system register access code

Replaces the hand crafted system register code in <arm32.h> and
<arm32_macros.S> with generated code based on arm32_sysreg.txt which is
extracted fr

core: arm32: generate system register access code

Replaces the hand crafted system register code in <arm32.h> and
<arm32_macros.S> with generated code based on arm32_sysreg.txt which is
extracted from the ARM Architecture Reference Manual.

The remaining hand crafted code for cp15 accesses is not covered by the
ARM Architecture Reference Manual.

A script is added to generate both assembly macros and static inline
functions to access the system registers.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: rename read_idpfr1() to read_id_pfr1()

Renames the assembly macro read_idpfr1() to read_id_pfr1() to use the
real register name.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Si

core: rename read_idpfr1() to read_id_pfr1()

Renames the assembly macro read_idpfr1() to read_id_pfr1() to use the
real register name.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: rename to read_pmu_ccnt() to read_pmccntr()

Renames read_pmu_ccnt() to read_pmccntr() to use the real register name.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by:

core: rename to read_pmu_ccnt() to read_pmccntr()

Renames read_pmu_ccnt() to read_pmccntr() to use the real register name.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: arm: sm: optimize padding in struct sm_ctx

Removes redundant padding in struct sm_ctx and sub-structs with regards
to CFG_SM_NO_CYCLE_COUNTING. Saves 4 bytes per core if
CFG_SM_NO_CYCLE_COUNT

core: arm: sm: optimize padding in struct sm_ctx

Removes redundant padding in struct sm_ctx and sub-structs with regards
to CFG_SM_NO_CYCLE_COUNTING. Saves 4 bytes per core if
CFG_SM_NO_CYCLE_COUNTING is defined.

Removes assumptions in monitor assembly code about where the padding in
struct sm_ctx is located.

Adds compile time asserts are added to check that struct sm_ctx is
properly aligned.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: arm: sm: fix FIQ from normal world

When compiled with "CFG_SM_NO_CYCLE_COUNTING=y" sm_save_unbanked_regs()
doesn't return with r0 pointing to ctx->nsec.r8 even if that's assumed
in sm_fiq_entr

core: arm: sm: fix FIQ from normal world

When compiled with "CFG_SM_NO_CYCLE_COUNTING=y" sm_save_unbanked_regs()
doesn't return with r0 pointing to ctx->nsec.r8 even if that's assumed
in sm_fiq_entry(). Fixes this by calculating the pointer based on sp
instead or relying on a certain value in r0.

Fixes: 8267e19bbcce ("core: arm: sm: initialize PMCR.DP to 1 and save/restore PMCR")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-ls:add LS2088ARDB platform flavors

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

plat-ls:add LS1088ARDB platform flavors

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.co

plat-ls:add LS1088ARDB platform flavors

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>

show more ...

plat-ls:add LS1012AFRWY platform flavors

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.c

plat-ls:add LS1012AFRWY platform flavors

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

show more ...

core:arch:arm:plat-ls: make generic layout for all platforms

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <

core:arch:arm:plat-ls: make generic layout for all platforms

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

show more ...

core:arch:arm:plat-ls: remove platform specific function get_core_pos_mpidr

get_core_pos_mpidr return value was being set as MPIDR_CPU_MASK
which returned only the core ID, and ignored the cluster v

core:arch:arm:plat-ls: remove platform specific function get_core_pos_mpidr

get_core_pos_mpidr return value was being set as MPIDR_CPU_MASK
which returned only the core ID, and ignored the cluster value.
Hence all threads that were requested execution by optee_os, were
getting serviced only by the cores of 1st cluster, irrespective of
the number of clusters present. Hence removing the file and getting
the value from generic function that returns correct core_id based
on the cluster it belongs to.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Vinitha V Pillai <vinitha.pillai@nxp.com>

show more ...

plat-sunxi: Add Allwinner A64 support

This commit adds support for pine64[1] board based on
Allwinner's A64 SoC.

1. Build command

# make PLATFORM=sunxi-sun50i_a64

2. Pass optee_example_hello_

plat-sunxi: Add Allwinner A64 support

This commit adds support for pine64[1] board based on
Allwinner's A64 SoC.

1. Build command

# make PLATFORM=sunxi-sun50i_a64

2. Pass optee_example_hello_world and xtest.

[1]: https://www.pine64.org/

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>

show more ...

sm: pm_a32: typo fix

typo fix: do->pm

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

abort.c: manipulate with VFP state only if thread is active

abort_handler() can be called both within and without thread
context. In the latter case it stops on
assert(thread_get_exceptions() & THRE

abort.c: manipulate with VFP state only if thread is active

abort_handler() can be called both within and without thread
context. In the latter case it stops on
assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR)
in thread_kernel_save_vfp() and no information about abort is displayed.

This assert fires during some initialization stages and during
fast SMCs, because they are handled with foreign interrupts disabled.

To fix this, we should call thread_kernel_{save,restore}_vfp() only
when foreign interrupts are enabled.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

show more ...

core: arm: ree_fs: fix free hash_ctx

Properly free hash_ctx by calling crypto_hash_free_ctx
instead of the generic free function.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-

core: arm: ree_fs: fix free hash_ctx

Properly free hash_ctx by calling crypto_hash_free_ctx
instead of the generic free function.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

show more ...

imx: cleanup configuration

Cleanup configuration to make it easy to add new platforms.
Make most configurations be common to CFG_MX6/7.
Normally only need to define CFG_DDR_SIZE and CFG_NS_ENTRY_ADD

imx: cleanup configuration

Cleanup configuration to make it easy to add new platforms.
Make most configurations be common to CFG_MX6/7.
Normally only need to define CFG_DDR_SIZE and CFG_NS_ENTRY_ADDR
to support new platforms.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

arm32: add assembly directive: .arch_extension sec

When compiling with -mcpu=cortex-a9, GCC 8.1 fails on the smc instruction:

$ make -s PLATFORM=stm CROSS_COMPILE32=<GCC8.1 path>/arm-linux-gnueabi

arm32: add assembly directive: .arch_extension sec

When compiling with -mcpu=cortex-a9, GCC 8.1 fails on the smc instruction:

$ make -s PLATFORM=stm CROSS_COMPILE32=<GCC8.1 path>/arm-linux-gnueabihf-
core/arch/arm/kernel/thread_a32.S: Assembler messages:
core/arch/arm/kernel/thread_a32.S:44: Error: selected processor does not support `smc #0' in ARM mode
[snip]
mk/compile.mk:146: recipe for target 'out/arm-plat-stm/core/arch/arm/kernel/thread_a32.o' failed
make: *** [out/arm-plat-stm/core/arch/arm/kernel/thread_a32.o] Error 1

Use the '.arch_extension sec' directive to allow the assembler to emit
the instruction.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>

show more ...

core_self_tests.c: fix p1=realloc(p1) issue

This is invalid use of realloc, because it can cause memory leak.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jerome Forissier

core_self_tests.c: fix p1=realloc(p1) issue

This is invalid use of realloc, because it can cause memory leak.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

plat-imx: add i.MX6 Hummingboard Edge platform flavors

Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

plat-imx: make platform flavor list diff friendly

Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

plat-hikey: embed ta/avb as early TA

In order to support AVB in U-boot embed the AVB ta as an early TA.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <je

plat-hikey: embed ta/avb as early TA

In order to support AVB in U-boot embed the AVB ta as an early TA.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

user_ta: should go for other TA stores on any load error

There seems to be an issue that if RPMB_FS is enabled in
OPTEE and TA is present in REE (normal file system), if
priority for secure storage

user_ta: should go for other TA stores on any load error

There seems to be an issue that if RPMB_FS is enabled in
OPTEE and TA is present in REE (normal file system), if
priority for secure storage TA is higher and RPMB
initialization fails, the error is returned and the
OPTEE doesn't goes to find the TA from REE TA store.

The issue is fixed by adding a 'continue' statement after
printing the respective error.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Sourabh Das <sourabhdas143@gmail.com>

show more ...

core: unwind: correct function args for print_stack_arm32/64

When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure:
"
core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32':
core/

core: unwind: correct function args for print_stack_arm32/64

When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure:
"
core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32':
core/arch/arm/kernel/abort.c:113:2: error: too many arguments to function 'print_stack_arm32'
print_stack_arm32(TRACE_ERROR, &state, exidx, exidx_sz, kernel_stack,
^~~~~~~~~~~~~~~~~
"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: define syscall_t as void (*)(void)

syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to
represent a pointer to any system call, in the syscall table for instance.
As such,

core: define syscall_t as void (*)(void)

syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to
represent a pointer to any system call, in the syscall table for instance.
As such, the exact type behind syscall_t cannot reflect all the syscalls
since they have different prototypes. The current declaration with a
TEE_Result return type was probably chosen because it was a common
characteristic of all syscalls to return a TEE_Result.

However, this type causes compilation warnings with GCC 8.1:

core/arch/arm/tee/arch_svc.c:43:36: warning: cast between incompatible function types from ‘void (*)(long unsigned int)’ to ‘TEE_Result (*)(void)’ {aka ‘unsigned int (*)(void)’} [-Wcast-function-type]
#define SYSCALL_ENTRY(_fn) { .fn = (syscall_t)_fn }
^
core/arch/arm/tee/arch_svc.c:50:2: note: in expansion of macro ‘SYSCALL_ENTRY’
SYSCALL_ENTRY(syscall_sys_return),
^~~~~~~~~~~~~

The solution is to use 'void (*)(void)' instead, as explained in the GCC
documentation:

-Wcast-function-type

Warn when a function pointer is cast to an incompatible function
pointer. [...] The function type void (*) (void) is special and matches
everything, which can be used to suppress this warning. [...]

Link: [1] https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

thread: move stacks to separate sections

With this change it is possible to move tmp and abt stacks to kernel
memory area, while leaving thread stacks in tee memory.

Signed-off-by: Volodymyr Babchu

thread: move stacks to separate sections

With this change it is possible to move tmp and abt stacks to kernel
memory area, while leaving thread stacks in tee memory.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

link_dummy.ld: provide __data_start symbol

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>