1PLATFORM_FLAVOR ?= ls1021atwr 2 3$(call force,CFG_GENERIC_BOOT,y) 4$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 5$(call force,CFG_GIC,y) 6$(call force,CFG_16550_UART,y) 7$(call force,CFG_PM_STUBS,y) 8 9$(call force,CFG_DRAM0_BASE,0x80000000) 10$(call force,CFG_TEE_OS_DRAM0_SIZE,0x4000000) 11 12ifeq ($(PLATFORM_FLAVOR),ls1021atwr) 13include core/arch/arm/cpu/cortex-a7.mk 14$(call force,CFG_TEE_CORE_NB_CORE,2) 15$(call force,CFG_DRAM0_SIZE,0x40000000) 16$(call force,CFG_CORE_CLUSTER_SHIFT,2) 17CFG_SHMEM_SIZE ?= 0x00100000 18CFG_BOOT_SYNC_CPU ?= y 19CFG_BOOT_SECONDARY_REQUEST ?= y 20endif 21 22ifeq ($(PLATFORM_FLAVOR),ls1021aqds) 23include core/arch/arm/cpu/cortex-a7.mk 24$(call force,CFG_TEE_CORE_NB_CORE,2) 25$(call force,CFG_DRAM0_SIZE,0x80000000) 26$(call force,CFG_CORE_CLUSTER_SHIFT,2) 27CFG_SHMEM_SIZE ?= 0x00100000 28CFG_BOOT_SYNC_CPU ?= y 29CFG_BOOT_SECONDARY_REQUEST ?= y 30endif 31 32ifeq ($(PLATFORM_FLAVOR),ls1012ardb) 33CFG_HW_UNQ_KEY_REQUEST ?= y 34include core/arch/arm/cpu/cortex-armv8-0.mk 35$(call force,CFG_TEE_CORE_NB_CORE,1) 36$(call force,CFG_DRAM0_SIZE,0x40000000) 37$(call force,CFG_CORE_CLUSTER_SHIFT,2) 38CFG_SHMEM_SIZE ?= 0x00200000 39endif 40 41ifeq ($(PLATFORM_FLAVOR),ls1043ardb) 42CFG_HW_UNQ_KEY_REQUEST ?= y 43include core/arch/arm/cpu/cortex-armv8-0.mk 44$(call force,CFG_TEE_CORE_NB_CORE,4) 45$(call force,CFG_DRAM0_SIZE,0x80000000) 46$(call force,CFG_CORE_CLUSTER_SHIFT,2) 47CFG_SHMEM_SIZE ?= 0x00200000 48endif 49 50ifeq ($(PLATFORM_FLAVOR),ls1046ardb) 51CFG_HW_UNQ_KEY_REQUEST ?= y 52include core/arch/arm/cpu/cortex-armv8-0.mk 53$(call force,CFG_TEE_CORE_NB_CORE,4) 54$(call force,CFG_DRAM0_SIZE,0x80000000) 55$(call force,CFG_CORE_CLUSTER_SHIFT,2) 56CFG_SHMEM_SIZE ?= 0x00200000 57endif 58 59ifeq ($(platform-flavor-armv8),1) 60$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 61CFG_TZDRAM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_TEE_OS_DRAM0_SIZE) 62CFG_TZDRAM_SIZE ?= ( CFG_TEE_OS_DRAM0_SIZE - CFG_SHMEM_SIZE) 63#CFG_SHMEM_START (Non-Secure shared memory) needs to be 2MB aligned boundary for TZASC 380 configuration. 64CFG_SHMEM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_SHMEM_SIZE) 65$(call force,CFG_ARM64_core,y) 66else 67#In ARMv7 platform CFG_SHMEM_SIZE is different to that of ARMv8 platforms. 68CFG_TZDRAM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_TEE_OS_DRAM0_SIZE) 69CFG_TZDRAM_SIZE ?= ( CFG_TEE_OS_DRAM0_SIZE - (2*CFG_SHMEM_SIZE)) 70#CFG_SHMEM_START (Non-Secure shared memory) needs to be 2MB aligned boundary for TZASC 380 configuration. 71CFG_SHMEM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - (2*CFG_SHMEM_SIZE)) 72endif 73 74#Keeping Number of TEE thread equal to number of cores on the SoC 75CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE 76ta-targets = ta_arm32 77 78ifeq ($(CFG_ARM64_core),y) 79$(call force,CFG_WITH_LPAE,y) 80ta-targets = ta_arm64 81else 82$(call force,CFG_ARM32_core,y) 83$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 84endif 85 86CFG_CRYPTO_SIZE_OPTIMIZATION ?= n 87CFG_WITH_STACK_CANARIES ?= y 88