plat-sam: add sama7g5's PDMC gclk clocks to the SCMI clock list

Add PDMC gclk clocks to the SCMI clock list so that they could be
used outside OP-TEE OS.

Signed-off-by: Tony Han <tony.han@microchip

plat-sam: add sama7g5's PDMC gclk clocks to the SCMI clock list

Add PDMC gclk clocks to the SCMI clock list so that they could be
used outside OP-TEE OS.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: add clock range support for the clocks used by SCMI

Add clock range attribute to the struct for the clocks.
New function for initializing the clock range for the clocks.
Implement "plat_sc

plat-sam: add clock range support for the clocks used by SCMI

Add clock range attribute to the struct for the clocks.
New function for initializing the clock range for the clocks.
Implement "plat_scmi_clock_rates_by_step()" to be used by SCMI.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: enable SCMI reset domain management protocol and rstctrl driver

Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienn

plat-sam: enable SCMI reset domain management protocol and rstctrl driver

Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: scmi_server: use SCMI reset to manage USB reset for sama7g5

Enable "reset domain management protocol", add reset domains to SCMI
channel and add functions for SCMI reset domain.

Signed-of

plat-sam: scmi_server: use SCMI reset to manage USB reset for sama7g5

Enable "reset domain management protocol", add reset domains to SCMI
channel and add functions for SCMI reset domain.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@mi

drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: implement PL310 SMC protocol

When Linux runs in normal world, it expects the PL310 to be initially
disabled, and then invokes SMCs to enable it.
Let CFG_PL310_SIP_PROTOCOL=y, and the L2 ca

plat-sam: implement PL310 SMC protocol

When Linux runs in normal world, it expects the PL310 to be initially
disabled, and then invokes SMCs to enable it.
Let CFG_PL310_SIP_PROTOCOL=y, and the L2 cache will be left untouched
until the OS enables it.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sam: register CPU OPP clock for SCMI usage

Add the definitinon for 'AT91_SCMI_CLK_CPU_OPP'.
When the CPU OPP clock is available, add it to SCMI clock list.

Signed-off-by: Tony Han <tony.han@mi

plat-sam: register CPU OPP clock for SCMI usage

Add the definitinon for 'AT91_SCMI_CLK_CPU_OPP'.
When the CPU OPP clock is available, add it to SCMI clock list.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carr

plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: remove CFG_PL310_LOCKED

When locking the PL310 cache, it behaves as disable which lead to poor
performances in Linux.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-b

plat-sam: remove CFG_PL310_LOCKED

When locking the PL310 cache, it behaves as disable which lead to poor
performances in Linux.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: add support for Microchip sama7g54-ek board

Add the main functions for sama7g54 initialize, including:
- console_init()
- Matrix, TZC, TZPM, interrupt related
Update conf.mk and Makefile

plat-sam: add support for Microchip sama7g54-ek board

Add the main functions for sama7g54 initialize, including:
- console_init()
- Matrix, TZC, TZPM, interrupt related
Update conf.mk and Makefile for sama7g5 OP-TEE support.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: rename filename for sama5d2 functions to 'platform_sama5d2.c'

Rename 'main.c' to 'platform_sama5d2.c' in 'core/arch/arm/plat-sam'.
Update the makefile accordingly.

Signed-off-by: Tony Han

plat-sam: rename filename for sama5d2 functions to 'platform_sama5d2.c'

Rename 'main.c' to 'platform_sama5d2.c' in 'core/arch/arm/plat-sam'.
Update the makefile accordingly.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: optimize the macro and makefile for building sama5d2 clocks

Rename 'CFG_DRIVERS_SAMA5D2_CLK' to 'CFG_SAMA5D2'.
Adjust the sequence of source files in 'core/drivers/clk/sam/sub.mk'.

Signed

plat-sam: optimize the macro and makefile for building sama5d2 clocks

Rename 'CFG_DRIVERS_SAMA5D2_CLK' to 'CFG_SAMA5D2'.
Adjust the sequence of source files in 'core/drivers/clk/sam/sub.mk'.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: enable NVMEM unique hardware key and die id support

Enable NVMEM support to allow reading hardware unique key from
the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Sign

plat-sam: enable NVMEM unique hardware key and die id support

Enable NVMEM support to allow reading hardware unique key from
the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: Refactor console_init() and introduce plat_console_init()

Since there are some cross-platform console drivers, we let
console_init() be common code to have a chance to initialize those
console

core: Refactor console_init() and introduce plat_console_init()

Since there are some cross-platform console drivers, we let
console_init() be common code to have a chance to initialize those
console drivers (e.g., semihosting console).

If the cross-platform console drivers are not configured to be compiled,
plat_console_init() will be invoked to initialize platform-specific
console driver.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: implement plat_get_freq() for sama7g5

Sama7g5 platform does not have support for the ARM generic timer
extension, so plat_get_freq() needs to be updated to be able to
probe clocks early us

plat-sam: implement plat_get_freq() for sama7g5

Sama7g5 platform does not have support for the ARM generic timer
extension, so plat_get_freq() needs to be updated to be able to
probe clocks early using the device tree as for the sama5d2.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: register additional sama7g5 clocks for SCMI usage

- Add the macro definitions for each SCMI clock.
- Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Thomas Perrot <thomas

plat-sam: register additional sama7g5 clocks for SCMI usage

- Add the macro definitions for each SCMI clock.
- Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: register sama7g5 clocks for SCMI usage

Add the macro definitions for each SCMI clock.
Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Tony Han <tony.han@microchip.com>
Ac

plat-sam: register sama7g5 clocks for SCMI usage

Add the macro definitions for each SCMI clock.
Add the table of PMC-SCMI map for sama7g5 clocks.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: fix static shared memory address and size

Disable the dynamic shared memory allocation that isn't used on SAM
platforms, otherwise the following issue occurs, since the commit
8a6ca1480ddc

plat-sam: fix static shared memory address and size

Disable the dynamic shared memory allocation that isn't used on SAM
platforms, otherwise the following issue occurs, since the commit
8a6ca1480ddc ("core: arm: get DDR range from embedded DTB"):

I/TC: Embedded DTB found
E/TC:0 0 check_phys_mem_is_outside:409 Non-sec mem (0x20800000:0x1f800000) overlaps map (type 18 0x21400000:0x1000)
E/TC:0 0 Panic at core/mm/core_mmu.c:413 <check_phys_mem_is_outside>
E/TC:0 0 TEE load address @ 0x20000000
E/TC:0 0 Call stack:
E/TC:0 0 0x20005655 print_kernel_stack at core/arch/arm/kernel/unwind_arm32.c:109
E/TC:0 0 0x2001c52d __do_panic at core/kernel/panic.c:80
E/TC:0 0 0x200276c1 check_phys_mem_is_outside at core/mm/core_mmu.c:413
E/TC:0 0 0x2002780f core_mmu_set_discovered_nsec_ddr at core/mm/core_mmu.c:481
E/TC:0 0 0x200050b3 discover_nsec_memory at core/arch/arm/kernel/boot.c:1055
E/TC:0 0 0x20005247 boot_init_primary_late at core/arch/arm/kernel/boot.c:1210
E/TC:0 0 0x200001fc reset_primary at core/arch/arm/kernel/entry_a32.S:532

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: sam: use header file "platform_config.h" instead of "sama5d2.h"

As "sama5d2.h" is included in "platform_config.h" it's better to use
"#include <platform_config.h>" for support more devices

drivers: sam: use header file "platform_config.h" instead of "sama5d2.h"

As "sama5d2.h" is included in "platform_config.h" it's better to use
"#include <platform_config.h>" for support more devices later.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-sam: enable nvmem support

Enable nvmem support to allow reading hardware unique key from the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thoma

plat-sam: enable nvmem support

Enable nvmem support to allow reading hardware unique key from the fuses.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: force CFG_EXTERNAL_DT to n

Because this feature isn't used on SAM platforms and to disable DT
insecure warning.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jens Wik

plat-sam: force CFG_EXTERNAL_DT to n

Because this feature isn't used on SAM platforms and to disable DT
insecure warning.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sam: add the header file for sama7g5

Include <sama7g5.h> in platform_config.h and add definitions to adapt
names already used by sama5d2.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked

plat-sam: add the header file for sama7g5

Include <sama7g5.h> in platform_config.h and add definitions to adapt
names already used by sama5d2.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: matrix: update code to be reuseable for sama7g5

Besides sama5d2, sama7g5 also has the matrix. Following changes are done
to make the code reuseable for supporting sama7g5:
- move definitio

plat-sam: matrix: update code to be reuseable for sama7g5

Besides sama5d2, sama7g5 also has the matrix. Following changes are done
to make the code reuseable for supporting sama7g5:
- move definition of "peri_security_array[]" from matrix.c to main.c
- replace "matrix32_base()" and "matrix64_base()" with "matrix_base()"
- update code according to the above changes

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: fix warnings found during checkpatch

Remove 'extern' from function prototypes in .h files.
Align the parameters in functions.

Signed-off-by: Tony Han <tony.han@microchip.com>
Reviewed-by:

plat-sam: fix warnings found during checkpatch

Remove 'extern' from function prototypes in .h files.
Align the parameters in functions.

Signed-off-by: Tony Han <tony.han@microchip.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: Rename primary_init_intc() to boot_primary_init_intc()

Since interrupt controllers are usually initialized in boot stage,
rename primary_init_intc() to boot_primary_init_intc().

Signed-o

core: arm: Rename primary_init_intc() to boot_primary_init_intc()

Since interrupt controllers are usually initialized in boot stage,
rename primary_init_intc() to boot_primary_init_intc().

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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