xref: /optee_os/core/arch/arm/plat-mediatek/main.c (revision 55ab8f06a831946a49717446cd2e4495a2b5d659)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2015, Linaro Limited
4  */
5 
6 #include <console.h>
7 #include <drivers/gic.h>
8 #include <drivers/serial8250_uart.h>
9 #include <kernel/boot.h>
10 #include <kernel/panic.h>
11 #include <mm/core_memprot.h>
12 #include <platform_config.h>
13 #include <stdint.h>
14 
15 #if (CFG_TEE_CORE_LOG_LEVEL != 0)
16 register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
17 			CONSOLE_UART_BASE, SERIAL8250_UART_REG_SIZE);
18 #endif
19 
20 static struct serial8250_uart_data console_data;
21 
22 register_ddr(CFG_DRAM_BASE, CFG_DRAM_SIZE);
23 
24 #ifdef CFG_GIC
25 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET,
26 			CORE_MMU_PGDIR_SIZE);
27 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICC_OFFSET,
28 			CORE_MMU_PGDIR_SIZE);
29 
boot_primary_init_intc(void)30 void boot_primary_init_intc(void)
31 {
32 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
33 }
34 #endif
35 
plat_console_init(void)36 void plat_console_init(void)
37 {
38 	if (CFG_TEE_CORE_LOG_LEVEL != 0) {
39 		serial8250_uart_init(&console_data, CONSOLE_UART_BASE,
40 				     CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE);
41 		register_serial_console(&console_data.chip);
42 	}
43 }
44