| #
f40bf1ef |
| 09-Jul-2024 |
Thomas Perrot <thomas.perrot@bootlin.com> |
dts: sama5d2: update NVMEM cells
According to the customer Fuse Matrix of sama5d2, the cell length
is 32 bytes.
Fixes: 6c6c4d9eb45d ("dts: sama5d2: add NVMEM die_id node")
Fixes: 8bd542fcb2ae ("dts
dts: sama5d2: update NVMEM cells
According to the customer Fuse Matrix of sama5d2, the cell length
is 32 bytes.
Fixes: 6c6c4d9eb45d ("dts: sama5d2: add NVMEM die_id node")
Fixes: 8bd542fcb2ae ("dts: sama5d2: add huk node for the NVMEM hardware unique key")
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
8bd542fc |
| 29-Nov-2023 |
Thomas Perrot <thomas.perrot@bootlin.com> |
dts: sama5d2: add huk node for the NVMEM hardware unique key
Add the definition of the NVMEM HUK controller in the sama5d2
device tree.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acke
dts: sama5d2: add huk node for the NVMEM hardware unique key
Add the definition of the NVMEM HUK controller in the sama5d2
device tree.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
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| #
6c6c4d9e |
| 30-Nov-2023 |
Thomas Perrot <thomas.perrot@bootlin.com> |
dts: sama5d2: add NVMEM die_id node
Add the definition of the NVMEM die id controller in the sama5d2
device tree.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier
dts: sama5d2: add NVMEM die_id node
Add the definition of the NVMEM die id controller in the sama5d2
device tree.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
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| #
2466ab49 |
| 27-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: add sfc node for the secure fuse controller
Add the definition of the atmel_sfc controller in the sama5d2 device-tree.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-
dts: sama5d2: add sfc node for the secure fuse controller
Add the definition of the atmel_sfc controller in the sama5d2 device-tree.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
06ae0ae1 |
| 14-Dec-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: at91: set PIO controller as secure
Set the PIO pinctrl as secure to ensure pin configurations are not
modifiable by non secure world.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
A
dts: at91: set PIO controller as secure
Set the PIO pinctrl as secure to ensure pin configurations are not
modifiable by non secure world.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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| #
5ff81ad8 |
| 04-Apr-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: add assigned-clocks properties for usb
In order for USB to work, the correct clock parents and rates must be
set for USB clock. Assigned UTMI clock for USB clock and set its rate
to 48
dts: sama5d2: add assigned-clocks properties for usb
In order for USB to work, the correct clock parents and rates must be
set for USB clock. Assigned UTMI clock for USB clock and set its rate
to 48000000.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
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| #
d16bc0a9 |
| 22-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: at91: fix reg address for secure PIO
The secure PIO controller is located at 0xfc039000 not 0xfc038000. Fix
this in all at91 device-trees.
Signed-off-by: Clément Léger <clement.leger@bootlin.c
dts: at91: fix reg address for secure PIO
The secure PIO controller is located at 0xfc039000 not 0xfc038000. Fix
this in all at91 device-trees.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
51a05df1 |
| 25-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: set rstc, shdwc and rtc as secure
Set reset, shutdown and RTC controllers as secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carri
dts: sama5d2: set rstc, shdwc and rtc as secure
Set reset, shutdown and RTC controllers as secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
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| #
ae0e2fec |
| 27-Oct-2021 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: set sckc as secure
The slow clock controller is not used anymore by Linux, set it as
secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etien
dts: sama5d2: set sckc as secure
The slow clock controller is not used anymore by Linux, set it as
secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
3fea76be |
| 27-Oct-2021 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: set pmc as secure
The PMC was not set as secure up to now but since all the PSCI support
allows using the PMC through it, set it as secure.
Signed-off-by: Clément Léger <clement.leger
dts: sama5d2: set pmc as secure
The PMC was not set as secure up to now but since all the PSCI support
allows using the PMC through it, set it as secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
21acbe56 |
| 28-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: set sfr as secure only
Now that all the drivers for the sfr components are present in OP-TEE,
we can safely set the sfr as secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.
dts: sama5d2: set sfr as secure only
Now that all the drivers for the sfr components are present in OP-TEE,
we can safely set the sfr as secure.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
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| #
9272d514 |
| 24-Jun-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: Set tcb1 as secure
Add missing status-okay line to enable tcb1 for OP-TEE usage. Indeed,
the TCB block is used to provide a secure time source to OP-TEE TA.
Signed-off-by: Clément Lég
dts: sama5d2: Set tcb1 as secure
Add missing status-okay line to enable tcb1 for OP-TEE usage. Indeed,
the TCB block is used to provide a secure time source to OP-TEE TA.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
1352a5fe |
| 16-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: set RTC as secure
The RTC on sama5d2 is actually securing both RSTC, WDT and RTC register
access. Enable secure mode for the RTC to ensure the WDT register
accesses are secured.
Acked
dts: sama5d2: set RTC as secure
The RTC on sama5d2 is actually securing both RSTC, WDT and RTC register
access. Enable secure mode for the RTC to ensure the WDT register
accesses are secured.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
show more ...
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| #
03f63b66 |
| 20-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: set the watchdog as secure
Enable the watchdog to be secure since dt_map_dev uses this attribute
to apply the correct MMU policy and we want the interrupt to be
redirected to the SAIC.
dts: sama5d2: set the watchdog as secure
Enable the watchdog to be secure since dt_map_dev uses this attribute
to apply the correct MMU policy and we want the interrupt to be
redirected to the SAIC.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
17616ec6 |
| 01-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
dts: sama5d2: add clocks for cpu
This clock will be used to retrieve the CPU clock frequency in
plat_get_freq().
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <c
dts: sama5d2: add clocks for cpu
This clock will be used to retrieve the CPU clock frequency in
plat_get_freq().
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
54c0b326 |
| 02-Jul-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: atmel_saic: add SAIC driver
Add a driver to handle interrupt that are targeting the secure
interrupt controller. This driver will be used to handle watchdog and
matrix interrupts.
Acked-by
drivers: atmel_saic: add SAIC driver
Add a driver to handle interrupt that are targeting the secure
interrupt controller. This driver will be used to handle watchdog and
matrix interrupts.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| #
15300b40 |
| 07-Jan-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: pm: sam: add suspend support
Add suspend support for sama5d2 platform. This support allows to use
all the available modes of suspend present on the sama5d2 platform:
- STANDBY
- ULP0
- ULP0
drivers: pm: sam: add suspend support
Add suspend support for sama5d2 platform. This support allows to use
all the available modes of suspend present on the sama5d2 platform:
- STANDBY
- ULP0
- ULP0 Fast
- ULP1
- BACKUP
By default, STANDBY mode is used as default suspend mode.
This support is meant to be used by PSCI.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
show more ...
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| #
dc732a6b |
| 12-Aug-2021 |
Clément Léger <clement.leger@bootlin.com> |
plat-sam: enable Atmel TRNG driver
Default embed Atmel TRNG in sama5d2 platform.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed
plat-sam: enable Atmel TRNG driver
Default embed Atmel TRNG in sama5d2 platform.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
show more ...
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| #
dd7e1845 |
| 16-Sep-2021 |
Clément Léger <clement.leger@bootlin.com> |
dts: at91: add device trees for sama5d2_xplained
Import device-tree from linux for sama5d2 and relicense them with dual
GPL/BSD 3-Clause
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Ack
dts: at91: add device trees for sama5d2_xplained
Import device-tree from linux for sama5d2 and relicense them with dual
GPL/BSD 3-Clause
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
show more ...
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