1 /* 2 * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <common/bl_common.h> 10 #include <drivers/arm/pl061_gpio.h> 11 #include <plat/common/platform.h> 12 13 #include "qemu_private.h" 14 15 /* 16 * Placeholder variables for copying the arguments that have been passed to 17 * BL3-1 from BL2. 18 */ 19 static entry_point_info_t bl32_image_ep_info; 20 static entry_point_info_t bl33_image_ep_info; 21 22 /******************************************************************************* 23 * Perform any BL3-1 early platform setup. Here is an opportunity to copy 24 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before 25 * they are lost (potentially). This needs to be done before the MMU is 26 * initialized so that the memory layout can be used while creating page 27 * tables. BL2 has flushed this information to memory, so we are guaranteed 28 * to pick up good data. 29 ******************************************************************************/ 30 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 31 u_register_t arg2, u_register_t arg3) 32 { 33 /* Initialize the console to provide early debug support */ 34 qemu_console_init(); 35 36 /* 37 * Check params passed from BL2 38 */ 39 bl_params_t *params_from_bl2 = (bl_params_t *)arg0; 40 41 assert(params_from_bl2); 42 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 43 assert(params_from_bl2->h.version >= VERSION_2); 44 45 bl_params_node_t *bl_params = params_from_bl2->head; 46 47 /* 48 * Copy BL33 and BL32 (if present), entry point information. 49 * They are stored in Secure RAM, in BL2's address space. 50 */ 51 while (bl_params) { 52 if (bl_params->image_id == BL32_IMAGE_ID) 53 bl32_image_ep_info = *bl_params->ep_info; 54 55 if (bl_params->image_id == BL33_IMAGE_ID) 56 bl33_image_ep_info = *bl_params->ep_info; 57 58 bl_params = bl_params->next_params_info; 59 } 60 61 if (!bl33_image_ep_info.pc) 62 panic(); 63 } 64 65 void bl31_plat_arch_setup(void) 66 { 67 qemu_configure_mmu_el3(BL31_BASE, (BL31_END - BL31_BASE), 68 BL_CODE_BASE, BL_CODE_END, 69 BL_RO_DATA_BASE, BL_RO_DATA_END, 70 BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END); 71 } 72 73 static void qemu_gpio_init(void) 74 { 75 #ifdef SECURE_GPIO_BASE 76 pl061_gpio_init(); 77 pl061_gpio_register(SECURE_GPIO_BASE, 0); 78 #endif 79 } 80 81 void bl31_platform_setup(void) 82 { 83 plat_qemu_gic_init(); 84 qemu_gpio_init(); 85 } 86 87 unsigned int plat_get_syscnt_freq2(void) 88 { 89 return SYS_COUNTER_FREQ_IN_TICKS; 90 } 91 92 /******************************************************************************* 93 * Return a pointer to the 'entry_point_info' structure of the next image 94 * for the security state specified. BL3-3 corresponds to the non-secure 95 * image type while BL3-2 corresponds to the secure image type. A NULL 96 * pointer is returned if the image does not exist. 97 ******************************************************************************/ 98 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 99 { 100 entry_point_info_t *next_image_info; 101 102 assert(sec_state_is_valid(type)); 103 next_image_info = (type == NON_SECURE) 104 ? &bl33_image_ep_info : &bl32_image_ep_info; 105 /* 106 * None of the images on the ARM development platforms can have 0x0 107 * as the entrypoint 108 */ 109 if (next_image_info->pc) 110 return next_image_info; 111 else 112 return NULL; 113 } 114