xref: /rk3399_ARM-atf/plat/qemu/common/qemu_bl31_setup.c (revision 6cd113fe06fdaa67a8457391eb6bcffd295f87fd)
1301d27d9SRadoslaw Biernacki /*
2cd75693fSJean-Philippe Brucker  * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
3301d27d9SRadoslaw Biernacki  *
4301d27d9SRadoslaw Biernacki  * SPDX-License-Identifier: BSD-3-Clause
5301d27d9SRadoslaw Biernacki  */
6301d27d9SRadoslaw Biernacki 
7301d27d9SRadoslaw Biernacki #include <assert.h>
8301d27d9SRadoslaw Biernacki 
9301d27d9SRadoslaw Biernacki #include <common/bl_common.h>
10ffb07b04SMaxim Uvarov #include <drivers/arm/pl061_gpio.h>
11*6cd113feSJean-Philippe Brucker #include <lib/gpt_rme/gpt_rme.h>
12301d27d9SRadoslaw Biernacki #include <plat/common/platform.h>
13301d27d9SRadoslaw Biernacki 
14301d27d9SRadoslaw Biernacki #include "qemu_private.h"
15301d27d9SRadoslaw Biernacki 
16a12cb77cSChen Baozi #define MAP_BL31_TOTAL		MAP_REGION_FLAT(			\
17a12cb77cSChen Baozi 					BL31_BASE,			\
18a12cb77cSChen Baozi 					BL31_END - BL31_BASE,		\
19a12cb77cSChen Baozi 					MT_MEMORY | MT_RW | EL3_PAS)
20a12cb77cSChen Baozi #define MAP_BL31_RO		MAP_REGION_FLAT(			\
21a12cb77cSChen Baozi 					BL_CODE_BASE,			\
22a12cb77cSChen Baozi 					BL_CODE_END - BL_CODE_BASE,	\
23a12cb77cSChen Baozi 					MT_CODE | EL3_PAS),		\
24a12cb77cSChen Baozi 				MAP_REGION_FLAT(			\
25a12cb77cSChen Baozi 					BL_RO_DATA_BASE,		\
26a12cb77cSChen Baozi 					BL_RO_DATA_END			\
27a12cb77cSChen Baozi 						- BL_RO_DATA_BASE,	\
28a12cb77cSChen Baozi 					MT_RO_DATA | EL3_PAS)
29a12cb77cSChen Baozi 
30af994ae8SChen Baozi #if USE_COHERENT_MEM
31a12cb77cSChen Baozi #define MAP_BL_COHERENT_RAM	MAP_REGION_FLAT(			\
32a12cb77cSChen Baozi 					BL_COHERENT_RAM_BASE,		\
33a12cb77cSChen Baozi 					BL_COHERENT_RAM_END		\
34a12cb77cSChen Baozi 						- BL_COHERENT_RAM_BASE,	\
35a12cb77cSChen Baozi 					MT_DEVICE | MT_RW | EL3_PAS)
36af994ae8SChen Baozi #endif
37a12cb77cSChen Baozi 
38301d27d9SRadoslaw Biernacki /*
39301d27d9SRadoslaw Biernacki  * Placeholder variables for copying the arguments that have been passed to
40301d27d9SRadoslaw Biernacki  * BL3-1 from BL2.
41301d27d9SRadoslaw Biernacki  */
42301d27d9SRadoslaw Biernacki static entry_point_info_t bl32_image_ep_info;
43301d27d9SRadoslaw Biernacki static entry_point_info_t bl33_image_ep_info;
44301d27d9SRadoslaw Biernacki 
45301d27d9SRadoslaw Biernacki /*******************************************************************************
46301d27d9SRadoslaw Biernacki  * Perform any BL3-1 early platform setup.  Here is an opportunity to copy
47301d27d9SRadoslaw Biernacki  * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before
48301d27d9SRadoslaw Biernacki  * they are lost (potentially). This needs to be done before the MMU is
49301d27d9SRadoslaw Biernacki  * initialized so that the memory layout can be used while creating page
50301d27d9SRadoslaw Biernacki  * tables. BL2 has flushed this information to memory, so we are guaranteed
51301d27d9SRadoslaw Biernacki  * to pick up good data.
52301d27d9SRadoslaw Biernacki  ******************************************************************************/
53301d27d9SRadoslaw Biernacki void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
54301d27d9SRadoslaw Biernacki 				u_register_t arg2, u_register_t arg3)
55301d27d9SRadoslaw Biernacki {
56301d27d9SRadoslaw Biernacki 	/* Initialize the console to provide early debug support */
57301d27d9SRadoslaw Biernacki 	qemu_console_init();
58301d27d9SRadoslaw Biernacki 
59c681d02cSMarcin Juszkiewicz /* Platform names have to be lowercase. */
60c681d02cSMarcin Juszkiewicz #ifdef PLAT_qemu_sbsa
61c681d02cSMarcin Juszkiewicz 	sip_svc_init();
62c681d02cSMarcin Juszkiewicz #endif
63c681d02cSMarcin Juszkiewicz 
64301d27d9SRadoslaw Biernacki 	/*
65301d27d9SRadoslaw Biernacki 	 * Check params passed from BL2
66301d27d9SRadoslaw Biernacki 	 */
67301d27d9SRadoslaw Biernacki 	bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
68301d27d9SRadoslaw Biernacki 
69301d27d9SRadoslaw Biernacki 	assert(params_from_bl2);
70301d27d9SRadoslaw Biernacki 	assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
71301d27d9SRadoslaw Biernacki 	assert(params_from_bl2->h.version >= VERSION_2);
72301d27d9SRadoslaw Biernacki 
73301d27d9SRadoslaw Biernacki 	bl_params_node_t *bl_params = params_from_bl2->head;
74301d27d9SRadoslaw Biernacki 
75301d27d9SRadoslaw Biernacki 	/*
76301d27d9SRadoslaw Biernacki 	 * Copy BL33 and BL32 (if present), entry point information.
77301d27d9SRadoslaw Biernacki 	 * They are stored in Secure RAM, in BL2's address space.
78301d27d9SRadoslaw Biernacki 	 */
79301d27d9SRadoslaw Biernacki 	while (bl_params) {
80301d27d9SRadoslaw Biernacki 		if (bl_params->image_id == BL32_IMAGE_ID)
81301d27d9SRadoslaw Biernacki 			bl32_image_ep_info = *bl_params->ep_info;
82301d27d9SRadoslaw Biernacki 
83301d27d9SRadoslaw Biernacki 		if (bl_params->image_id == BL33_IMAGE_ID)
84301d27d9SRadoslaw Biernacki 			bl33_image_ep_info = *bl_params->ep_info;
85301d27d9SRadoslaw Biernacki 
86301d27d9SRadoslaw Biernacki 		bl_params = bl_params->next_params_info;
87301d27d9SRadoslaw Biernacki 	}
88301d27d9SRadoslaw Biernacki 
89301d27d9SRadoslaw Biernacki 	if (!bl33_image_ep_info.pc)
90301d27d9SRadoslaw Biernacki 		panic();
91301d27d9SRadoslaw Biernacki }
92301d27d9SRadoslaw Biernacki 
93301d27d9SRadoslaw Biernacki void bl31_plat_arch_setup(void)
94301d27d9SRadoslaw Biernacki {
95a12cb77cSChen Baozi 	const mmap_region_t bl_regions[] = {
96a12cb77cSChen Baozi 		MAP_BL31_TOTAL,
97a12cb77cSChen Baozi 		MAP_BL31_RO,
98af994ae8SChen Baozi #if USE_COHERENT_MEM
99a12cb77cSChen Baozi 		MAP_BL_COHERENT_RAM,
100af994ae8SChen Baozi #endif
101cd75693fSJean-Philippe Brucker #if ENABLE_RME
102cd75693fSJean-Philippe Brucker 		MAP_GPT_L0_REGION,
103cd75693fSJean-Philippe Brucker 		MAP_GPT_L1_REGION,
104cd75693fSJean-Philippe Brucker 		MAP_RMM_SHARED_MEM,
105cd75693fSJean-Philippe Brucker #endif
106a12cb77cSChen Baozi 		{0}
107a12cb77cSChen Baozi 	};
108a12cb77cSChen Baozi 
109a12cb77cSChen Baozi 	setup_page_tables(bl_regions, plat_qemu_get_mmap());
110a12cb77cSChen Baozi 
111a12cb77cSChen Baozi 	enable_mmu_el3(0);
112*6cd113feSJean-Philippe Brucker 
113*6cd113feSJean-Philippe Brucker #if ENABLE_RME
114*6cd113feSJean-Philippe Brucker 	/*
115*6cd113feSJean-Philippe Brucker 	 * Initialise Granule Protection library and enable GPC for the primary
116*6cd113feSJean-Philippe Brucker 	 * processor. The tables have already been initialized by a previous BL
117*6cd113feSJean-Philippe Brucker 	 * stage, so there is no need to provide any PAS here. This function
118*6cd113feSJean-Philippe Brucker 	 * sets up pointers to those tables.
119*6cd113feSJean-Philippe Brucker 	 */
120*6cd113feSJean-Philippe Brucker 	if (gpt_runtime_init() < 0) {
121*6cd113feSJean-Philippe Brucker 		ERROR("gpt_runtime_init() failed!\n");
122*6cd113feSJean-Philippe Brucker 		panic();
123*6cd113feSJean-Philippe Brucker 	}
124*6cd113feSJean-Philippe Brucker #endif /* ENABLE_RME */
125*6cd113feSJean-Philippe Brucker 
126301d27d9SRadoslaw Biernacki }
127301d27d9SRadoslaw Biernacki 
128ffb07b04SMaxim Uvarov static void qemu_gpio_init(void)
129ffb07b04SMaxim Uvarov {
130ffb07b04SMaxim Uvarov #ifdef SECURE_GPIO_BASE
131ffb07b04SMaxim Uvarov 	pl061_gpio_init();
132ffb07b04SMaxim Uvarov 	pl061_gpio_register(SECURE_GPIO_BASE, 0);
133ffb07b04SMaxim Uvarov #endif
134ffb07b04SMaxim Uvarov }
135ffb07b04SMaxim Uvarov 
136301d27d9SRadoslaw Biernacki void bl31_platform_setup(void)
137301d27d9SRadoslaw Biernacki {
138301d27d9SRadoslaw Biernacki 	plat_qemu_gic_init();
139ffb07b04SMaxim Uvarov 	qemu_gpio_init();
140301d27d9SRadoslaw Biernacki }
141301d27d9SRadoslaw Biernacki 
142301d27d9SRadoslaw Biernacki unsigned int plat_get_syscnt_freq2(void)
143301d27d9SRadoslaw Biernacki {
144301d27d9SRadoslaw Biernacki 	return SYS_COUNTER_FREQ_IN_TICKS;
145301d27d9SRadoslaw Biernacki }
146301d27d9SRadoslaw Biernacki 
147301d27d9SRadoslaw Biernacki /*******************************************************************************
148301d27d9SRadoslaw Biernacki  * Return a pointer to the 'entry_point_info' structure of the next image
149301d27d9SRadoslaw Biernacki  * for the security state specified. BL3-3 corresponds to the non-secure
150301d27d9SRadoslaw Biernacki  * image type while BL3-2 corresponds to the secure image type. A NULL
151301d27d9SRadoslaw Biernacki  * pointer is returned if the image does not exist.
152301d27d9SRadoslaw Biernacki  ******************************************************************************/
153301d27d9SRadoslaw Biernacki entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
154301d27d9SRadoslaw Biernacki {
155301d27d9SRadoslaw Biernacki 	entry_point_info_t *next_image_info;
156301d27d9SRadoslaw Biernacki 
157301d27d9SRadoslaw Biernacki 	assert(sec_state_is_valid(type));
158301d27d9SRadoslaw Biernacki 	next_image_info = (type == NON_SECURE)
159301d27d9SRadoslaw Biernacki 			? &bl33_image_ep_info : &bl32_image_ep_info;
160301d27d9SRadoslaw Biernacki 	/*
161301d27d9SRadoslaw Biernacki 	 * None of the images on the ARM development platforms can have 0x0
162301d27d9SRadoslaw Biernacki 	 * as the entrypoint
163301d27d9SRadoslaw Biernacki 	 */
164301d27d9SRadoslaw Biernacki 	if (next_image_info->pc)
165301d27d9SRadoslaw Biernacki 		return next_image_info;
166301d27d9SRadoslaw Biernacki 	else
167301d27d9SRadoslaw Biernacki 		return NULL;
168301d27d9SRadoslaw Biernacki }
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