xref: /rk3399_ARM-atf/plat/qemu/common/common.mk (revision 7ca7fb1bf0873824531a6eee2da1214b61496b02)
1#
2# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include lib/libfdt/libfdt.mk
8include common/fdt_wrappers.mk
9
10PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/		\
11				-I${PLAT_QEMU_COMMON_PATH}/include	\
12				-I${PLAT_QEMU_PATH}/include		\
13				-Iinclude/common/tbbr
14
15ifeq (${ARCH},aarch32)
16QEMU_CPU_LIBS		:=	lib/cpus/${ARCH}/cortex_a15.S
17else
18QEMU_CPU_LIBS		:=	lib/cpus/aarch64/aem_generic.S		\
19				lib/cpus/aarch64/cortex_a53.S		\
20				lib/cpus/aarch64/cortex_a57.S		\
21				lib/cpus/aarch64/cortex_a72.S		\
22				lib/cpus/aarch64/cortex_a76.S		\
23				lib/cpus/aarch64/cortex_a710.S		\
24				lib/cpus/aarch64/neoverse_n_common.S	\
25				lib/cpus/aarch64/neoverse_n1.S		\
26				lib/cpus/aarch64/neoverse_v1.S		\
27				lib/cpus/aarch64/qemu_max.S
28
29PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/${ARCH}
30
31# Cpu core architecture level:
32# v8.0: a53, a57, a72
33# v8.2: a76, n1
34# v8.4: v1
35# v9.0: a710
36#
37# let treat v9.0 as v8.5 as they share cpu features
38# https://developer.arm.com/documentation/102378/0201/Armv8-x-and-Armv9-x-extensions-and-features
39
40ARM_ARCH_MAJOR		:=	8
41ARM_ARCH_MINOR		:=	5
42endif
43
44PLAT_BL_COMMON_SOURCES	:=	${PLAT_QEMU_COMMON_PATH}/qemu_common.c		\
45				${PLAT_QEMU_COMMON_PATH}/qemu_console.c		\
46				drivers/arm/pl011/${ARCH}/pl011_console.S
47
48include lib/xlat_tables_v2/xlat_tables.mk
49PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
50
51ifneq ($(ENABLE_STACK_PROTECTOR), 0)
52	PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
53endif
54
55BL1_SOURCES		+=	drivers/io/io_semihosting.c		\
56				drivers/io/io_storage.c			\
57				drivers/io/io_fip.c			\
58				drivers/io/io_memmap.c			\
59				lib/semihosting/semihosting.c		\
60				lib/semihosting/${ARCH}/semihosting_call.S	\
61				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c	\
62				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S	\
63				${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c	\
64				${QEMU_CPU_LIBS}
65
66BL2_SOURCES		+=	drivers/io/io_semihosting.c		\
67				drivers/io/io_storage.c			\
68				drivers/io/io_fip.c			\
69				drivers/io/io_memmap.c			\
70				lib/semihosting/semihosting.c		\
71				lib/semihosting/${ARCH}/semihosting_call.S		\
72				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c		\
73				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S		\
74				${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c		\
75				${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c	\
76				${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c		\
77				common/desc_image_load.c		\
78				common/fdt_fixup.c
79
80BL31_SOURCES		+=	${QEMU_CPU_LIBS}				\
81				lib/semihosting/semihosting.c			\
82				lib/semihosting/${ARCH}/semihosting_call.S	\
83				plat/common/plat_psci_common.c			\
84				${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S	\
85				${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c	\
86				common/fdt_fixup.c				\
87				${QEMU_GIC_SOURCES}
88
89# CPU flag enablement
90ifeq (${ARCH},aarch64)
91
92# Later QEMU versions support SME and SVE.
93# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks)
94ifeq (${SPM_MM},1)
95	ENABLE_SVE_FOR_NS	:= 0
96	ENABLE_SME_FOR_NS	:= 0
97else
98	ENABLE_SVE_FOR_NS	:= 2
99	ENABLE_SME_FOR_NS	:= 2
100endif
101
102# QEMU will use the RNDR instruction for the stack protector canary.
103ENABLE_FEAT_RNG			:= 2
104
105# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max
106ENABLE_FEAT_FGT			:= 2
107
108# Treating this as a memory-constrained port for now
109USE_COHERENT_MEM	:=	0
110
111# This can be overridden depending on CPU(s) used in the QEMU image
112HW_ASSISTED_COHERENCY	:=	1
113
114CTX_INCLUDE_AARCH32_REGS := 0
115ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
116$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
117endif
118
119# Pointer Authentication sources
120ifeq (${ENABLE_PAUTH}, 1)
121PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c
122CTX_INCLUDE_PAUTH_REGS	:=	1
123endif
124
125endif
126