1a63cdc74SMarcin Juszkiewicz# 2c69e95eeSJean-Philippe Brucker# Copyright (c) 2023-2024, Linaro Limited and Contributors. All rights reserved. 3a63cdc74SMarcin Juszkiewicz# 4a63cdc74SMarcin Juszkiewicz# SPDX-License-Identifier: BSD-3-Clause 5a63cdc74SMarcin Juszkiewicz# 6a63cdc74SMarcin Juszkiewicz 7a63cdc74SMarcin Juszkiewiczinclude lib/libfdt/libfdt.mk 8a63cdc74SMarcin Juszkiewiczinclude common/fdt_wrappers.mk 9a63cdc74SMarcin Juszkiewicz 10886688d1SMarcin JuszkiewiczPLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 11886688d1SMarcin Juszkiewicz -I${PLAT_QEMU_COMMON_PATH}/include \ 12886688d1SMarcin Juszkiewicz -I${PLAT_QEMU_PATH}/include \ 13886688d1SMarcin Juszkiewicz -Iinclude/common/tbbr 14886688d1SMarcin Juszkiewicz 15886688d1SMarcin Juszkiewiczifeq (${ARCH},aarch32) 16886688d1SMarcin JuszkiewiczQEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S 17886688d1SMarcin Juszkiewiczelse 18886688d1SMarcin JuszkiewiczQEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ 19886688d1SMarcin Juszkiewicz lib/cpus/aarch64/cortex_a53.S \ 20409c20c8SMark-PK Tsai lib/cpus/aarch64/cortex_a55.S \ 21886688d1SMarcin Juszkiewicz lib/cpus/aarch64/cortex_a57.S \ 22886688d1SMarcin Juszkiewicz lib/cpus/aarch64/cortex_a72.S \ 23886688d1SMarcin Juszkiewicz lib/cpus/aarch64/cortex_a76.S \ 244734a62dSMarcin Juszkiewicz lib/cpus/aarch64/cortex_a710.S \ 25886688d1SMarcin Juszkiewicz lib/cpus/aarch64/neoverse_n_common.S \ 26886688d1SMarcin Juszkiewicz lib/cpus/aarch64/neoverse_n1.S \ 27886688d1SMarcin Juszkiewicz lib/cpus/aarch64/neoverse_v1.S \ 28408f9cb4SMarcin Juszkiewicz lib/cpus/aarch64/neoverse_n2.S \ 29886688d1SMarcin Juszkiewicz lib/cpus/aarch64/qemu_max.S 30886688d1SMarcin Juszkiewicz 31886688d1SMarcin JuszkiewiczPLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 32886688d1SMarcin Juszkiewiczendif 3371f5359bSMarcin Juszkiewicz 3471f5359bSMarcin JuszkiewiczPLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 3571f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 3671f5359bSMarcin Juszkiewicz drivers/arm/pl011/${ARCH}/pl011_console.S 3771f5359bSMarcin Juszkiewicz 3871f5359bSMarcin Juszkiewiczinclude lib/xlat_tables_v2/xlat_tables.mk 3971f5359bSMarcin JuszkiewiczPLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 4071f5359bSMarcin Juszkiewicz 4171f5359bSMarcin Juszkiewiczifneq ($(ENABLE_STACK_PROTECTOR), 0) 4271f5359bSMarcin Juszkiewicz PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 4371f5359bSMarcin Juszkiewiczendif 4471f5359bSMarcin Juszkiewicz 4571f5359bSMarcin JuszkiewiczBL1_SOURCES += drivers/io/io_semihosting.c \ 4671f5359bSMarcin Juszkiewicz drivers/io/io_storage.c \ 4771f5359bSMarcin Juszkiewicz drivers/io/io_fip.c \ 4871f5359bSMarcin Juszkiewicz drivers/io/io_memmap.c \ 4971f5359bSMarcin Juszkiewicz lib/semihosting/semihosting.c \ 5071f5359bSMarcin Juszkiewicz lib/semihosting/${ARCH}/semihosting_call.S \ 5171f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 5271f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 5371f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \ 5471f5359bSMarcin Juszkiewicz ${QEMU_CPU_LIBS} 5571f5359bSMarcin Juszkiewicz 5671f5359bSMarcin JuszkiewiczBL2_SOURCES += drivers/io/io_semihosting.c \ 5771f5359bSMarcin Juszkiewicz drivers/io/io_storage.c \ 5871f5359bSMarcin Juszkiewicz drivers/io/io_fip.c \ 5971f5359bSMarcin Juszkiewicz drivers/io/io_memmap.c \ 6071f5359bSMarcin Juszkiewicz lib/semihosting/semihosting.c \ 6171f5359bSMarcin Juszkiewicz lib/semihosting/${ARCH}/semihosting_call.S \ 6271f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 6371f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 6471f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 6571f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 6671f5359bSMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 6771f5359bSMarcin Juszkiewicz common/desc_image_load.c \ 6871f5359bSMarcin Juszkiewicz common/fdt_fixup.c 6918884750SMarcin Juszkiewicz 7018884750SMarcin JuszkiewiczBL31_SOURCES += ${QEMU_CPU_LIBS} \ 7118884750SMarcin Juszkiewicz lib/semihosting/semihosting.c \ 7218884750SMarcin Juszkiewicz lib/semihosting/${ARCH}/semihosting_call.S \ 7318884750SMarcin Juszkiewicz plat/common/plat_psci_common.c \ 7418884750SMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 7518884750SMarcin Juszkiewicz ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 7618884750SMarcin Juszkiewicz common/fdt_fixup.c \ 7718884750SMarcin Juszkiewicz ${QEMU_GIC_SOURCES} 7818884750SMarcin Juszkiewicz 79c1baf178SMarcin Juszkiewicz# CPU flag enablement 80941fc383SMarcin Juszkiewiczifeq (${ARCH},aarch64) 81c1baf178SMarcin Juszkiewicz 82a97f4665SMarcin Juszkiewicz# Cpu core architecture level: 83a97f4665SMarcin Juszkiewicz# v8.0: a53, a57, a72 84a97f4665SMarcin Juszkiewicz# v8.2: a55, a76, n1 85a97f4665SMarcin Juszkiewicz# v8.4: v1 86a97f4665SMarcin Juszkiewicz# v9.0: a710, n2 87a97f4665SMarcin Juszkiewicz# 88a97f4665SMarcin Juszkiewicz# 89a97f4665SMarcin Juszkiewicz# We go v8.0 by default and will enable all features we want 90a97f4665SMarcin Juszkiewicz 91a97f4665SMarcin JuszkiewiczARM_ARCH_MAJOR := 8 92a97f4665SMarcin JuszkiewiczARM_ARCH_MINOR := 0 93a97f4665SMarcin Juszkiewicz 94a97f4665SMarcin Juszkiewicz# 8.0 95a97f4665SMarcin JuszkiewiczENABLE_FEAT_CSV2_2 := 2 96a97f4665SMarcin Juszkiewicz 97a97f4665SMarcin Juszkiewicz# 8.1 98a97f4665SMarcin JuszkiewiczENABLE_FEAT_PAN := 2 99a97f4665SMarcin JuszkiewiczENABLE_FEAT_VHE := 2 100a97f4665SMarcin Juszkiewicz 101a97f4665SMarcin Juszkiewicz# 8.2 102a97f4665SMarcin Juszkiewicz# TF-A currently does not permit dynamic detection of FEAT_RAS 103a97f4665SMarcin Juszkiewicz# so this is the only safe setting 104a97f4665SMarcin JuszkiewiczENABLE_FEAT_RAS := 0 105a97f4665SMarcin Juszkiewicz 106a97f4665SMarcin Juszkiewicz# 8.4 107a97f4665SMarcin JuszkiewiczENABLE_FEAT_SEL2 := 2 108a97f4665SMarcin JuszkiewiczENABLE_FEAT_DIT := 2 109a97f4665SMarcin Juszkiewicz 110a97f4665SMarcin Juszkiewicz# 8.5 111a97f4665SMarcin JuszkiewiczENABLE_FEAT_RNG := 2 112*59bdb426SMarcin Juszkiewicz# TF-A currently does not do dynamic detection of FEAT_SB. 113*59bdb426SMarcin Juszkiewicz# Compiler puts SB instruction when it is enabled. 114*59bdb426SMarcin JuszkiewiczENABLE_FEAT_SB := 0 115a97f4665SMarcin Juszkiewicz 116a97f4665SMarcin Juszkiewicz# 8.6 117a97f4665SMarcin JuszkiewiczENABLE_FEAT_FGT := 2 118a97f4665SMarcin Juszkiewicz 119a97f4665SMarcin Juszkiewicz# 8.7 120a97f4665SMarcin JuszkiewiczENABLE_FEAT_HCX := 2 121a97f4665SMarcin Juszkiewicz 122941fc383SMarcin Juszkiewicz# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks) 123941fc383SMarcin Juszkiewiczifeq (${SPM_MM},1) 124941fc383SMarcin Juszkiewicz ENABLE_SVE_FOR_NS := 0 125941fc383SMarcin Juszkiewicz ENABLE_SME_FOR_NS := 0 126941fc383SMarcin Juszkiewiczelse 127c1baf178SMarcin Juszkiewicz ENABLE_SVE_FOR_NS := 2 128c1baf178SMarcin Juszkiewicz ENABLE_SME_FOR_NS := 2 129c1baf178SMarcin Juszkiewiczendif 130c1baf178SMarcin Juszkiewicz 131c69e95eeSJean-Philippe Bruckerifeq (${ENABLE_RME},1) 132c69e95eeSJean-Philippe BruckerBL31_SOURCES += plat/qemu/common/qemu_plat_attest_token.c \ 133c69e95eeSJean-Philippe Brucker plat/qemu/common/qemu_realm_attest_key.c 134c69e95eeSJean-Philippe Bruckerendif 135c69e95eeSJean-Philippe Brucker 1363b61457bSMarcin Juszkiewicz# Treating this as a memory-constrained port for now 1373b61457bSMarcin JuszkiewiczUSE_COHERENT_MEM := 0 1383b61457bSMarcin Juszkiewicz 1393b61457bSMarcin Juszkiewicz# This can be overridden depending on CPU(s) used in the QEMU image 1403b61457bSMarcin JuszkiewiczHW_ASSISTED_COHERENCY := 1 1413b61457bSMarcin Juszkiewicz 1423b61457bSMarcin JuszkiewiczCTX_INCLUDE_AARCH32_REGS := 0 1433b61457bSMarcin Juszkiewiczifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 1443b61457bSMarcin Juszkiewicz$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 1453b61457bSMarcin Juszkiewiczendif 14651ce1f34SMarcin Juszkiewicz 14751ce1f34SMarcin Juszkiewicz# Pointer Authentication sources 14851ce1f34SMarcin Juszkiewiczifeq (${ENABLE_PAUTH}, 1) 14951ce1f34SMarcin JuszkiewiczPLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 15051ce1f34SMarcin JuszkiewiczCTX_INCLUDE_PAUTH_REGS := 1 15151ce1f34SMarcin Juszkiewiczendif 15251ce1f34SMarcin Juszkiewicz 1533b61457bSMarcin Juszkiewiczendif 154