xref: /rk3399_ARM-atf/plat/arm/board/tc/tc_bl31_setup.c (revision a8778185d2fd2b80cee8af7879ecb92be1aa3898)
16ec0c65bSUsama Arif /*
29b266556Slaurenw-arm  * Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved.
36ec0c65bSUsama Arif  *
46ec0c65bSUsama Arif  * SPDX-License-Identifier: BSD-3-Clause
56ec0c65bSUsama Arif  */
66ec0c65bSUsama Arif 
76ec0c65bSUsama Arif #include <assert.h>
86ec0c65bSUsama Arif 
96ec0c65bSUsama Arif #include <libfdt.h>
106ec0c65bSUsama Arif #include <tc_plat.h>
116ec0c65bSUsama Arif 
12*a8778185SManish V Badarkhe #include <arch_helpers.h>
136ec0c65bSUsama Arif #include <common/bl_common.h>
146ec0c65bSUsama Arif #include <common/debug.h>
156ec0c65bSUsama Arif #include <drivers/arm/css/css_mhu_doorbell.h>
166ec0c65bSUsama Arif #include <drivers/arm/css/scmi.h>
1728b2d86cSMadhukar Pappireddy #include <drivers/arm/sbsa.h>
1834a87d74SUsama Arif #include <lib/fconf/fconf.h>
1934a87d74SUsama Arif #include <lib/fconf/fconf_dyn_cfg_getter.h>
206ec0c65bSUsama Arif #include <plat/arm/common/plat_arm.h>
216ec0c65bSUsama Arif #include <plat/common/platform.h>
226ec0c65bSUsama Arif 
23*a8778185SManish V Badarkhe #include <psa/crypto_platform.h>
24*a8778185SManish V Badarkhe #include <psa/crypto_types.h>
25*a8778185SManish V Badarkhe #include <psa/crypto_values.h>
26*a8778185SManish V Badarkhe 
27*a8778185SManish V Badarkhe #ifdef PLATFORM_TEST_TFM_TESTSUITE
28*a8778185SManish V Badarkhe /*
29*a8778185SManish V Badarkhe  * We pretend using an external RNG (through MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG
30*a8778185SManish V Badarkhe  * mbedTLS config option) so we need to provide an implementation of
31*a8778185SManish V Badarkhe  * mbedtls_psa_external_get_random(). Provide a fake one, since we do not
32*a8778185SManish V Badarkhe  * actually use any of external RNG and this function is only needed during
33*a8778185SManish V Badarkhe  * the execution of TF-M testsuite during exporting the public part of the
34*a8778185SManish V Badarkhe  * delegated attestation key.
35*a8778185SManish V Badarkhe  */
36*a8778185SManish V Badarkhe psa_status_t mbedtls_psa_external_get_random(
37*a8778185SManish V Badarkhe 			mbedtls_psa_external_random_context_t *context,
38*a8778185SManish V Badarkhe 			uint8_t *output, size_t output_size,
39*a8778185SManish V Badarkhe 			size_t *output_length)
40*a8778185SManish V Badarkhe {
41*a8778185SManish V Badarkhe 	for (size_t i = 0U; i < output_size; i++) {
42*a8778185SManish V Badarkhe 		output[i] = (uint8_t)(read_cntpct_el0() & 0xFFU);
43*a8778185SManish V Badarkhe 	}
44*a8778185SManish V Badarkhe 
45*a8778185SManish V Badarkhe 	*output_length = output_size;
46*a8778185SManish V Badarkhe 
47*a8778185SManish V Badarkhe 	return PSA_SUCCESS;
48*a8778185SManish V Badarkhe }
49*a8778185SManish V Badarkhe #endif /* PLATFORM_TEST_TFM_TESTSUITE */
50*a8778185SManish V Badarkhe 
516ec0c65bSUsama Arif static scmi_channel_plat_info_t tc_scmi_plat_info[] = {
526ec0c65bSUsama Arif 	{
536ec0c65bSUsama Arif 		.scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
546ec0c65bSUsama Arif 		.db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0),
556ec0c65bSUsama Arif 		.db_preserve_mask = 0xfffffffe,
566ec0c65bSUsama Arif 		.db_modify_mask = 0x1,
576ec0c65bSUsama Arif 		.ring_doorbell = &mhuv2_ring_doorbell,
586ec0c65bSUsama Arif 	}
596ec0c65bSUsama Arif };
606ec0c65bSUsama Arif 
616ec0c65bSUsama Arif void bl31_platform_setup(void)
626ec0c65bSUsama Arif {
636ec0c65bSUsama Arif 	tc_bl31_common_platform_setup();
646ec0c65bSUsama Arif }
656ec0c65bSUsama Arif 
66f0f2c903STony K Nadackal scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
676ec0c65bSUsama Arif {
686ec0c65bSUsama Arif 
696ec0c65bSUsama Arif 	return &tc_scmi_plat_info[channel_id];
706ec0c65bSUsama Arif 
716ec0c65bSUsama Arif }
726ec0c65bSUsama Arif 
736ec0c65bSUsama Arif void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
746ec0c65bSUsama Arif 				u_register_t arg2, u_register_t arg3)
756ec0c65bSUsama Arif {
766ec0c65bSUsama Arif 	arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
7734a87d74SUsama Arif 
7834a87d74SUsama Arif 	/* Fill the properties struct with the info from the config dtb */
7934a87d74SUsama Arif 	fconf_populate("FW_CONFIG", arg1);
806ec0c65bSUsama Arif }
816ec0c65bSUsama Arif 
826fbe11cdSlaurenw-arm #ifdef PLATFORM_TESTS
834eefbf1bSSandrine Bailleux static __dead2 void tc_run_platform_tests(void)
844eefbf1bSSandrine Bailleux {
85303ef33eSSandrine Bailleux 	int tests_failed;
86303ef33eSSandrine Bailleux 
87303ef33eSSandrine Bailleux 	printf("\nStarting platform tests...\n");
88303ef33eSSandrine Bailleux 
89657b90eaSTamas Ban #ifdef PLATFORM_TEST_NV_COUNTERS
90303ef33eSSandrine Bailleux 	tests_failed = nv_counter_test();
9100b7e0bfSlaurenw-arm #elif PLATFORM_TEST_ROTPK
9200b7e0bfSlaurenw-arm 	tests_failed = rotpk_test();
93657b90eaSTamas Ban #elif PLATFORM_TEST_TFM_TESTSUITE
94303ef33eSSandrine Bailleux 	tests_failed = run_platform_tests();
951b076113Slaurenw-arm #endif
96303ef33eSSandrine Bailleux 
97303ef33eSSandrine Bailleux 	printf("Platform tests %s.\n",
98303ef33eSSandrine Bailleux 	       (tests_failed != 0) ? "failed" : "succeeded");
99303ef33eSSandrine Bailleux 
10057cc12c8SSandrine Bailleux 	/* Suspend booting, no matter the tests outcome. */
101303ef33eSSandrine Bailleux 	printf("Suspend booting...\n");
10225dd2172SMate Toth-Pal 	plat_error_handler(-1);
1034eefbf1bSSandrine Bailleux }
1044eefbf1bSSandrine Bailleux #endif
1054eefbf1bSSandrine Bailleux 
1066ec0c65bSUsama Arif void tc_bl31_common_platform_setup(void)
1076ec0c65bSUsama Arif {
1086ec0c65bSUsama Arif 	arm_bl31_platform_setup();
10925dd2172SMate Toth-Pal 
1104eefbf1bSSandrine Bailleux #ifdef PLATFORM_TESTS
1114eefbf1bSSandrine Bailleux 	tc_run_platform_tests();
1129b266556Slaurenw-arm #endif
1136ec0c65bSUsama Arif }
1146ec0c65bSUsama Arif 
1156ec0c65bSUsama Arif const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
1166ec0c65bSUsama Arif {
1176ec0c65bSUsama Arif 	return css_scmi_override_pm_ops(ops);
1186ec0c65bSUsama Arif }
11934a87d74SUsama Arif 
12034a87d74SUsama Arif void __init bl31_plat_arch_setup(void)
12134a87d74SUsama Arif {
12234a87d74SUsama Arif 	arm_bl31_plat_arch_setup();
12334a87d74SUsama Arif 
12434a87d74SUsama Arif 	/* HW_CONFIG was also loaded by BL2 */
12534a87d74SUsama Arif 	const struct dyn_cfg_dtb_info_t *hw_config_info;
12634a87d74SUsama Arif 
12734a87d74SUsama Arif 	hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
12834a87d74SUsama Arif 	assert(hw_config_info != NULL);
12934a87d74SUsama Arif 
13034a87d74SUsama Arif 	fconf_populate("HW_CONFIG", hw_config_info->config_addr);
13134a87d74SUsama Arif }
13228b2d86cSMadhukar Pappireddy 
133fd51b215SGovindraj Raja #if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
13428b2d86cSMadhukar Pappireddy void tc_bl31_plat_runtime_setup(void)
13528b2d86cSMadhukar Pappireddy {
13628b2d86cSMadhukar Pappireddy 	arm_bl31_plat_runtime_setup();
13728b2d86cSMadhukar Pappireddy 
13828b2d86cSMadhukar Pappireddy 	/* Start secure watchdog timer. */
13928b2d86cSMadhukar Pappireddy 	plat_arm_secure_wdt_start();
14028b2d86cSMadhukar Pappireddy }
14128b2d86cSMadhukar Pappireddy 
14228b2d86cSMadhukar Pappireddy void bl31_plat_runtime_setup(void)
14328b2d86cSMadhukar Pappireddy {
14428b2d86cSMadhukar Pappireddy 	tc_bl31_plat_runtime_setup();
14528b2d86cSMadhukar Pappireddy }
14628b2d86cSMadhukar Pappireddy 
14728b2d86cSMadhukar Pappireddy /*
14828b2d86cSMadhukar Pappireddy  * Platform handler for Group0 secure interrupt.
14928b2d86cSMadhukar Pappireddy  */
15028b2d86cSMadhukar Pappireddy int plat_spmd_handle_group0_interrupt(uint32_t intid)
15128b2d86cSMadhukar Pappireddy {
15228b2d86cSMadhukar Pappireddy 	/* Trusted Watchdog timer is the only source of Group0 interrupt now. */
15328b2d86cSMadhukar Pappireddy 	if (intid == SBSA_SECURE_WDOG_INTID) {
15428b2d86cSMadhukar Pappireddy 		/* Refresh the timer. */
15528b2d86cSMadhukar Pappireddy 		plat_arm_secure_wdt_refresh();
15628b2d86cSMadhukar Pappireddy 
15728b2d86cSMadhukar Pappireddy 		return 0;
15828b2d86cSMadhukar Pappireddy 	}
15928b2d86cSMadhukar Pappireddy 
16028b2d86cSMadhukar Pappireddy 	return -1;
16128b2d86cSMadhukar Pappireddy }
162fd51b215SGovindraj Raja #endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/
163