xref: /rk3399_ARM-atf/plat/arm/board/tc/tc_bl31_setup.c (revision 57cc12c85c789f4aef0bf67caa9d984639f916f2)
16ec0c65bSUsama Arif /*
29b266556Slaurenw-arm  * Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved.
36ec0c65bSUsama Arif  *
46ec0c65bSUsama Arif  * SPDX-License-Identifier: BSD-3-Clause
56ec0c65bSUsama Arif  */
66ec0c65bSUsama Arif 
76ec0c65bSUsama Arif #include <assert.h>
86ec0c65bSUsama Arif 
96ec0c65bSUsama Arif #include <libfdt.h>
106ec0c65bSUsama Arif #include <tc_plat.h>
116ec0c65bSUsama Arif 
126ec0c65bSUsama Arif #include <common/bl_common.h>
136ec0c65bSUsama Arif #include <common/debug.h>
146ec0c65bSUsama Arif #include <drivers/arm/css/css_mhu_doorbell.h>
156ec0c65bSUsama Arif #include <drivers/arm/css/scmi.h>
1634a87d74SUsama Arif #include <lib/fconf/fconf.h>
1734a87d74SUsama Arif #include <lib/fconf/fconf_dyn_cfg_getter.h>
186ec0c65bSUsama Arif #include <plat/arm/common/plat_arm.h>
196ec0c65bSUsama Arif #include <plat/common/platform.h>
206ec0c65bSUsama Arif 
216ec0c65bSUsama Arif static scmi_channel_plat_info_t tc_scmi_plat_info[] = {
226ec0c65bSUsama Arif 	{
236ec0c65bSUsama Arif 		.scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
246ec0c65bSUsama Arif 		.db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0),
256ec0c65bSUsama Arif 		.db_preserve_mask = 0xfffffffe,
266ec0c65bSUsama Arif 		.db_modify_mask = 0x1,
276ec0c65bSUsama Arif 		.ring_doorbell = &mhuv2_ring_doorbell,
286ec0c65bSUsama Arif 	}
296ec0c65bSUsama Arif };
306ec0c65bSUsama Arif 
316ec0c65bSUsama Arif void bl31_platform_setup(void)
326ec0c65bSUsama Arif {
336ec0c65bSUsama Arif 	tc_bl31_common_platform_setup();
346ec0c65bSUsama Arif }
356ec0c65bSUsama Arif 
36f0f2c903STony K Nadackal scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
376ec0c65bSUsama Arif {
386ec0c65bSUsama Arif 
396ec0c65bSUsama Arif 	return &tc_scmi_plat_info[channel_id];
406ec0c65bSUsama Arif 
416ec0c65bSUsama Arif }
426ec0c65bSUsama Arif 
436ec0c65bSUsama Arif void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
446ec0c65bSUsama Arif 				u_register_t arg2, u_register_t arg3)
456ec0c65bSUsama Arif {
466ec0c65bSUsama Arif 	arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
4734a87d74SUsama Arif 
4834a87d74SUsama Arif 	/* Fill the properties struct with the info from the config dtb */
4934a87d74SUsama Arif 	fconf_populate("FW_CONFIG", arg1);
506ec0c65bSUsama Arif }
516ec0c65bSUsama Arif 
526ec0c65bSUsama Arif void tc_bl31_common_platform_setup(void)
536ec0c65bSUsama Arif {
546ec0c65bSUsama Arif 	arm_bl31_platform_setup();
5525dd2172SMate Toth-Pal 
566fbe11cdSlaurenw-arm #ifdef PLATFORM_TESTS
57657b90eaSTamas Ban #ifdef PLATFORM_TEST_NV_COUNTERS
581b076113Slaurenw-arm 	nv_counter_test();
59657b90eaSTamas Ban #elif PLATFORM_TEST_TFM_TESTSUITE
60657b90eaSTamas Ban 	run_platform_tests();
611b076113Slaurenw-arm #endif
62*57cc12c8SSandrine Bailleux 	/* Suspend booting, no matter the tests outcome. */
6325dd2172SMate Toth-Pal 	plat_error_handler(-1);
649b266556Slaurenw-arm #endif
656ec0c65bSUsama Arif }
666ec0c65bSUsama Arif 
676ec0c65bSUsama Arif const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
686ec0c65bSUsama Arif {
696ec0c65bSUsama Arif 	return css_scmi_override_pm_ops(ops);
706ec0c65bSUsama Arif }
7134a87d74SUsama Arif 
7234a87d74SUsama Arif void __init bl31_plat_arch_setup(void)
7334a87d74SUsama Arif {
7434a87d74SUsama Arif 	arm_bl31_plat_arch_setup();
7534a87d74SUsama Arif 
7634a87d74SUsama Arif 	/* HW_CONFIG was also loaded by BL2 */
7734a87d74SUsama Arif 	const struct dyn_cfg_dtb_info_t *hw_config_info;
7834a87d74SUsama Arif 
7934a87d74SUsama Arif 	hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
8034a87d74SUsama Arif 	assert(hw_config_info != NULL);
8134a87d74SUsama Arif 
8234a87d74SUsama Arif 	fconf_populate("HW_CONFIG", hw_config_info->config_addr);
8334a87d74SUsama Arif }
84