1 /*
2 * Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <bl32/sp_min/platform_sp_min.h>
10 #include <common/debug.h>
11 #include <lib/fconf/fconf.h>
12 #include <lib/fconf/fconf_dyn_cfg_getter.h>
13 #include <plat/arm/common/plat_arm.h>
14
15 #include "../fvp_private.h"
16
17 static uintptr_t hw_config __unused;
18
plat_arm_sp_min_early_platform_setup(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)19 void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
20 u_register_t arg2, u_register_t arg3)
21 {
22 const struct dyn_cfg_dtb_info_t *tos_fw_config_info __unused;
23 struct transfer_list_header *tl __unused;
24
25 /* Initialize the console to provide early debug support */
26 arm_console_boot_init();
27
28 #if TRANSFER_LIST
29 /*
30 * Register usage at function entry:
31 * r0 - Reserved (must be zero)
32 * r1 - Register convention and TL signature
33 * r2 - Pointer to the FDT located within the TL
34 * r3 - Base address of the TL
35 *
36 * Initialize TL pointer from r3 and validate that the FDT pointer (arg2)
37 * lies within the bounds of the Transfer List memory region.
38 */
39 tl = (struct transfer_list_header *)arg3;
40
41 assert(arg2 > (uintptr_t)tl && arg2 < (uintptr_t)tl + tl->size);
42 hw_config = (uintptr_t)arg2;
43 #else
44 #if !RESET_TO_SP_MIN && !RESET_TO_BL2
45 INFO("SP_MIN FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1);
46 /* Fill the properties struct with the info from the config dtb */
47 fconf_populate("FW_CONFIG", arg1);
48
49 tos_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TOS_FW_CONFIG_ID);
50 if (tos_fw_config_info != NULL) {
51 arg1 = tos_fw_config_info->config_addr;
52 }
53 #endif /* !RESET_TO_SP_MIN && !RESET_TO_BL2 */
54 #endif /* TRANSFER_LIST */
55
56 arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
57
58 /* Initialize the platform config for future decision making */
59 fvp_config_setup();
60
61 /*
62 * Initialize the correct interconnect for this cluster during cold
63 * boot. No need for locks as no other CPU is active.
64 */
65 fvp_interconnect_init();
66
67 /*
68 * Enable coherency in interconnect for the primary CPU's cluster.
69 * Earlier bootloader stages might already do this (e.g. Trusted
70 * Firmware's BL1 does it) but we can't assume so. There is no harm in
71 * executing this code twice anyway.
72 * FVP PSCI code will enable coherency for other clusters.
73 */
74 fvp_interconnect_enable();
75 }
76
sp_min_plat_arch_setup(void)77 void sp_min_plat_arch_setup(void)
78 {
79 int rc __unused;
80 const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
81 uintptr_t hw_config_base_align __unused;
82 size_t mapped_size_align __unused;
83
84 arm_sp_min_plat_arch_setup();
85
86 /*
87 * For RESET_TO_SP_MIN systems, SP_MIN(BL32) is the first bootloader
88 * to run. So there is no BL2 to load the HW_CONFIG dtb into memory
89 * before control is passed to SP_MIN.
90 * Also, BL2 skips loading HW_CONFIG dtb for
91 * RESET_TO_BL2 builds.
92 * The code below relies on dynamic mapping capability,
93 * which is not supported by xlat tables lib V1.
94 * TODO: remove the ARM_XLAT_TABLES_LIB_V1 check when its support
95 * gets deprecated.
96 */
97 #if TRANSFER_LIST
98 INFO("SP_MIN FCONF: HW_CONFIG address = %p\n", (void *)hw_config);
99 fconf_populate("HW_CONFIG", hw_config);
100 #elif !RESET_TO_SP_MIN && !RESET_TO_BL2 && !ARM_XLAT_TABLES_LIB_V1
101 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
102 assert(hw_config_info != NULL);
103 assert(hw_config_info->config_addr != 0UL);
104
105 INFO("SP_MIN FCONF: HW_CONFIG address = %p\n",
106 (void *)hw_config_info->config_addr);
107
108 /*
109 * Preferably we expect this address and size are page aligned,
110 * but if they are not then align it.
111 */
112 hw_config_base_align = page_align(hw_config_info->config_addr, DOWN);
113 mapped_size_align = page_align(hw_config_info->config_max_size, UP);
114
115 if ((hw_config_info->config_addr != hw_config_base_align) &&
116 (hw_config_info->config_max_size == mapped_size_align)) {
117 mapped_size_align += PAGE_SIZE;
118 }
119
120 /*
121 * map dynamically HW config region with its aligned base address and
122 * size
123 */
124 rc = mmap_add_dynamic_region((unsigned long long)hw_config_base_align,
125 hw_config_base_align,
126 mapped_size_align,
127 MT_RO_DATA);
128 if (rc != 0) {
129 ERROR("Error while mapping HW_CONFIG device tree (%d).\n", rc);
130 panic();
131 }
132
133 /* Populate HW_CONFIG device tree with the mapped address */
134 fconf_populate("HW_CONFIG", hw_config_info->config_addr);
135
136 /* unmap the HW_CONFIG memory region */
137 rc = mmap_remove_dynamic_region(hw_config_base_align, mapped_size_align);
138 if (rc != 0) {
139 ERROR("Error while unmapping HW_CONFIG device tree (%d).\n",
140 rc);
141 panic();
142 }
143
144 #endif /* TRANSFER_LIST */
145 }
146