1# 2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 52 drivers/arm/gic/v3/gicv3_main.c \ 53 drivers/arm/gic/v3/gicv3_helpers.c \ 54 plat/common/plat_gicv3.c \ 55 plat/arm/common/arm_gicv3.c 56 57# Choose the GIC sources depending upon the how the FVP will be invoked 58ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 59FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 60 drivers/arm/gic/v3/gic500.c 61else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 62FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 63 drivers/arm/gic/v3/gic600.c 64else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 65FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 66 drivers/arm/gic/v2/gicv2_main.c \ 67 drivers/arm/gic/v2/gicv2_helpers.c \ 68 plat/common/plat_gicv2.c \ 69 plat/arm/common/arm_gicv2.c 70 71FVP_DT_PREFIX := fvp-base-gicv2-psci 72else 73$(error "Incorrect GIC driver chosen on FVP port") 74endif 75 76ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 77FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 78else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 79FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 80 plat/arm/common/arm_ccn.c 81else 82$(error "Incorrect CCN driver chosen on FVP port") 83endif 84 85FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 86 plat/arm/board/fvp/fvp_security.c \ 87 plat/arm/common/arm_tzc400.c 88 89 90PLAT_INCLUDES := -Iplat/arm/board/fvp/include 91 92 93PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 94 95FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 96 97ifeq (${ARCH}, aarch64) 98FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 99 lib/cpus/aarch64/cortex_a53.S \ 100 lib/cpus/aarch64/cortex_a55.S \ 101 lib/cpus/aarch64/cortex_a57.S \ 102 lib/cpus/aarch64/cortex_a72.S \ 103 lib/cpus/aarch64/cortex_a73.S \ 104 lib/cpus/aarch64/cortex_a75.S \ 105 lib/cpus/aarch64/cortex_a76.S \ 106 lib/cpus/aarch64/cortex_a76ae.S \ 107 lib/cpus/aarch64/neoverse_n1.S \ 108 lib/cpus/aarch64/cortex_deimos.S \ 109 lib/cpus/aarch64/neoverse_zeus.S 110 111else 112FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 113endif 114 115BL1_SOURCES += drivers/arm/sp805/sp805.c \ 116 drivers/io/io_semihosting.c \ 117 lib/semihosting/semihosting.c \ 118 lib/semihosting/${ARCH}/semihosting_call.S \ 119 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 120 plat/arm/board/fvp/fvp_bl1_setup.c \ 121 plat/arm/board/fvp/fvp_io_storage.c \ 122 plat/arm/board/fvp/fvp_trusted_boot.c \ 123 ${FVP_CPU_LIBS} \ 124 ${FVP_INTERCONNECT_SOURCES} 125 126 127BL2_SOURCES += drivers/io/io_semihosting.c \ 128 lib/utils/mem_region.c \ 129 lib/semihosting/semihosting.c \ 130 lib/semihosting/${ARCH}/semihosting_call.S \ 131 plat/arm/board/fvp/fvp_bl2_setup.c \ 132 plat/arm/board/fvp/fvp_io_storage.c \ 133 plat/arm/board/fvp/fvp_trusted_boot.c \ 134 plat/arm/common/arm_nor_psci_mem_protect.c \ 135 ${FVP_SECURITY_SOURCES} 136 137 138 139ifeq (${BL2_AT_EL3},1) 140BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 141 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 142 ${FVP_CPU_LIBS} \ 143 ${FVP_INTERCONNECT_SOURCES} 144endif 145 146ifeq (${FVP_USE_SP804_TIMER},1) 147BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 148endif 149 150BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 151 ${FVP_SECURITY_SOURCES} 152 153BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 154 drivers/arm/smmu/smmu_v3.c \ 155 drivers/cfi/v2m/v2m_flash.c \ 156 lib/utils/mem_region.c \ 157 plat/arm/board/fvp/fvp_bl31_setup.c \ 158 plat/arm/board/fvp/fvp_pm.c \ 159 plat/arm/board/fvp/fvp_topology.c \ 160 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 161 plat/arm/common/arm_nor_psci_mem_protect.c \ 162 ${FVP_CPU_LIBS} \ 163 ${FVP_GIC_SOURCES} \ 164 ${FVP_INTERCONNECT_SOURCES} \ 165 ${FVP_SECURITY_SOURCES} 166 167# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 168ifdef UNIX_MK 169FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 170FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 171 ${PLAT}_tb_fw_config.dts \ 172 ${PLAT}_soc_fw_config.dts \ 173 ${PLAT}_nt_fw_config.dts \ 174 ) 175 176FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 177FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 178FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 179 180ifeq (${SPD},tspd) 181FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 182FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 183 184# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 185$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 186endif 187 188# Add the TB_FW_CONFIG to FIP and specify the same to certtool 189$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 190# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 191$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 192# Add the NT_FW_CONFIG to FIP and specify the same to certtool 193$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 194 195FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 196$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 197 198# Add the HW_CONFIG to FIP and specify the same to certtool 199$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 200endif 201 202# Enable Activity Monitor Unit extensions by default 203ENABLE_AMU := 1 204 205# Enable dynamic mitigation support by default 206DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 207 208ifneq (${RESET_TO_BL31},1) 209# Enable reclaiming of BL31 initialisation code for secondary cores stacks for 210# FVP. We cannot enable PIE for this case because the overlayed init section 211# creates some dynamic relocations which cannot be handled by the fixup 212# logic currently. 213RECLAIM_INIT_CODE := 1 214else 215# Enable PIE support when RESET_TO_BL31=1 216ENABLE_PIE := 1 217endif 218 219ifeq (${ENABLE_AMU},1) 220BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 221 lib/cpus/aarch64/neoverse_n1_pubsub.c \ 222 lib/cpus/aarch64/cpuamu.c \ 223 lib/cpus/aarch64/cpuamu_helpers.S 224endif 225 226ifeq (${RAS_EXTENSION},1) 227BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 228endif 229 230ifneq (${ENABLE_STACK_PROTECTOR},0) 231PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 232endif 233 234ifeq (${ARCH},aarch32) 235 NEED_BL32 := yes 236endif 237 238# Enable the dynamic translation tables library. 239ifeq (${ARCH},aarch32) 240 ifeq (${RESET_TO_SP_MIN},1) 241 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 242 endif 243else # if AArch64 244 ifeq (${RESET_TO_BL31},1) 245 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 246 endif 247 ifeq (${ENABLE_SPM},1) 248 ifeq (${SPM_MM},0) 249 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 250 endif 251 endif 252 ifeq (${SPD},trusty) 253 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 254 endif 255endif 256 257# Add support for platform supplied linker script for BL31 build 258$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 259 260ifneq (${BL2_AT_EL3}, 0) 261 override BL1_SOURCES = 262endif 263 264include plat/arm/board/common/board_common.mk 265include plat/arm/common/arm_common.mk 266 267# FVP being a development platform, enable capability to disable Authentication 268# dynamically if TRUSTED_BOARD_BOOT is set. 269ifeq (${TRUSTED_BOARD_BOOT}, 1) 270 DYN_DISABLE_AUTH := 1 271endif 272