1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 52 drivers/arm/gic/v3/gicv3_main.c \ 53 drivers/arm/gic/v3/gicv3_helpers.c \ 54 drivers/arm/gic/v3/gicdv3_helpers.c \ 55 drivers/arm/gic/v3/gicrv3_helpers.c \ 56 plat/common/plat_gicv3.c \ 57 plat/arm/common/arm_gicv3.c 58 59# Choose the GIC sources depending upon the how the FVP will be invoked 60ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 61FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 62 drivers/arm/gic/v3/gic500.c 63else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 64FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 65 drivers/arm/gic/v3/gic600.c 66else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 67FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 68 drivers/arm/gic/v2/gicv2_main.c \ 69 drivers/arm/gic/v2/gicv2_helpers.c \ 70 plat/common/plat_gicv2.c \ 71 plat/arm/common/arm_gicv2.c 72 73FVP_DT_PREFIX := fvp-base-gicv2-psci 74else 75$(error "Incorrect GIC driver chosen on FVP port") 76endif 77 78ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 79FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 80else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 81FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 82 plat/arm/common/arm_ccn.c 83else 84$(error "Incorrect CCN driver chosen on FVP port") 85endif 86 87FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 88 plat/arm/board/fvp/fvp_security.c \ 89 plat/arm/common/arm_tzc400.c 90 91 92PLAT_INCLUDES := -Iplat/arm/board/fvp/include 93 94 95PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 96 97FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 98 99ifeq (${ARCH}, aarch64) 100 101# select a different set of CPU files, depending on whether we compile for 102# hardware assisted coherency cores or not 103ifeq (${HW_ASSISTED_COHERENCY}, 0) 104# Cores used without DSU 105 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 106 lib/cpus/aarch64/cortex_a53.S \ 107 lib/cpus/aarch64/cortex_a57.S \ 108 lib/cpus/aarch64/cortex_a72.S \ 109 lib/cpus/aarch64/cortex_a73.S 110else 111# Cores used with DSU only 112 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 113 # AArch64-only cores 114 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 115 lib/cpus/aarch64/cortex_a76ae.S \ 116 lib/cpus/aarch64/cortex_a77.S \ 117 lib/cpus/aarch64/neoverse_n1.S \ 118 lib/cpus/aarch64/neoverse_e1.S \ 119 lib/cpus/aarch64/neoverse_zeus.S \ 120 lib/cpus/aarch64/cortex_hercules.S \ 121 lib/cpus/aarch64/cortex_hercules_ae.S \ 122 lib/cpus/aarch64/cortex_klein.S \ 123 lib/cpus/aarch64/cortex_matterhorn.S \ 124 lib/cpus/aarch64/cortex_a65.S \ 125 lib/cpus/aarch64/cortex_a65ae.S 126 endif 127 # AArch64/AArch32 cores 128 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 129 lib/cpus/aarch64/cortex_a75.S 130endif 131 132else 133FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 134endif 135 136BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 137 drivers/arm/sp805/sp805.c \ 138 drivers/delay_timer/delay_timer.c \ 139 drivers/io/io_semihosting.c \ 140 lib/semihosting/semihosting.c \ 141 lib/semihosting/${ARCH}/semihosting_call.S \ 142 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 143 plat/arm/board/fvp/fvp_bl1_setup.c \ 144 plat/arm/board/fvp/fvp_err.c \ 145 plat/arm/board/fvp/fvp_io_storage.c \ 146 ${FVP_CPU_LIBS} \ 147 ${FVP_INTERCONNECT_SOURCES} 148 149ifeq (${FVP_USE_SP804_TIMER},1) 150BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 151else 152BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 153endif 154 155 156BL2_SOURCES += drivers/arm/sp805/sp805.c \ 157 drivers/io/io_semihosting.c \ 158 lib/utils/mem_region.c \ 159 lib/semihosting/semihosting.c \ 160 lib/semihosting/${ARCH}/semihosting_call.S \ 161 plat/arm/board/fvp/fvp_bl2_setup.c \ 162 plat/arm/board/fvp/fvp_err.c \ 163 plat/arm/board/fvp/fvp_io_storage.c \ 164 plat/arm/common/arm_nor_psci_mem_protect.c \ 165 ${FVP_SECURITY_SOURCES} 166 167 168 169ifeq (${BL2_AT_EL3},1) 170BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 171 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 172 ${FVP_CPU_LIBS} \ 173 ${FVP_INTERCONNECT_SOURCES} 174endif 175 176ifeq (${FVP_USE_SP804_TIMER},1) 177BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 178endif 179 180BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 181 ${FVP_SECURITY_SOURCES} 182 183ifeq (${FVP_USE_SP804_TIMER},1) 184BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 185endif 186 187BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 188 drivers/arm/smmu/smmu_v3.c \ 189 drivers/delay_timer/delay_timer.c \ 190 drivers/cfi/v2m/v2m_flash.c \ 191 lib/utils/mem_region.c \ 192 plat/arm/board/fvp/fvp_bl31_setup.c \ 193 plat/arm/board/fvp/fvp_pm.c \ 194 plat/arm/board/fvp/fvp_topology.c \ 195 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 196 plat/arm/common/arm_nor_psci_mem_protect.c \ 197 ${FVP_CPU_LIBS} \ 198 ${FVP_GIC_SOURCES} \ 199 ${FVP_INTERCONNECT_SOURCES} \ 200 ${FVP_SECURITY_SOURCES} 201 202# Support for fconf in BL31 203# Added separately from the above list for better readability 204ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 205BL31_SOURCES += common/fdt_wrappers.c \ 206 lib/fconf/fconf.c \ 207 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 208endif 209 210ifeq (${FVP_USE_SP804_TIMER},1) 211BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 212else 213BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 214endif 215 216# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 217ifdef UNIX_MK 218FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 219FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 220 ${PLAT}_fw_config.dts \ 221 ${PLAT}_soc_fw_config.dts \ 222 ${PLAT}_nt_fw_config.dts \ 223 ) 224 225FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 226FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 227FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 228 229ifeq (${SPD},tspd) 230FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 231FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 232 233# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 234$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 235endif 236 237ifeq (${SPD},spmd) 238FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 239FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb 240 241# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 242$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 243endif 244 245# Add the TB_FW_CONFIG to FIP and specify the same to certtool 246$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 247# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 248$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 249# Add the NT_FW_CONFIG to FIP and specify the same to certtool 250$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 251 252FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 253$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 254 255# Add the HW_CONFIG to FIP and specify the same to certtool 256$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 257endif 258 259# Enable Activity Monitor Unit extensions by default 260ENABLE_AMU := 1 261 262# Enable dynamic mitigation support by default 263DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 264 265# Enable reclaiming of BL31 initialisation code for secondary cores 266# stacks for FVP. However, don't enable reclaiming for clang. 267ifneq (${RESET_TO_BL31},1) 268ifeq ($(findstring clang,$(notdir $(CC))),) 269RECLAIM_INIT_CODE := 1 270endif 271endif 272 273ifeq (${ENABLE_AMU},1) 274BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 275 lib/cpus/aarch64/cpuamu_helpers.S 276 277ifeq (${HW_ASSISTED_COHERENCY}, 1) 278BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 279 lib/cpus/aarch64/neoverse_n1_pubsub.c 280endif 281endif 282 283ifeq (${RAS_EXTENSION},1) 284BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 285endif 286 287ifneq (${ENABLE_STACK_PROTECTOR},0) 288PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 289endif 290 291ifeq (${ARCH},aarch32) 292 NEED_BL32 := yes 293endif 294 295# Enable the dynamic translation tables library. 296ifeq (${ARCH},aarch32) 297 ifeq (${RESET_TO_SP_MIN},1) 298 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 299 endif 300else # AArch64 301 ifeq (${RESET_TO_BL31},1) 302 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 303 endif 304 ifeq (${SPD},trusty) 305 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 306 endif 307endif 308 309ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 310 ifeq (${ARCH},aarch32) 311 BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1 312 else # AArch64 313 BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1 314 ifeq (${SPD},tspd) 315 BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1 316 endif 317 endif 318endif 319 320ifeq (${USE_DEBUGFS},1) 321 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 322endif 323 324# Add support for platform supplied linker script for BL31 build 325$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 326 327ifneq (${BL2_AT_EL3}, 0) 328 override BL1_SOURCES = 329endif 330 331include plat/arm/board/common/board_common.mk 332include plat/arm/common/arm_common.mk 333 334ifeq (${TRUSTED_BOARD_BOOT}, 1) 335BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 336BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 337# FVP being a development platform, enable capability to disable Authentication 338# dynamically if TRUSTED_BOARD_BOOT is set. 339DYN_DISABLE_AUTH := 1 340endif 341