xref: /rk3399_ARM-atf/plat/arm/board/fvp/platform.mk (revision f9ea3a6291b45bddda0564e8ff654a615933b173)
1#
2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Use the GICv3 driver on the FVP by default
8FVP_USE_GIC_DRIVER	:= FVP_GICV3
9
10# Use the SP804 timer instead of the generic one
11FVP_USE_SP804_TIMER	:= 0
12
13# Use fconf based io for FVP
14ifeq ($(BL2_AT_EL3), 0)
15USE_FCONF_BASED_IO	:= 1
16endif
17
18# Default cluster count for FVP
19FVP_CLUSTER_COUNT	:= 2
20
21# Default number of CPUs per cluster on FVP
22FVP_MAX_CPUS_PER_CLUSTER	:= 4
23
24# Default number of threads per CPU on FVP
25FVP_MAX_PE_PER_CPU	:= 1
26
27FVP_DT_PREFIX		:= fvp-base-gicv3-psci
28
29$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
30$(eval $(call add_define,FVP_USE_SP804_TIMER))
31
32# The FVP platform depends on this macro to build with correct GIC driver.
33$(eval $(call add_define,FVP_USE_GIC_DRIVER))
34
35# Pass FVP_CLUSTER_COUNT to the build system.
36$(eval $(call add_define,FVP_CLUSTER_COUNT))
37
38# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
39$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
40
41# Pass FVP_MAX_PE_PER_CPU to the build system.
42$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
43
44# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
45# choose the CCI driver , else the CCN driver
46ifeq ($(FVP_CLUSTER_COUNT), 0)
47$(error "Incorrect cluster count specified for FVP port")
48else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
49FVP_INTERCONNECT_DRIVER := FVP_CCI
50else
51FVP_INTERCONNECT_DRIVER := FVP_CCN
52endif
53
54$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
55
56FVP_GICV3_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
57				drivers/arm/gic/v3/gicv3_main.c		\
58				drivers/arm/gic/v3/gicv3_helpers.c	\
59				drivers/arm/gic/v3/gicdv3_helpers.c	\
60				drivers/arm/gic/v3/gicrv3_helpers.c	\
61				plat/common/plat_gicv3.c		\
62				plat/arm/common/arm_gicv3.c
63
64# Choose the GIC sources depending upon the how the FVP will be invoked
65ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
66FVP_GIC_SOURCES		:=	${FVP_GICV3_SOURCES}			\
67				drivers/arm/gic/v3/gic500.c
68else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600)
69FVP_GIC_SOURCES		:=	${FVP_GICV3_SOURCES}			\
70				drivers/arm/gic/v3/gic600.c
71else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
72FVP_GIC_SOURCES		:=	drivers/arm/gic/common/gic_common.c	\
73				drivers/arm/gic/v2/gicv2_main.c		\
74				drivers/arm/gic/v2/gicv2_helpers.c	\
75				plat/common/plat_gicv2.c		\
76				plat/arm/common/arm_gicv2.c
77
78FVP_DT_PREFIX		:=	fvp-base-gicv2-psci
79else
80$(error "Incorrect GIC driver chosen on FVP port")
81endif
82
83ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
84FVP_INTERCONNECT_SOURCES	:= 	drivers/arm/cci/cci.c
85else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
86FVP_INTERCONNECT_SOURCES	:= 	drivers/arm/ccn/ccn.c		\
87					plat/arm/common/arm_ccn.c
88else
89$(error "Incorrect CCN driver chosen on FVP port")
90endif
91
92FVP_SECURITY_SOURCES	:=	drivers/arm/tzc/tzc400.c		\
93				plat/arm/board/fvp/fvp_security.c	\
94				plat/arm/common/arm_tzc400.c
95
96
97PLAT_INCLUDES		:=	-Iplat/arm/board/fvp/include
98
99
100PLAT_BL_COMMON_SOURCES	:=	plat/arm/board/fvp/fvp_common.c
101
102FVP_CPU_LIBS		:=	lib/cpus/${ARCH}/aem_generic.S
103
104ifeq (${ARCH}, aarch64)
105
106# select a different set of CPU files, depending on whether we compile for
107# hardware assisted coherency cores or not
108ifeq (${HW_ASSISTED_COHERENCY}, 0)
109# Cores used without DSU
110	FVP_CPU_LIBS	+=	lib/cpus/aarch64/cortex_a35.S			\
111				lib/cpus/aarch64/cortex_a53.S			\
112				lib/cpus/aarch64/cortex_a57.S			\
113				lib/cpus/aarch64/cortex_a72.S			\
114				lib/cpus/aarch64/cortex_a73.S
115else
116# Cores used with DSU only
117	ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
118	# AArch64-only cores
119		FVP_CPU_LIBS	+=	lib/cpus/aarch64/cortex_a76.S		\
120					lib/cpus/aarch64/cortex_a76ae.S		\
121					lib/cpus/aarch64/cortex_a77.S		\
122					lib/cpus/aarch64/neoverse_n1.S		\
123					lib/cpus/aarch64/neoverse_e1.S		\
124					lib/cpus/aarch64/neoverse_zeus.S	\
125					lib/cpus/aarch64/cortex_hercules.S	\
126					lib/cpus/aarch64/cortex_hercules_ae.S	\
127					lib/cpus/aarch64/cortex_klein.S	        \
128					lib/cpus/aarch64/cortex_matterhorn.S	\
129					lib/cpus/aarch64/cortex_a65.S		\
130					lib/cpus/aarch64/cortex_a65ae.S
131	endif
132	# AArch64/AArch32 cores
133	FVP_CPU_LIBS	+=	lib/cpus/aarch64/cortex_a55.S		\
134				lib/cpus/aarch64/cortex_a75.S
135endif
136
137else
138FVP_CPU_LIBS		+=	lib/cpus/aarch32/cortex_a32.S
139endif
140
141BL1_SOURCES		+=	drivers/arm/smmu/smmu_v3.c			\
142				drivers/arm/sp805/sp805.c			\
143				drivers/delay_timer/delay_timer.c		\
144				drivers/io/io_semihosting.c			\
145				lib/semihosting/semihosting.c			\
146				lib/semihosting/${ARCH}/semihosting_call.S	\
147				plat/arm/board/fvp/${ARCH}/fvp_helpers.S	\
148				plat/arm/board/fvp/fvp_bl1_setup.c		\
149				plat/arm/board/fvp/fvp_err.c			\
150				plat/arm/board/fvp/fvp_io_storage.c		\
151				${FVP_CPU_LIBS}					\
152				${FVP_INTERCONNECT_SOURCES}
153
154ifeq (${FVP_USE_SP804_TIMER},1)
155BL1_SOURCES		+=	drivers/arm/sp804/sp804_delay_timer.c
156else
157BL1_SOURCES		+=	drivers/delay_timer/generic_delay_timer.c
158endif
159
160
161BL2_SOURCES		+=	drivers/arm/sp805/sp805.c			\
162				drivers/io/io_semihosting.c			\
163				lib/utils/mem_region.c				\
164				lib/semihosting/semihosting.c			\
165				lib/semihosting/${ARCH}/semihosting_call.S	\
166				plat/arm/board/fvp/fvp_bl2_setup.c		\
167				plat/arm/board/fvp/fvp_err.c			\
168				plat/arm/board/fvp/fvp_io_storage.c		\
169				plat/arm/common/arm_nor_psci_mem_protect.c	\
170				${FVP_SECURITY_SOURCES}
171
172
173
174ifeq (${BL2_AT_EL3},1)
175BL2_SOURCES		+=	plat/arm/board/fvp/${ARCH}/fvp_helpers.S	\
176				plat/arm/board/fvp/fvp_bl2_el3_setup.c		\
177				${FVP_CPU_LIBS}					\
178				${FVP_INTERCONNECT_SOURCES}
179endif
180
181ifeq (${FVP_USE_SP804_TIMER},1)
182BL2_SOURCES		+=	drivers/arm/sp804/sp804_delay_timer.c
183endif
184
185BL2U_SOURCES		+=	plat/arm/board/fvp/fvp_bl2u_setup.c		\
186				${FVP_SECURITY_SOURCES}
187
188ifeq (${FVP_USE_SP804_TIMER},1)
189BL2U_SOURCES		+=	drivers/arm/sp804/sp804_delay_timer.c
190endif
191
192BL31_SOURCES		+=	drivers/arm/fvp/fvp_pwrc.c			\
193				drivers/arm/smmu/smmu_v3.c			\
194				drivers/delay_timer/delay_timer.c		\
195				drivers/cfi/v2m/v2m_flash.c			\
196				lib/utils/mem_region.c				\
197				plat/arm/board/fvp/fvp_bl31_setup.c		\
198				plat/arm/board/fvp/fvp_pm.c			\
199				plat/arm/board/fvp/fvp_topology.c		\
200				plat/arm/board/fvp/aarch64/fvp_helpers.S	\
201				plat/arm/common/arm_nor_psci_mem_protect.c	\
202				${FVP_CPU_LIBS}					\
203				${FVP_GIC_SOURCES}				\
204				${FVP_INTERCONNECT_SOURCES}			\
205				${FVP_SECURITY_SOURCES}
206
207ifeq (${FVP_USE_SP804_TIMER},1)
208BL31_SOURCES		+=	drivers/arm/sp804/sp804_delay_timer.c
209else
210BL31_SOURCES		+=	drivers/delay_timer/generic_delay_timer.c
211endif
212
213# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
214ifdef UNIX_MK
215FVP_HW_CONFIG_DTS	:=	fdts/${FVP_DT_PREFIX}.dts
216FDT_SOURCES		+=	$(addprefix plat/arm/board/fvp/fdts/,	\
217					${PLAT}_fw_config.dts		\
218					${PLAT}_soc_fw_config.dts	\
219					${PLAT}_nt_fw_config.dts	\
220				)
221
222FVP_TB_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
223FVP_SOC_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
224FVP_NT_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
225
226ifeq (${SPD},tspd)
227FDT_SOURCES		+=	plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
228FVP_TOS_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
229
230# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
231$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
232endif
233
234ifeq (${SPD},spmd)
235FDT_SOURCES		+=	plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
236FVP_TOS_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb
237
238# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
239$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
240endif
241
242# Add the TB_FW_CONFIG to FIP and specify the same to certtool
243$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
244# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
245$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config))
246# Add the NT_FW_CONFIG to FIP and specify the same to certtool
247$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config))
248
249FDT_SOURCES		+=	${FVP_HW_CONFIG_DTS}
250$(eval FVP_HW_CONFIG	:=	${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
251
252# Add the HW_CONFIG to FIP and specify the same to certtool
253$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
254endif
255
256# Enable Activity Monitor Unit extensions by default
257ENABLE_AMU			:=	1
258
259# Enable dynamic mitigation support by default
260DYNAMIC_WORKAROUND_CVE_2018_3639	:=	1
261
262# Enable reclaiming of BL31 initialisation code for secondary cores
263# stacks for FVP. However, don't enable reclaiming for clang.
264ifneq (${RESET_TO_BL31},1)
265ifeq ($(findstring clang,$(notdir $(CC))),)
266RECLAIM_INIT_CODE	:=	1
267endif
268endif
269
270ifeq (${ENABLE_AMU},1)
271BL31_SOURCES		+=	lib/cpus/aarch64/cpuamu.c		\
272				lib/cpus/aarch64/cpuamu_helpers.S
273
274ifeq (${HW_ASSISTED_COHERENCY}, 1)
275BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a75_pubsub.c	\
276				lib/cpus/aarch64/neoverse_n1_pubsub.c
277endif
278endif
279
280ifeq (${RAS_EXTENSION},1)
281BL31_SOURCES		+=	plat/arm/board/fvp/aarch64/fvp_ras.c
282endif
283
284ifneq (${ENABLE_STACK_PROTECTOR},0)
285PLAT_BL_COMMON_SOURCES	+=	plat/arm/board/fvp/fvp_stack_protector.c
286endif
287
288ifeq (${ARCH},aarch32)
289    NEED_BL32 := yes
290endif
291
292# Enable the dynamic translation tables library.
293ifeq (${ARCH},aarch32)
294    ifeq (${RESET_TO_SP_MIN},1)
295        BL32_CFLAGS	+=	-DPLAT_XLAT_TABLES_DYNAMIC=1
296    endif
297else # AArch64
298    ifeq (${RESET_TO_BL31},1)
299        BL31_CFLAGS	+=	-DPLAT_XLAT_TABLES_DYNAMIC=1
300    endif
301    ifeq (${SPD},trusty)
302        BL31_CFLAGS	+=	-DPLAT_XLAT_TABLES_DYNAMIC=1
303    endif
304endif
305
306ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
307    ifeq (${ARCH},aarch32)
308        BL32_CFLAGS	+=	-DPLAT_RO_XLAT_TABLES=1
309    else # AArch64
310        BL31_CFLAGS	+=	-DPLAT_RO_XLAT_TABLES=1
311        ifeq (${SPD},tspd)
312            BL32_CFLAGS	+=	-DPLAT_RO_XLAT_TABLES=1
313        endif
314    endif
315endif
316
317ifeq (${USE_DEBUGFS},1)
318    BL31_CFLAGS	+=	-DPLAT_XLAT_TABLES_DYNAMIC=1
319endif
320
321# Add support for platform supplied linker script for BL31 build
322$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
323
324ifneq (${BL2_AT_EL3}, 0)
325    override BL1_SOURCES =
326endif
327
328include plat/arm/board/common/board_common.mk
329include plat/arm/common/arm_common.mk
330
331ifeq (${TRUSTED_BOARD_BOOT}, 1)
332BL1_SOURCES		+=	plat/arm/board/fvp/fvp_trusted_boot.c
333BL2_SOURCES		+=	plat/arm/board/fvp/fvp_trusted_boot.c
334# FVP being a development platform, enable capability to disable Authentication
335# dynamically if TRUSTED_BOARD_BOOT is set.
336DYN_DISABLE_AUTH	:=	1
337endif
338