1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 52 drivers/arm/gic/v3/gicv3_main.c \ 53 drivers/arm/gic/v3/gicv3_helpers.c \ 54 plat/common/plat_gicv3.c \ 55 plat/arm/common/arm_gicv3.c 56 57# Choose the GIC sources depending upon the how the FVP will be invoked 58ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 59FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 60 drivers/arm/gic/v3/gic500.c 61else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 62FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 63 drivers/arm/gic/v3/gic600.c 64else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 65FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 66 drivers/arm/gic/v2/gicv2_main.c \ 67 drivers/arm/gic/v2/gicv2_helpers.c \ 68 plat/common/plat_gicv2.c \ 69 plat/arm/common/arm_gicv2.c 70 71FVP_DT_PREFIX := fvp-base-gicv2-psci 72else 73$(error "Incorrect GIC driver chosen on FVP port") 74endif 75 76ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 77FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 78else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 79FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 80 plat/arm/common/arm_ccn.c 81else 82$(error "Incorrect CCN driver chosen on FVP port") 83endif 84 85FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 86 plat/arm/board/fvp/fvp_security.c \ 87 plat/arm/common/arm_tzc400.c 88 89 90PLAT_INCLUDES := -Iplat/arm/board/fvp/include 91 92 93PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 94 95FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 96 97ifeq (${ARCH}, aarch64) 98 99# select a different set of CPU files, depending on whether we compile for 100# hardware assisted coherency cores or not 101ifeq (${HW_ASSISTED_COHERENCY}, 0) 102# Cores used without DSU 103 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 104 lib/cpus/aarch64/cortex_a53.S \ 105 lib/cpus/aarch64/cortex_a57.S \ 106 lib/cpus/aarch64/cortex_a72.S \ 107 lib/cpus/aarch64/cortex_a73.S 108else 109# Cores used with DSU only 110 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 111 # AArch64-only cores 112 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 113 lib/cpus/aarch64/cortex_a76ae.S \ 114 lib/cpus/aarch64/cortex_a77.S \ 115 lib/cpus/aarch64/neoverse_n1.S \ 116 lib/cpus/aarch64/neoverse_e1.S \ 117 lib/cpus/aarch64/neoverse_zeus.S \ 118 lib/cpus/aarch64/cortex_hercules.S \ 119 lib/cpus/aarch64/cortex_hercules_ae.S \ 120 lib/cpus/aarch64/cortex_a65.S \ 121 lib/cpus/aarch64/cortex_a65ae.S 122 endif 123 # AArch64/AArch32 cores 124 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 125 lib/cpus/aarch64/cortex_a75.S 126endif 127 128else 129FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 130endif 131 132BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 133 drivers/arm/sp805/sp805.c \ 134 drivers/delay_timer/delay_timer.c \ 135 drivers/io/io_semihosting.c \ 136 lib/semihosting/semihosting.c \ 137 lib/semihosting/${ARCH}/semihosting_call.S \ 138 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 139 plat/arm/board/fvp/fvp_bl1_setup.c \ 140 plat/arm/board/fvp/fvp_err.c \ 141 plat/arm/board/fvp/fvp_io_storage.c \ 142 ${FVP_CPU_LIBS} \ 143 ${FVP_INTERCONNECT_SOURCES} 144 145ifeq (${FVP_USE_SP804_TIMER},1) 146BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 147else 148BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 149endif 150 151 152BL2_SOURCES += drivers/arm/sp805/sp805.c \ 153 drivers/io/io_semihosting.c \ 154 lib/utils/mem_region.c \ 155 lib/semihosting/semihosting.c \ 156 lib/semihosting/${ARCH}/semihosting_call.S \ 157 plat/arm/board/fvp/fvp_bl2_setup.c \ 158 plat/arm/board/fvp/fvp_err.c \ 159 plat/arm/board/fvp/fvp_io_storage.c \ 160 plat/arm/common/arm_nor_psci_mem_protect.c \ 161 ${FVP_SECURITY_SOURCES} 162 163 164 165ifeq (${BL2_AT_EL3},1) 166BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 167 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 168 ${FVP_CPU_LIBS} \ 169 ${FVP_INTERCONNECT_SOURCES} 170endif 171 172ifeq (${FVP_USE_SP804_TIMER},1) 173BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 174endif 175 176BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 177 ${FVP_SECURITY_SOURCES} 178 179ifeq (${FVP_USE_SP804_TIMER},1) 180BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 181endif 182 183BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 184 drivers/arm/smmu/smmu_v3.c \ 185 drivers/delay_timer/delay_timer.c \ 186 drivers/cfi/v2m/v2m_flash.c \ 187 lib/utils/mem_region.c \ 188 plat/arm/board/fvp/fvp_bl31_setup.c \ 189 plat/arm/board/fvp/fvp_pm.c \ 190 plat/arm/board/fvp/fvp_topology.c \ 191 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 192 plat/arm/common/arm_nor_psci_mem_protect.c \ 193 ${FVP_CPU_LIBS} \ 194 ${FVP_GIC_SOURCES} \ 195 ${FVP_INTERCONNECT_SOURCES} \ 196 ${FVP_SECURITY_SOURCES} 197 198ifeq (${FVP_USE_SP804_TIMER},1) 199BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 200else 201BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 202endif 203 204# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 205ifdef UNIX_MK 206FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 207FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 208 ${PLAT}_tb_fw_config.dts \ 209 ${PLAT}_soc_fw_config.dts \ 210 ${PLAT}_nt_fw_config.dts \ 211 ) 212 213FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 214FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 215FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 216 217ifeq (${SPD},tspd) 218FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 219FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 220 221# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 222$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 223endif 224 225# Add the TB_FW_CONFIG to FIP and specify the same to certtool 226$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 227# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 228$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 229# Add the NT_FW_CONFIG to FIP and specify the same to certtool 230$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 231 232FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 233$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 234 235# Add the HW_CONFIG to FIP and specify the same to certtool 236$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 237endif 238 239# Enable Activity Monitor Unit extensions by default 240ENABLE_AMU := 1 241 242# Enable dynamic mitigation support by default 243DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 244 245# Enable reclaiming of BL31 initialisation code for secondary cores 246# stacks for FVP. However, don't enable reclaiming for clang. 247ifneq (${RESET_TO_BL31},1) 248ifeq ($(findstring clang,$(notdir $(CC))),) 249RECLAIM_INIT_CODE := 1 250endif 251endif 252 253ifeq (${ENABLE_AMU},1) 254BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 255 lib/cpus/aarch64/cpuamu_helpers.S 256 257ifeq (${HW_ASSISTED_COHERENCY}, 1) 258BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 259 lib/cpus/aarch64/neoverse_n1_pubsub.c 260endif 261endif 262 263ifeq (${RAS_EXTENSION},1) 264BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 265endif 266 267ifneq (${ENABLE_STACK_PROTECTOR},0) 268PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 269endif 270 271ifeq (${ARCH},aarch32) 272 NEED_BL32 := yes 273endif 274 275# Enable the dynamic translation tables library. 276ifeq (${ARCH},aarch32) 277 ifeq (${RESET_TO_SP_MIN},1) 278 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 279 endif 280else # if AArch64 281 ifeq (${RESET_TO_BL31},1) 282 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 283 endif 284 ifeq (${SPD},trusty) 285 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 286 endif 287endif 288 289ifeq (${USE_DEBUGFS},1) 290 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 291endif 292 293# Add support for platform supplied linker script for BL31 build 294$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 295 296ifneq (${BL2_AT_EL3}, 0) 297 override BL1_SOURCES = 298endif 299 300include plat/arm/board/common/board_common.mk 301include plat/arm/common/arm_common.mk 302 303ifeq (${TRUSTED_BOARD_BOOT}, 1) 304BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 305BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 306# FVP being a development platform, enable capability to disable Authentication 307# dynamically if TRUSTED_BOARD_BOOT is set. 308DYN_DISABLE_AUTH := 1 309endif 310