1# 2# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 52 drivers/arm/gic/v3/gicv3_main.c \ 53 drivers/arm/gic/v3/gicv3_helpers.c \ 54 plat/common/plat_gicv3.c \ 55 plat/arm/common/arm_gicv3.c 56 57# Choose the GIC sources depending upon the how the FVP will be invoked 58ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 59FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 60 drivers/arm/gic/v3/gic500.c 61else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 62FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 63 drivers/arm/gic/v3/gic600.c 64else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 65FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 66 drivers/arm/gic/v2/gicv2_main.c \ 67 drivers/arm/gic/v2/gicv2_helpers.c \ 68 plat/common/plat_gicv2.c \ 69 plat/arm/common/arm_gicv2.c 70 71FVP_DT_PREFIX := fvp-base-gicv2-psci 72 73else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3_LEGACY) 74 ifeq (${ARCH}, aarch32) 75 $(error "GICV3 Legacy driver not supported for AArch32 build") 76 endif 77FVP_GIC_SOURCES := drivers/arm/gic/arm_gic.c \ 78 drivers/arm/gic/gic_v2.c \ 79 drivers/arm/gic/gic_v3.c \ 80 plat/common/plat_gic.c \ 81 plat/arm/common/arm_gicv3_legacy.c 82 83FVP_DT_PREFIX := fvp-base-gicv2-psci 84 85else 86$(error "Incorrect GIC driver chosen on FVP port") 87endif 88 89ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 90FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 91else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 92FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 93 plat/arm/common/arm_ccn.c 94else 95$(error "Incorrect CCN driver chosen on FVP port") 96endif 97 98FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 99 plat/arm/board/fvp/fvp_security.c \ 100 plat/arm/common/arm_tzc400.c 101 102 103PLAT_INCLUDES := -Iplat/arm/board/fvp/include 104 105 106PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 107 108FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 109 110ifeq (${ARCH}, aarch64) 111FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 112 lib/cpus/aarch64/cortex_a53.S \ 113 lib/cpus/aarch64/cortex_a55.S \ 114 lib/cpus/aarch64/cortex_a57.S \ 115 lib/cpus/aarch64/cortex_a72.S \ 116 lib/cpus/aarch64/cortex_a73.S \ 117 lib/cpus/aarch64/cortex_a75.S \ 118 lib/cpus/aarch64/cortex_a76.S \ 119 lib/cpus/aarch64/cortex_ares.S \ 120 lib/cpus/aarch64/cortex_deimos.S 121else 122FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 123endif 124 125BL1_SOURCES += drivers/io/io_semihosting.c \ 126 lib/semihosting/semihosting.c \ 127 lib/semihosting/${ARCH}/semihosting_call.S \ 128 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 129 plat/arm/board/fvp/fvp_bl1_setup.c \ 130 plat/arm/board/fvp/fvp_io_storage.c \ 131 plat/arm/board/fvp/fvp_trusted_boot.c \ 132 ${FVP_CPU_LIBS} \ 133 ${FVP_INTERCONNECT_SOURCES} 134 135 136BL2_SOURCES += drivers/io/io_semihosting.c \ 137 lib/semihosting/semihosting.c \ 138 lib/semihosting/${ARCH}/semihosting_call.S \ 139 plat/arm/board/fvp/fvp_bl2_setup.c \ 140 plat/arm/board/fvp/fvp_io_storage.c \ 141 plat/arm/board/fvp/fvp_trusted_boot.c \ 142 ${FVP_SECURITY_SOURCES} 143 144ifeq (${BL2_AT_EL3},1) 145BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 146 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 147 ${FVP_CPU_LIBS} \ 148 ${FVP_INTERCONNECT_SOURCES} 149endif 150 151ifeq (${FVP_USE_SP804_TIMER},1) 152BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 153endif 154 155BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 156 ${FVP_SECURITY_SOURCES} 157 158BL31_SOURCES += drivers/arm/smmu/smmu_v3.c \ 159 plat/arm/board/fvp/fvp_bl31_setup.c \ 160 plat/arm/board/fvp/fvp_pm.c \ 161 plat/arm/board/fvp/fvp_topology.c \ 162 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 163 plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c \ 164 ${FVP_CPU_LIBS} \ 165 ${FVP_GIC_SOURCES} \ 166 ${FVP_INTERCONNECT_SOURCES} \ 167 ${FVP_SECURITY_SOURCES} 168 169# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 170ifdef UNIX_MK 171FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 172FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 173 ${PLAT}_tb_fw_config.dts \ 174 ${PLAT}_soc_fw_config.dts \ 175 ${PLAT}_nt_fw_config.dts \ 176 ) 177 178FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 179FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 180FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 181 182ifeq (${SPD},tspd) 183FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 184FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 185 186# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 187$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 188endif 189 190# Add the TB_FW_CONFIG to FIP and specify the same to certtool 191$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 192# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 193$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 194# Add the NT_FW_CONFIG to FIP and specify the same to certtool 195$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 196 197FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 198$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 199 200# Add the HW_CONFIG to FIP and specify the same to certtool 201$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 202endif 203 204# Disable the PSCI platform compatibility layer 205ENABLE_PLAT_COMPAT := 0 206 207# Enable Activity Monitor Unit extensions by default 208ENABLE_AMU := 1 209 210# Enable dynamic mitigation support by default 211DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 212 213ifeq (${ENABLE_AMU},1) 214BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 215 lib/cpus/aarch64/cortex_ares_pubsub.c \ 216 lib/cpus/aarch64/cpuamu.c \ 217 lib/cpus/aarch64/cpuamu_helpers.S 218endif 219 220ifeq (${RAS_EXTENSION},1) 221BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 222endif 223 224ifneq (${ENABLE_STACK_PROTECTOR},0) 225PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 226endif 227 228ifeq (${ARCH},aarch32) 229 NEED_BL32 := yes 230endif 231 232# Add support for platform supplied linker script for BL31 build 233$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 234 235ifneq (${BL2_AT_EL3}, 0) 236 override BL1_SOURCES = 237endif 238 239include plat/arm/board/common/board_common.mk 240include plat/arm/common/arm_common.mk 241 242# FVP being a development platform, enable capability to disable Authentication 243# dynamically if TRUSTED_BOARD_BOOT and LOAD_IMAGE_V2 is set. 244ifeq (${TRUSTED_BOARD_BOOT}, 1) 245 ifeq (${LOAD_IMAGE_V2}, 1) 246 DYN_DISABLE_AUTH := 1 247 endif 248endif 249