1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51# Choose the GIC sources depending upon the how the FVP will be invoked 52ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600)) 53 54 # GIC500 is the default option in case GICV3_IMPL is not set 55 ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600) 56 GICV3_IMPL := GIC600 57 endif 58 59GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 60 61# Include GICv3 driver files 62include drivers/arm/gic/v3/gicv3.mk 63 64FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 65 plat/common/plat_gicv3.c \ 66 plat/arm/common/arm_gicv3.c 67 68 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 69 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 70 endif 71 72else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 73 74# No GICv4 extension 75GIC_ENABLE_V4_EXTN := 0 76$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 77 78# No support for extended PPI and SPI range 79GIC_EXT_INTID := 0 80$(eval $(call add_define,GIC_EXT_INTID)) 81 82FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 83 drivers/arm/gic/v2/gicv2_main.c \ 84 drivers/arm/gic/v2/gicv2_helpers.c \ 85 plat/common/plat_gicv2.c \ 86 plat/arm/common/arm_gicv2.c 87 88FVP_DT_PREFIX := fvp-base-gicv2-psci 89else 90$(error "Incorrect GIC driver chosen on FVP port") 91endif 92 93ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 94FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 95else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 96FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 97 plat/arm/common/arm_ccn.c 98else 99$(error "Incorrect CCN driver chosen on FVP port") 100endif 101 102FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 103 plat/arm/board/fvp/fvp_security.c \ 104 plat/arm/common/arm_tzc400.c 105 106 107PLAT_INCLUDES := -Iplat/arm/board/fvp/include 108 109 110PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 111 112FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 113 114ifeq (${ARCH}, aarch64) 115 116# select a different set of CPU files, depending on whether we compile for 117# hardware assisted coherency cores or not 118ifeq (${HW_ASSISTED_COHERENCY}, 0) 119# Cores used without DSU 120 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 121 lib/cpus/aarch64/cortex_a53.S \ 122 lib/cpus/aarch64/cortex_a57.S \ 123 lib/cpus/aarch64/cortex_a72.S \ 124 lib/cpus/aarch64/cortex_a73.S 125else 126# Cores used with DSU only 127 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 128 # AArch64-only cores 129 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 130 lib/cpus/aarch64/cortex_a76ae.S \ 131 lib/cpus/aarch64/cortex_a77.S \ 132 lib/cpus/aarch64/neoverse_n1.S \ 133 lib/cpus/aarch64/neoverse_e1.S \ 134 lib/cpus/aarch64/neoverse_zeus.S \ 135 lib/cpus/aarch64/cortex_hercules.S \ 136 lib/cpus/aarch64/cortex_hercules_ae.S \ 137 lib/cpus/aarch64/cortex_klein.S \ 138 lib/cpus/aarch64/cortex_matterhorn.S \ 139 lib/cpus/aarch64/cortex_a65.S \ 140 lib/cpus/aarch64/cortex_a65ae.S 141 endif 142 # AArch64/AArch32 cores 143 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 144 lib/cpus/aarch64/cortex_a75.S 145endif 146 147else 148FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 149endif 150 151BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 152 drivers/arm/sp805/sp805.c \ 153 drivers/delay_timer/delay_timer.c \ 154 drivers/io/io_semihosting.c \ 155 lib/semihosting/semihosting.c \ 156 lib/semihosting/${ARCH}/semihosting_call.S \ 157 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 158 plat/arm/board/fvp/fvp_bl1_setup.c \ 159 plat/arm/board/fvp/fvp_err.c \ 160 plat/arm/board/fvp/fvp_io_storage.c \ 161 ${FVP_CPU_LIBS} \ 162 ${FVP_INTERCONNECT_SOURCES} 163 164ifeq (${FVP_USE_SP804_TIMER},1) 165BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 166else 167BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 168endif 169 170 171BL2_SOURCES += drivers/arm/sp805/sp805.c \ 172 drivers/io/io_semihosting.c \ 173 lib/utils/mem_region.c \ 174 lib/semihosting/semihosting.c \ 175 lib/semihosting/${ARCH}/semihosting_call.S \ 176 plat/arm/board/fvp/fvp_bl2_setup.c \ 177 plat/arm/board/fvp/fvp_err.c \ 178 plat/arm/board/fvp/fvp_io_storage.c \ 179 plat/arm/common/arm_nor_psci_mem_protect.c \ 180 ${FVP_SECURITY_SOURCES} 181 182 183 184ifeq (${BL2_AT_EL3},1) 185BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 186 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 187 ${FVP_CPU_LIBS} \ 188 ${FVP_INTERCONNECT_SOURCES} 189endif 190 191ifeq (${FVP_USE_SP804_TIMER},1) 192BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 193endif 194 195BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 196 ${FVP_SECURITY_SOURCES} 197 198ifeq (${FVP_USE_SP804_TIMER},1) 199BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 200endif 201 202BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 203 drivers/arm/smmu/smmu_v3.c \ 204 drivers/delay_timer/delay_timer.c \ 205 drivers/cfi/v2m/v2m_flash.c \ 206 lib/utils/mem_region.c \ 207 plat/arm/board/fvp/fvp_bl31_setup.c \ 208 plat/arm/board/fvp/fvp_pm.c \ 209 plat/arm/board/fvp/fvp_topology.c \ 210 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 211 plat/arm/common/arm_nor_psci_mem_protect.c \ 212 ${FVP_CPU_LIBS} \ 213 ${FVP_GIC_SOURCES} \ 214 ${FVP_INTERCONNECT_SOURCES} \ 215 ${FVP_SECURITY_SOURCES} 216 217# Support for fconf in BL31 218# Added separately from the above list for better readability 219ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 220BL31_SOURCES += common/fdt_wrappers.c \ 221 lib/fconf/fconf.c \ 222 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 223endif 224 225ifeq (${FVP_USE_SP804_TIMER},1) 226BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 227else 228BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 229endif 230 231# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 232ifdef UNIX_MK 233FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 234FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 235 ${PLAT}_fw_config.dts \ 236 ${PLAT}_soc_fw_config.dts \ 237 ${PLAT}_nt_fw_config.dts \ 238 ) 239 240FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 241FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 242FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 243 244ifeq (${SPD},tspd) 245FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 246FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 247 248# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 249$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 250endif 251 252ifeq (${SPD},spmd) 253FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 254FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb 255 256# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 257$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 258endif 259 260# Add the TB_FW_CONFIG to FIP and specify the same to certtool 261$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 262# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 263$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 264# Add the NT_FW_CONFIG to FIP and specify the same to certtool 265$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 266 267FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 268$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 269 270# Add the HW_CONFIG to FIP and specify the same to certtool 271$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 272endif 273 274# Enable Activity Monitor Unit extensions by default 275ENABLE_AMU := 1 276 277# Enable dynamic mitigation support by default 278DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 279 280# Enable reclaiming of BL31 initialisation code for secondary cores 281# stacks for FVP. However, don't enable reclaiming for clang. 282ifneq (${RESET_TO_BL31},1) 283ifeq ($(findstring clang,$(notdir $(CC))),) 284RECLAIM_INIT_CODE := 1 285endif 286endif 287 288ifeq (${ENABLE_AMU},1) 289BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 290 lib/cpus/aarch64/cpuamu_helpers.S 291 292ifeq (${HW_ASSISTED_COHERENCY}, 1) 293BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 294 lib/cpus/aarch64/neoverse_n1_pubsub.c 295endif 296endif 297 298ifeq (${RAS_EXTENSION},1) 299BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 300endif 301 302ifneq (${ENABLE_STACK_PROTECTOR},0) 303PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 304endif 305 306ifeq (${ARCH},aarch32) 307 NEED_BL32 := yes 308endif 309 310# Enable the dynamic translation tables library. 311ifeq (${ARCH},aarch32) 312 ifeq (${RESET_TO_SP_MIN},1) 313 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 314 endif 315else # AArch64 316 ifeq (${RESET_TO_BL31},1) 317 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 318 endif 319 ifeq (${SPD},trusty) 320 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 321 endif 322endif 323 324ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 325 ifeq (${ARCH},aarch32) 326 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 327 else # AArch64 328 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 329 ifeq (${SPD},tspd) 330 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 331 endif 332 endif 333endif 334 335ifeq (${USE_DEBUGFS},1) 336 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 337endif 338 339# Add support for platform supplied linker script for BL31 build 340$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 341 342ifneq (${BL2_AT_EL3}, 0) 343 override BL1_SOURCES = 344endif 345 346include plat/arm/board/common/board_common.mk 347include plat/arm/common/arm_common.mk 348 349ifeq (${TRUSTED_BOARD_BOOT}, 1) 350BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 351BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 352# FVP being a development platform, enable capability to disable Authentication 353# dynamically if TRUSTED_BOARD_BOOT is set. 354DYN_DISABLE_AUTH := 1 355endif 356