1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51# Choose the GIC sources depending upon the how the FVP will be invoked 52ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 53 54# The GIC model (GIC-600 or GIC-500) will be detected at runtime 55GICV3_SUPPORT_GIC600 := 1 56GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 57 58# Include GICv3 driver files 59include drivers/arm/gic/v3/gicv3.mk 60 61FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 62 plat/common/plat_gicv3.c \ 63 plat/arm/common/arm_gicv3.c 64 65 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 66 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 67 endif 68 69else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 70 71# No GICv4 extension 72GIC_ENABLE_V4_EXTN := 0 73$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 74 75# Include GICv2 driver files 76include drivers/arm/gic/v2/gicv2.mk 77 78FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 79 plat/common/plat_gicv2.c \ 80 plat/arm/common/arm_gicv2.c 81 82FVP_DT_PREFIX := fvp-base-gicv2-psci 83else 84$(error "Incorrect GIC driver chosen on FVP port") 85endif 86 87ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 88FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 89else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 90FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 91 plat/arm/common/arm_ccn.c 92else 93$(error "Incorrect CCN driver chosen on FVP port") 94endif 95 96FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 97 plat/arm/board/fvp/fvp_security.c \ 98 plat/arm/common/arm_tzc400.c 99 100 101PLAT_INCLUDES := -Iplat/arm/board/fvp/include 102 103 104PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 105 106FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 107 108ifeq (${ARCH}, aarch64) 109 110# select a different set of CPU files, depending on whether we compile for 111# hardware assisted coherency cores or not 112ifeq (${HW_ASSISTED_COHERENCY}, 0) 113# Cores used without DSU 114 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 115 lib/cpus/aarch64/cortex_a53.S \ 116 lib/cpus/aarch64/cortex_a57.S \ 117 lib/cpus/aarch64/cortex_a72.S \ 118 lib/cpus/aarch64/cortex_a73.S 119else 120# Cores used with DSU only 121 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 122 # AArch64-only cores 123 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 124 lib/cpus/aarch64/cortex_a76ae.S \ 125 lib/cpus/aarch64/cortex_a77.S \ 126 lib/cpus/aarch64/cortex_a78.S \ 127 lib/cpus/aarch64/neoverse_n1.S \ 128 lib/cpus/aarch64/neoverse_e1.S \ 129 lib/cpus/aarch64/neoverse_zeus.S \ 130 lib/cpus/aarch64/cortex_hercules_ae.S \ 131 lib/cpus/aarch64/cortex_klein.S \ 132 lib/cpus/aarch64/cortex_matterhorn.S \ 133 lib/cpus/aarch64/cortex_a65.S \ 134 lib/cpus/aarch64/cortex_a65ae.S 135 endif 136 # AArch64/AArch32 cores 137 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 138 lib/cpus/aarch64/cortex_a75.S 139endif 140 141else 142FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 143endif 144 145BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 146 drivers/arm/sp805/sp805.c \ 147 drivers/delay_timer/delay_timer.c \ 148 drivers/io/io_semihosting.c \ 149 lib/semihosting/semihosting.c \ 150 lib/semihosting/${ARCH}/semihosting_call.S \ 151 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 152 plat/arm/board/fvp/fvp_bl1_setup.c \ 153 plat/arm/board/fvp/fvp_err.c \ 154 plat/arm/board/fvp/fvp_io_storage.c \ 155 ${FVP_CPU_LIBS} \ 156 ${FVP_INTERCONNECT_SOURCES} 157 158ifeq (${FVP_USE_SP804_TIMER},1) 159BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 160else 161BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 162endif 163 164 165BL2_SOURCES += drivers/arm/sp805/sp805.c \ 166 drivers/io/io_semihosting.c \ 167 lib/utils/mem_region.c \ 168 lib/semihosting/semihosting.c \ 169 lib/semihosting/${ARCH}/semihosting_call.S \ 170 plat/arm/board/fvp/fvp_bl2_setup.c \ 171 plat/arm/board/fvp/fvp_err.c \ 172 plat/arm/board/fvp/fvp_io_storage.c \ 173 plat/arm/common/arm_nor_psci_mem_protect.c \ 174 ${FVP_SECURITY_SOURCES} 175 176 177 178ifeq (${BL2_AT_EL3},1) 179BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 180 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 181 ${FVP_CPU_LIBS} \ 182 ${FVP_INTERCONNECT_SOURCES} 183endif 184 185ifeq (${FVP_USE_SP804_TIMER},1) 186BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 187endif 188 189BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 190 ${FVP_SECURITY_SOURCES} 191 192ifeq (${FVP_USE_SP804_TIMER},1) 193BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 194endif 195 196BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 197 drivers/arm/smmu/smmu_v3.c \ 198 drivers/delay_timer/delay_timer.c \ 199 drivers/cfi/v2m/v2m_flash.c \ 200 lib/utils/mem_region.c \ 201 plat/arm/board/fvp/fvp_bl31_setup.c \ 202 plat/arm/board/fvp/fvp_console.c \ 203 plat/arm/board/fvp/fvp_pm.c \ 204 plat/arm/board/fvp/fvp_topology.c \ 205 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 206 plat/arm/common/arm_nor_psci_mem_protect.c \ 207 ${FVP_CPU_LIBS} \ 208 ${FVP_GIC_SOURCES} \ 209 ${FVP_INTERCONNECT_SOURCES} \ 210 ${FVP_SECURITY_SOURCES} 211 212# Support for fconf in BL31 213# Added separately from the above list for better readability 214ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 215BL31_SOURCES += common/fdt_wrappers.c \ 216 lib/fconf/fconf.c \ 217 lib/fconf/fconf_dyn_cfg_getter.c \ 218 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 219 220ifeq (${SEC_INT_DESC_IN_FCONF},1) 221BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 222endif 223 224endif 225 226ifeq (${FVP_USE_SP804_TIMER},1) 227BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 228else 229BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 230endif 231 232# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 233ifdef UNIX_MK 234FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 235FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 236 ${PLAT}_fw_config.dts \ 237 ${PLAT}_tb_fw_config.dts \ 238 ${PLAT}_soc_fw_config.dts \ 239 ${PLAT}_nt_fw_config.dts \ 240 ) 241 242FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 243FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 244FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 245FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 246 247ifeq (${SPD},tspd) 248FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 249FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 250 251# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 252$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 253endif 254 255ifeq (${SPD},spmd) 256FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 257FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb 258 259# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 260$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 261endif 262 263# Add the FW_CONFIG to FIP and specify the same to certtool 264$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config)) 265# Add the TB_FW_CONFIG to FIP and specify the same to certtool 266$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 267# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 268$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 269# Add the NT_FW_CONFIG to FIP and specify the same to certtool 270$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 271 272FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 273$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 274 275# Add the HW_CONFIG to FIP and specify the same to certtool 276$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 277endif 278 279# Enable Activity Monitor Unit extensions by default 280ENABLE_AMU := 1 281 282# Enable dynamic mitigation support by default 283DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 284 285# Enable reclaiming of BL31 initialisation code for secondary cores 286# stacks for FVP. However, don't enable reclaiming for clang. 287ifneq (${RESET_TO_BL31},1) 288ifeq ($(findstring clang,$(notdir $(CC))),) 289RECLAIM_INIT_CODE := 1 290endif 291endif 292 293ifeq (${ENABLE_AMU},1) 294BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 295 lib/cpus/aarch64/cpuamu_helpers.S 296 297ifeq (${HW_ASSISTED_COHERENCY}, 1) 298BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 299 lib/cpus/aarch64/neoverse_n1_pubsub.c 300endif 301endif 302 303ifeq (${RAS_EXTENSION},1) 304BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 305endif 306 307ifneq (${ENABLE_STACK_PROTECTOR},0) 308PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 309endif 310 311ifeq (${ARCH},aarch32) 312 NEED_BL32 := yes 313endif 314 315# Enable the dynamic translation tables library. 316ifeq (${ARCH},aarch32) 317 ifeq (${RESET_TO_SP_MIN},1) 318 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 319 endif 320else # AArch64 321 ifeq (${RESET_TO_BL31},1) 322 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 323 endif 324 ifeq (${SPD},trusty) 325 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 326 endif 327endif 328 329ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 330 ifeq (${ARCH},aarch32) 331 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 332 else # AArch64 333 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 334 ifeq (${SPD},tspd) 335 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 336 endif 337 endif 338endif 339 340ifeq (${USE_DEBUGFS},1) 341 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 342endif 343 344# Add support for platform supplied linker script for BL31 build 345$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 346 347ifneq (${BL2_AT_EL3}, 0) 348 override BL1_SOURCES = 349endif 350 351include plat/arm/board/common/board_common.mk 352include plat/arm/common/arm_common.mk 353 354ifeq (${TRUSTED_BOARD_BOOT}, 1) 355BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 356BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 357 358ifeq (${MEASURED_BOOT},1) 359BL2_SOURCES += plat/arm/board/fvp/fvp_measured_boot.c 360endif 361 362# FVP being a development platform, enable capability to disable Authentication 363# dynamically if TRUSTED_BOARD_BOOT is set. 364DYN_DISABLE_AUTH := 1 365endif 366