1# 2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 52 drivers/arm/gic/v3/gicv3_main.c \ 53 drivers/arm/gic/v3/gicv3_helpers.c \ 54 plat/common/plat_gicv3.c \ 55 plat/arm/common/arm_gicv3.c 56 57# Choose the GIC sources depending upon the how the FVP will be invoked 58ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 59FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 60 drivers/arm/gic/v3/gic500.c 61else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 62FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 63 drivers/arm/gic/v3/gic600.c 64else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 65FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 66 drivers/arm/gic/v2/gicv2_main.c \ 67 drivers/arm/gic/v2/gicv2_helpers.c \ 68 plat/common/plat_gicv2.c \ 69 plat/arm/common/arm_gicv2.c 70 71FVP_DT_PREFIX := fvp-base-gicv2-psci 72else 73$(error "Incorrect GIC driver chosen on FVP port") 74endif 75 76ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 77FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 78else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 79FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 80 plat/arm/common/arm_ccn.c 81else 82$(error "Incorrect CCN driver chosen on FVP port") 83endif 84 85FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 86 plat/arm/board/fvp/fvp_security.c \ 87 plat/arm/common/arm_tzc400.c 88 89 90PLAT_INCLUDES := -Iplat/arm/board/fvp/include 91 92 93PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 94 95FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 96 97ifeq (${ARCH}, aarch64) 98 99# select a different set of CPU files, depending on whether we compile for 100# hardware assisted coherency cores or not 101ifeq (${HW_ASSISTED_COHERENCY}, 0) 102 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 103 lib/cpus/aarch64/cortex_a53.S \ 104 lib/cpus/aarch64/cortex_a57.S \ 105 lib/cpus/aarch64/cortex_a72.S \ 106 lib/cpus/aarch64/cortex_a73.S 107else 108 # AArch64-only cores 109 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 110 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 111 lib/cpus/aarch64/cortex_a76ae.S \ 112 lib/cpus/aarch64/cortex_a77.S \ 113 lib/cpus/aarch64/neoverse_n1.S \ 114 lib/cpus/aarch64/neoverse_e1.S \ 115 lib/cpus/aarch64/neoverse_zeus.S \ 116 lib/cpus/aarch64/cortex_hercules.S 117 # AArch64/AArch32 118 else 119 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 120 lib/cpus/aarch64/cortex_a75.S 121 endif 122endif 123 124else 125FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 126endif 127 128BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 129 drivers/arm/sp805/sp805.c \ 130 drivers/io/io_semihosting.c \ 131 lib/semihosting/semihosting.c \ 132 lib/semihosting/${ARCH}/semihosting_call.S \ 133 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 134 plat/arm/board/fvp/fvp_bl1_setup.c \ 135 plat/arm/board/fvp/fvp_io_storage.c \ 136 plat/arm/board/fvp/fvp_trusted_boot.c \ 137 ${FVP_CPU_LIBS} \ 138 ${FVP_INTERCONNECT_SOURCES} 139 140 141BL2_SOURCES += drivers/io/io_semihosting.c \ 142 lib/utils/mem_region.c \ 143 lib/semihosting/semihosting.c \ 144 lib/semihosting/${ARCH}/semihosting_call.S \ 145 plat/arm/board/fvp/fvp_bl2_setup.c \ 146 plat/arm/board/fvp/fvp_io_storage.c \ 147 plat/arm/board/fvp/fvp_trusted_boot.c \ 148 plat/arm/common/arm_nor_psci_mem_protect.c \ 149 ${FVP_SECURITY_SOURCES} 150 151 152 153ifeq (${BL2_AT_EL3},1) 154BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 155 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 156 ${FVP_CPU_LIBS} \ 157 ${FVP_INTERCONNECT_SOURCES} 158endif 159 160ifeq (${FVP_USE_SP804_TIMER},1) 161BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 162endif 163 164BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 165 ${FVP_SECURITY_SOURCES} 166 167BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 168 drivers/arm/smmu/smmu_v3.c \ 169 drivers/cfi/v2m/v2m_flash.c \ 170 lib/utils/mem_region.c \ 171 plat/arm/board/fvp/fvp_bl31_setup.c \ 172 plat/arm/board/fvp/fvp_pm.c \ 173 plat/arm/board/fvp/fvp_topology.c \ 174 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 175 plat/arm/common/arm_nor_psci_mem_protect.c \ 176 ${FVP_CPU_LIBS} \ 177 ${FVP_GIC_SOURCES} \ 178 ${FVP_INTERCONNECT_SOURCES} \ 179 ${FVP_SECURITY_SOURCES} 180 181# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 182ifdef UNIX_MK 183FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 184FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 185 ${PLAT}_tb_fw_config.dts \ 186 ${PLAT}_soc_fw_config.dts \ 187 ${PLAT}_nt_fw_config.dts \ 188 ) 189 190FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 191FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 192FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 193 194ifeq (${SPD},tspd) 195FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 196FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 197 198# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 199$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 200endif 201 202# Add the TB_FW_CONFIG to FIP and specify the same to certtool 203$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 204# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 205$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 206# Add the NT_FW_CONFIG to FIP and specify the same to certtool 207$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 208 209FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 210$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 211 212# Add the HW_CONFIG to FIP and specify the same to certtool 213$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 214endif 215 216# Enable Activity Monitor Unit extensions by default 217ENABLE_AMU := 1 218 219# Enable dynamic mitigation support by default 220DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 221 222ifneq (${RESET_TO_BL31},1) 223# Enable reclaiming of BL31 initialisation code for secondary cores stacks for 224# FVP. We cannot enable PIE for this case because the overlayed init section 225# creates some dynamic relocations which cannot be handled by the fixup 226# logic currently. 227RECLAIM_INIT_CODE := 1 228else 229# Enable PIE support when RESET_TO_BL31=1 230ENABLE_PIE := 1 231endif 232 233ifeq (${ENABLE_AMU},1) 234BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 235 lib/cpus/aarch64/cpuamu_helpers.S 236 237ifeq (${HW_ASSISTED_COHERENCY}, 1) 238BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 239 lib/cpus/aarch64/neoverse_n1_pubsub.c 240endif 241endif 242 243ifeq (${RAS_EXTENSION},1) 244BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 245endif 246 247ifneq (${ENABLE_STACK_PROTECTOR},0) 248PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 249endif 250 251ifeq (${ARCH},aarch32) 252 NEED_BL32 := yes 253endif 254 255# Enable the dynamic translation tables library. 256ifeq (${ARCH},aarch32) 257 ifeq (${RESET_TO_SP_MIN},1) 258 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 259 endif 260else # if AArch64 261 ifeq (${RESET_TO_BL31},1) 262 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 263 endif 264 ifeq (${ENABLE_SPM},1) 265 ifeq (${SPM_MM},0) 266 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 267 endif 268 endif 269 ifeq (${SPD},trusty) 270 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 271 endif 272endif 273 274# Add support for platform supplied linker script for BL31 build 275$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 276 277ifneq (${BL2_AT_EL3}, 0) 278 override BL1_SOURCES = 279endif 280 281include plat/arm/board/common/board_common.mk 282include plat/arm/common/arm_common.mk 283 284# FVP being a development platform, enable capability to disable Authentication 285# dynamically if TRUSTED_BOARD_BOOT is set. 286ifeq (${TRUSTED_BOARD_BOOT}, 1) 287 DYN_DISABLE_AUTH := 1 288endif 289