1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Default cluster count for FVP 14FVP_CLUSTER_COUNT := 2 15 16# Default number of CPUs per cluster on FVP 17FVP_MAX_CPUS_PER_CLUSTER := 4 18 19# Default number of threads per CPU on FVP 20FVP_MAX_PE_PER_CPU := 1 21 22FVP_DT_PREFIX := fvp-base-gicv3-psci 23 24$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 25$(eval $(call add_define,FVP_USE_SP804_TIMER)) 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 40# choose the CCI driver , else the CCN driver 41ifeq ($(FVP_CLUSTER_COUNT), 0) 42$(error "Incorrect cluster count specified for FVP port") 43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 44FVP_INTERCONNECT_DRIVER := FVP_CCI 45else 46FVP_INTERCONNECT_DRIVER := FVP_CCN 47endif 48 49$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 50 51# Choose the GIC sources depending upon the how the FVP will be invoked 52ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600)) 53 ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600) 54 GICV3_IMPL := GIC600 55 endif 56 57# GIC500 is the default option in case GICV3_IMPL is not set 58 59GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 60 61# Include GICv3 driver files 62include drivers/arm/gic/v3/gicv3.mk 63 64FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 65 plat/common/plat_gicv3.c \ 66 plat/arm/common/arm_gicv3.c 67 68else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 69FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 70 drivers/arm/gic/v2/gicv2_main.c \ 71 drivers/arm/gic/v2/gicv2_helpers.c \ 72 plat/common/plat_gicv2.c \ 73 plat/arm/common/arm_gicv2.c 74 75FVP_DT_PREFIX := fvp-base-gicv2-psci 76else 77$(error "Incorrect GIC driver chosen on FVP port") 78endif 79 80ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 81FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 82else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 83FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 84 plat/arm/common/arm_ccn.c 85else 86$(error "Incorrect CCN driver chosen on FVP port") 87endif 88 89FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 90 plat/arm/board/fvp/fvp_security.c \ 91 plat/arm/common/arm_tzc400.c 92 93 94PLAT_INCLUDES := -Iplat/arm/board/fvp/include 95 96 97PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 98 99FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 100 101ifeq (${ARCH}, aarch64) 102 103# select a different set of CPU files, depending on whether we compile for 104# hardware assisted coherency cores or not 105ifeq (${HW_ASSISTED_COHERENCY}, 0) 106# Cores used without DSU 107 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 108 lib/cpus/aarch64/cortex_a53.S \ 109 lib/cpus/aarch64/cortex_a57.S \ 110 lib/cpus/aarch64/cortex_a72.S \ 111 lib/cpus/aarch64/cortex_a73.S 112else 113# Cores used with DSU only 114 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 115 # AArch64-only cores 116 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 117 lib/cpus/aarch64/cortex_a76ae.S \ 118 lib/cpus/aarch64/cortex_a77.S \ 119 lib/cpus/aarch64/neoverse_n1.S \ 120 lib/cpus/aarch64/neoverse_e1.S \ 121 lib/cpus/aarch64/neoverse_zeus.S \ 122 lib/cpus/aarch64/cortex_hercules.S \ 123 lib/cpus/aarch64/cortex_hercules_ae.S \ 124 lib/cpus/aarch64/cortex_klein.S \ 125 lib/cpus/aarch64/cortex_matterhorn.S \ 126 lib/cpus/aarch64/cortex_a65.S \ 127 lib/cpus/aarch64/cortex_a65ae.S 128 endif 129 # AArch64/AArch32 cores 130 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 131 lib/cpus/aarch64/cortex_a75.S 132endif 133 134else 135FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 136endif 137 138BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 139 drivers/arm/sp805/sp805.c \ 140 drivers/delay_timer/delay_timer.c \ 141 drivers/io/io_semihosting.c \ 142 lib/semihosting/semihosting.c \ 143 lib/semihosting/${ARCH}/semihosting_call.S \ 144 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 145 plat/arm/board/fvp/fvp_bl1_setup.c \ 146 plat/arm/board/fvp/fvp_err.c \ 147 plat/arm/board/fvp/fvp_io_storage.c \ 148 ${FVP_CPU_LIBS} \ 149 ${FVP_INTERCONNECT_SOURCES} 150 151ifeq (${FVP_USE_SP804_TIMER},1) 152BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 153else 154BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 155endif 156 157 158BL2_SOURCES += drivers/arm/sp805/sp805.c \ 159 drivers/io/io_semihosting.c \ 160 lib/utils/mem_region.c \ 161 lib/semihosting/semihosting.c \ 162 lib/semihosting/${ARCH}/semihosting_call.S \ 163 plat/arm/board/fvp/fvp_bl2_setup.c \ 164 plat/arm/board/fvp/fvp_err.c \ 165 plat/arm/board/fvp/fvp_io_storage.c \ 166 plat/arm/common/arm_nor_psci_mem_protect.c \ 167 ${FVP_SECURITY_SOURCES} 168 169 170 171ifeq (${BL2_AT_EL3},1) 172BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 173 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 174 ${FVP_CPU_LIBS} \ 175 ${FVP_INTERCONNECT_SOURCES} 176endif 177 178ifeq (${FVP_USE_SP804_TIMER},1) 179BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 180endif 181 182BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 183 ${FVP_SECURITY_SOURCES} 184 185ifeq (${FVP_USE_SP804_TIMER},1) 186BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 187endif 188 189BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 190 drivers/arm/smmu/smmu_v3.c \ 191 drivers/delay_timer/delay_timer.c \ 192 drivers/cfi/v2m/v2m_flash.c \ 193 lib/utils/mem_region.c \ 194 plat/arm/board/fvp/fvp_bl31_setup.c \ 195 plat/arm/board/fvp/fvp_pm.c \ 196 plat/arm/board/fvp/fvp_topology.c \ 197 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 198 plat/arm/common/arm_nor_psci_mem_protect.c \ 199 ${FVP_CPU_LIBS} \ 200 ${FVP_GIC_SOURCES} \ 201 ${FVP_INTERCONNECT_SOURCES} \ 202 ${FVP_SECURITY_SOURCES} 203 204# Support for fconf in BL31 205# Added separately from the above list for better readability 206ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 207BL31_SOURCES += common/fdt_wrappers.c \ 208 lib/fconf/fconf.c \ 209 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 210endif 211 212ifeq (${FVP_USE_SP804_TIMER},1) 213BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 214else 215BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 216endif 217 218# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 219ifdef UNIX_MK 220FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 221FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 222 ${PLAT}_fw_config.dts \ 223 ${PLAT}_soc_fw_config.dts \ 224 ${PLAT}_nt_fw_config.dts \ 225 ) 226 227FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 228FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 229FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 230 231ifeq (${SPD},tspd) 232FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 233FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 234 235# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 236$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 237endif 238 239ifeq (${SPD},spmd) 240FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 241FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb 242 243# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 244$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 245endif 246 247# Add the TB_FW_CONFIG to FIP and specify the same to certtool 248$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 249# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 250$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 251# Add the NT_FW_CONFIG to FIP and specify the same to certtool 252$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 253 254FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 255$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 256 257# Add the HW_CONFIG to FIP and specify the same to certtool 258$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 259endif 260 261# Enable Activity Monitor Unit extensions by default 262ENABLE_AMU := 1 263 264# Enable dynamic mitigation support by default 265DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 266 267# Enable reclaiming of BL31 initialisation code for secondary cores 268# stacks for FVP. However, don't enable reclaiming for clang. 269ifneq (${RESET_TO_BL31},1) 270ifeq ($(findstring clang,$(notdir $(CC))),) 271RECLAIM_INIT_CODE := 1 272endif 273endif 274 275ifeq (${ENABLE_AMU},1) 276BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 277 lib/cpus/aarch64/cpuamu_helpers.S 278 279ifeq (${HW_ASSISTED_COHERENCY}, 1) 280BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 281 lib/cpus/aarch64/neoverse_n1_pubsub.c 282endif 283endif 284 285ifeq (${RAS_EXTENSION},1) 286BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 287endif 288 289ifneq (${ENABLE_STACK_PROTECTOR},0) 290PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 291endif 292 293ifeq (${ARCH},aarch32) 294 NEED_BL32 := yes 295endif 296 297# Enable the dynamic translation tables library. 298ifeq (${ARCH},aarch32) 299 ifeq (${RESET_TO_SP_MIN},1) 300 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 301 endif 302else # AArch64 303 ifeq (${RESET_TO_BL31},1) 304 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 305 endif 306 ifeq (${SPD},trusty) 307 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 308 endif 309endif 310 311ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 312 ifeq (${ARCH},aarch32) 313 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES=1 314 else # AArch64 315 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES=1 316 ifeq (${SPD},tspd) 317 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES=1 318 endif 319 endif 320endif 321 322ifeq (${USE_DEBUGFS},1) 323 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 324endif 325 326# Add support for platform supplied linker script for BL31 build 327$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 328 329ifneq (${BL2_AT_EL3}, 0) 330 override BL1_SOURCES = 331endif 332 333include plat/arm/board/common/board_common.mk 334include plat/arm/common/arm_common.mk 335 336ifeq (${TRUSTED_BOARD_BOOT}, 1) 337BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 338BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 339# FVP being a development platform, enable capability to disable Authentication 340# dynamically if TRUSTED_BOARD_BOOT is set. 341DYN_DISABLE_AUTH := 1 342endif 343