1 /* 2 * Copyright (c) 2021-2023, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_A520_H 8 #define CORTEX_A520_H 9 10 #define CORTEX_A520_MIDR U(0x410FD800) 11 12 /******************************************************************************* 13 * CPU Extended Control register specific definitions 14 ******************************************************************************/ 15 #define CORTEX_A520_CPUECTLR_EL1 S3_0_C15_C1_4 16 17 /******************************************************************************* 18 * CPU Power Control register specific definitions 19 ******************************************************************************/ 20 #define CORTEX_A520_CPUPWRCTLR_EL1 S3_0_C15_C2_7 21 #define CORTEX_A520_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 22 23 #endif /* CORTEX_A520_H */ 24