1PLATFORM_FLAVOR ?= qemu_virt 2 3ifeq ($(PLATFORM_FLAVOR),qemu_virt) 4include core/arch/arm/cpu/cortex-a15.mk 5endif 6ifeq ($(PLATFORM_FLAVOR),fvp) 7include core/arch/arm/cpu/cortex-armv8-0.mk 8platform-debugger-arm := 1 9endif 10ifeq ($(PLATFORM_FLAVOR),juno) 11include core/arch/arm/cpu/cortex-armv8-0.mk 12platform-debugger-arm := 1 13# Workaround 808870: Unconditional VLDM instructions might cause an 14# alignment fault even though the address is aligned 15# Either hard float must be disabled for AArch32 or strict alignment checks 16# must be disabled 17ifeq ($(CFG_SCTLR_ALIGNMENT_CHECK),y) 18$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y) 19else 20$(call force,CFG_SCTLR_ALIGNMENT_CHECK,n) 21endif 22endif #juno 23ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 24include core/arch/arm/cpu/cortex-armv8-0.mk 25endif 26 27 28ifeq ($(platform-debugger-arm),1) 29# ARM debugger needs this 30platform-cflags-debug-info = -gdwarf-2 31platform-aflags-debug-info = -gdwarf-2 32endif 33 34ifeq ($(platform-flavor-armv8),1) 35$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 36endif 37 38$(call force,CFG_GIC,y) 39$(call force,CFG_PL011,y) 40$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 41 42ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 43# NOTE: Below values for the TPM event log are implementation 44# dependent and used mostly for debugging purposes. 45# Care must be taken to properly configure them if used. 46CFG_TPM_LOG_BASE_ADDR ?= 0x402c951 47CFG_TPM_MAX_LOG_SIZE ?= 0x200 48endif 49 50ifeq ($(CFG_ARM64_core),y) 51$(call force,CFG_WITH_LPAE,y) 52else 53$(call force,CFG_ARM32_core,y) 54endif 55 56CFG_WITH_STATS ?= y 57 58ifeq ($(PLATFORM_FLAVOR),fvp) 59CFG_TEE_CORE_NB_CORE = 8 60CFG_TZDRAM_START ?= 0x06000000 61CFG_TZDRAM_SIZE ?= 0x02000000 62CFG_SHMEM_START ?= 0x83000000 63CFG_SHMEM_SIZE ?= 0x00200000 64# DRAM1 is defined above 4G 65$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 66$(call force,CFG_CORE_ARM64_PA_BITS,36) 67endif 68 69ifeq ($(PLATFORM_FLAVOR),juno) 70CFG_TEE_CORE_NB_CORE = 6 71CFG_TZDRAM_START ?= 0xff000000 72CFG_TZDRAM_SIZE ?= 0x00ff8000 73CFG_SHMEM_START ?= 0xfee00000 74CFG_SHMEM_SIZE ?= 0x00200000 75# DRAM1 is defined above 4G 76$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 77$(call force,CFG_CORE_ARM64_PA_BITS,36) 78CFG_CRYPTO_WITH_CE ?= y 79endif 80 81ifeq ($(PLATFORM_FLAVOR),qemu_virt) 82CFG_TEE_CORE_NB_CORE = 4 83# [0e00.0000 0e0f.ffff] is reserved to early boot 84CFG_TZDRAM_START ?= 0x0e100000 85CFG_TZDRAM_SIZE ?= 0x00f00000 86CFG_SHMEM_START ?= 0x7fe00000 87CFG_SHMEM_SIZE ?= 0x00200000 88# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 89CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 90# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs 91CFG_TEE_RAM_VA_SIZE ?= 0x00200000 92ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 93# CFG_ASAN_SHADOW_OFFSET is calculated as: 94# (&__asan_shadow_start - (TEE_RAM_VA_START / 8) 95# This is unfortunately currently not possible to do in make so we have to 96# calculate it offline, there's some asserts in 97# core/arch/arm/kernel/generic_boot.c to check that we got it right 98CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0 99endif 100$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 101$(call force,CFG_PSCI_ARM32,y) 102$(call force,CFG_DT,y) 103CFG_DTB_MAX_SIZE ?= 0x100000 104endif 105 106ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 107CFG_TEE_CORE_NB_CORE = 4 108# [0e00.0000 0e0f.ffff] is reserved to early boot 109CFG_TZDRAM_START ?= 0x0e100000 110CFG_TZDRAM_SIZE ?= 0x00f00000 111# SHM chosen arbitrary, in a way that it does not interfere 112# with initial location of linux kernel, dtb and initrd. 113CFG_SHMEM_START ?= 0x42000000 114CFG_SHMEM_SIZE ?= 0x00200000 115# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 116CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 117$(call force,CFG_DT,y) 118CFG_DTB_MAX_SIZE ?= 0x100000 119endif 120