1PLATFORM_FLAVOR ?= qemu_virt 2 3ifeq ($(PLATFORM_FLAVOR),qemu_virt) 4include core/arch/arm/cpu/cortex-a15.mk 5endif 6ifeq ($(PLATFORM_FLAVOR),fvp) 7include core/arch/arm/cpu/cortex-armv8-0.mk 8platform-debugger-arm := 1 9endif 10ifeq ($(PLATFORM_FLAVOR),juno) 11include core/arch/arm/cpu/cortex-armv8-0.mk 12platform-debugger-arm := 1 13# Workaround 808870: Unconditional VLDM instructions might cause an 14# alignment fault even though the address is aligned 15# Either hard float must be disabled for AArch32 or strict alignment checks 16# must be disabled 17ifeq ($(CFG_SCTLR_ALIGNMENT_CHECK),y) 18$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y) 19else 20$(call force,CFG_SCTLR_ALIGNMENT_CHECK,n) 21endif 22endif #juno 23ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 24include core/arch/arm/cpu/cortex-armv8-0.mk 25CFG_ARM64_core ?= y 26supported-ta-targets ?= ta_arm64 ta_arm32 27endif 28 29 30ifeq ($(platform-debugger-arm),1) 31# ARM debugger needs this 32platform-cflags-debug-info = -gdwarf-2 33platform-aflags-debug-info = -gdwarf-2 34endif 35 36ifeq ($(platform-flavor-armv8),1) 37$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 38endif 39 40$(call force,CFG_PL011,y) 41$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 42 43ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 44# NOTE: Below values for the TPM event log are implementation 45# dependent and used mostly for debugging purposes. 46# Care must be taken to properly configure them if used. 47CFG_TPM_LOG_BASE_ADDR ?= 0x402c951 48CFG_TPM_MAX_LOG_SIZE ?= 0x200 49endif 50 51ifneq ($(CFG_ARM64_core),y) 52$(call force,CFG_ARM32_core,y) 53endif 54 55CFG_WITH_STATS ?= y 56CFG_ENABLE_EMBEDDED_TESTS ?= y 57 58ifeq ($(CFG_CORE_SEL2_SPMC),y) 59$(call force,CFG_CORE_RESERVED_SHM,n) 60CFG_GIC ?= n 61else 62$(call force,CFG_GIC,y) 63endif 64 65ifeq ($(PLATFORM_FLAVOR),fvp) 66CFG_HALT_CORES_ON_PANIC ?= y 67CFG_TEE_CORE_NB_CORE ?= 8 68ifeq ($(CFG_CORE_SEL2_SPMC),y) 69CFG_TZDRAM_START ?= 0x06281000 70CFG_TZDRAM_SIZE ?= 0x01D80000 71else 72CFG_TZDRAM_START ?= 0x06000000 73CFG_TZDRAM_SIZE ?= 0x02000000 74endif 75CFG_SHMEM_START ?= 0x83000000 76CFG_SHMEM_SIZE ?= 0x00200000 77# DRAM1 is defined above 4G 78$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 79$(call force,CFG_CORE_ARM64_PA_BITS,36) 80CFG_AUTO_MAX_PA_BITS ?= y 81ifeq ($(CFG_SCMI_SCPFW),y) 82$(call force,CFG_SCMI_SCPFW_PRODUCT,fvp) 83endif 84ifeq ($(CFG_CORE_SEL1_SPMC),y) 85CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 9 86endif 87endif 88 89ifeq ($(PLATFORM_FLAVOR),juno) 90CFG_HALT_CORES_ON_PANIC ?= y 91CFG_TEE_CORE_NB_CORE ?= 6 92CFG_TZDRAM_START ?= 0xff000000 93CFG_TZDRAM_SIZE ?= 0x00ff8000 94CFG_SHMEM_START ?= 0xfee00000 95CFG_SHMEM_SIZE ?= 0x00200000 96# DRAM1 is defined above 4G 97$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 98$(call force,CFG_CORE_ARM64_PA_BITS,36) 99CFG_CRYPTO_WITH_CE ?= y 100CFG_ARM_SMCCC_TRNG ?= y 101CFG_WITH_SOFTWARE_PRNG ?= n 102endif 103 104ifeq ($(PLATFORM_FLAVOR),qemu_virt) 105CFG_CORE_HEAP_SIZE ?= 98304 106CFG_HALT_CORES_ON_PANIC ?= y 107CFG_TEE_CORE_NB_CORE ?= 4 108# [0e00.0000 0e0f.ffff] is reserved to early boot 109CFG_TZDRAM_START ?= 0x0e100000 110CFG_TZDRAM_SIZE ?= 0x00f00000 111CFG_SHMEM_START ?= 0x7fe00000 112CFG_SHMEM_SIZE ?= 0x00200000 113# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 114CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 115# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs 116CFG_TEE_RAM_VA_SIZE ?= 0x00200000 117ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 118# CFG_ASAN_SHADOW_OFFSET is calculated as: 119# (&__asan_shadow_start - (TEE_RAM_VA_START / 8) 120# This is unfortunately currently not possible to do in make so we have to 121# calculate it offline, there's some asserts in 122# core/arch/arm/kernel/generic_boot.c to check that we got it right 123CFG_ASAN_SHADOW_OFFSET ?= 0xc6a71c0 124endif 125$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 126$(call force,CFG_PSCI_ARM32,y) 127$(call force,CFG_DT,y) 128CFG_DTB_MAX_SIZE ?= 0x100000 129CFG_CORE_ASYNC_NOTIF ?= y 130CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 219 131endif 132 133ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 134CFG_CORE_TZSRAM_EMUL_SIZE ?= 655360 135CFG_CORE_HEAP_SIZE ?= 196608 136CFG_HALT_CORES_ON_PANIC ?= y 137CFG_TEE_CORE_NB_CORE ?= 4 138CFG_AUTO_MAX_PA_BITS ?= y 139ifneq ($(CFG_CORE_SEL2_SPMC),y) 140# [0e00.0000 0e0f.ffff] is reserved to early boot 141CFG_TZDRAM_START ?= 0x0e100000 142CFG_TZDRAM_SIZE ?= 0x00f00000 143# SHM chosen arbitrary, in a way that it does not interfere 144# with initial location of linux kernel, dtb and initrd. 145CFG_SHMEM_START ?= 0x42000000 146CFG_SHMEM_SIZE ?= 0x00200000 147# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 148CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 149ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 150# See comment above 151CFG_ASAN_SHADOW_OFFSET ?= 0xc6a71c0 152endif 153endif 154$(call force,CFG_DT,y) 155CFG_DTB_MAX_SIZE ?= 0x100000 156ifeq ($(CFG_SCMI_SCPFW),y) 157$(call force,CFG_SCMI_SCPFW_PRODUCT,fvp) 158endif 159 160CFG_CORE_ASYNC_NOTIF ?= y 161ifeq ($(CFG_CORE_SEL1_SPMC),y) 162CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 8 163else ifneq ($(CFG_CORE_SEL2_SPMC),y) 164CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 219 165endif 166endif #PLATFORM_FLAVOR==qemu_armv8a 167 168ifneq (,$(filter $(PLATFORM_FLAVOR),qemu_virt qemu_armv8a)) 169CFG_DT_DRIVER_EMBEDDED_TEST ?= y 170ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 171$(call force,CFG_EMBED_DTB_SOURCE_FILE,embedded_dtb_test.dts,Mandated for DT tests) 172endif 173endif 174 175CFG_PKCS11_TA ?= y 176CFG_PKCS11_TA_RSA_X_509 ?= y 177