1PLATFORM_FLAVOR ?= qemu_virt 2 3ifeq ($(PLATFORM_FLAVOR),qemu_virt) 4include core/arch/arm/cpu/cortex-a15.mk 5endif 6ifeq ($(PLATFORM_FLAVOR),fvp) 7include core/arch/arm/cpu/cortex-armv8-0.mk 8platform-debugger-arm := 1 9endif 10ifeq ($(PLATFORM_FLAVOR),juno) 11include core/arch/arm/cpu/cortex-armv8-0.mk 12platform-debugger-arm := 1 13# Workaround 808870: Unconditional VLDM instructions might cause an 14# alignment fault even though the address is aligned 15$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y) 16endif 17ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 18include core/arch/arm/cpu/cortex-armv8-0.mk 19endif 20 21 22ifeq ($(platform-debugger-arm),1) 23# ARM debugger needs this 24platform-cflags-debug-info = -gdwarf-2 25platform-aflags-debug-info = -gdwarf-2 26endif 27 28ifeq ($(platform-flavor-armv8),1) 29$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 30endif 31 32$(call force,CFG_GENERIC_BOOT,y) 33$(call force,CFG_GIC,y) 34$(call force,CFG_PL011,y) 35$(call force,CFG_PM_STUBS,y) 36$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 37 38ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 39# NOTE: Below values for the TPM event log are implementation 40# dependent and used mostly for debugging purposes. 41# Care must be taken to properly configure them if used. 42CFG_TPM_LOG_BASE_ADDR ?= 0x402c951 43CFG_TPM_MAX_LOG_SIZE ?= 0x200 44endif 45 46ifeq ($(CFG_ARM64_core),y) 47$(call force,CFG_WITH_LPAE,y) 48else 49$(call force,CFG_ARM32_core,y) 50endif 51 52CFG_WITH_STACK_CANARIES ?= y 53CFG_WITH_STATS ?= y 54 55ifeq ($(PLATFORM_FLAVOR),fvp) 56CFG_TEE_CORE_NB_CORE = 8 57CFG_TZDRAM_START ?= 0x06000000 58CFG_TZDRAM_SIZE ?= 0x02000000 59CFG_SHMEM_START ?= 0x83000000 60CFG_SHMEM_SIZE ?= 0x00200000 61# DRAM1 is defined above 4G 62$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 63$(call force,CFG_CORE_ARM64_PA_BITS,36) 64endif 65 66ifeq ($(PLATFORM_FLAVOR),juno) 67CFG_TEE_CORE_NB_CORE = 6 68CFG_TZDRAM_START ?= 0xff000000 69CFG_TZDRAM_SIZE ?= 0x00ff8000 70CFG_SHMEM_START ?= 0xfee00000 71CFG_SHMEM_SIZE ?= 0x00200000 72# DRAM1 is defined above 4G 73$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 74$(call force,CFG_CORE_ARM64_PA_BITS,36) 75CFG_CRYPTO_WITH_CE ?= y 76endif 77 78ifeq ($(PLATFORM_FLAVOR),qemu_virt) 79CFG_TEE_CORE_NB_CORE = 4 80# [0e00.0000 0e0f.ffff] is reserved to early boot 81CFG_TZDRAM_START ?= 0x0e100000 82CFG_TZDRAM_SIZE ?= 0x00f00000 83CFG_SHMEM_START ?= 0x7fe00000 84CFG_SHMEM_SIZE ?= 0x00200000 85# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 86CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 87# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs 88CFG_TEE_RAM_VA_SIZE ?= 0x00200000 89ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 90# CFG_ASAN_SHADOW_OFFSET is calculated as: 91# (&__asan_shadow_start - (TEE_RAM_VA_START / 8) 92# This is unfortunately currently not possible to do in make so we have to 93# calculate it offline, there's some asserts in 94# core/arch/arm/kernel/generic_boot.c to check that we got it right 95CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0 96endif 97$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 98$(call force,CFG_PSCI_ARM32,y) 99$(call force,CFG_DT,y) 100CFG_DTB_MAX_SIZE ?= 0x100000 101endif 102 103ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 104CFG_TEE_CORE_NB_CORE = 4 105# [0e00.0000 0e0f.ffff] is reserved to early boot 106CFG_TZDRAM_START ?= 0x0e100000 107CFG_TZDRAM_SIZE ?= 0x00f00000 108# SHM chosen arbitrary, in a way that it does not interfere 109# with initial location of linux kernel, dtb and initrd. 110CFG_SHMEM_START ?= 0x42000000 111CFG_SHMEM_SIZE ?= 0x00200000 112# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 113CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 114$(call force,CFG_DT,y) 115CFG_DTB_MAX_SIZE ?= 0x100000 116endif 117