xref: /optee_os/core/arch/arm/plat-vexpress/conf.mk (revision 9c86da3cf9edc0eaeff03b01299d78c9309b2299)
1PLATFORM_FLAVOR ?= qemu_virt
2
3ifeq ($(PLATFORM_FLAVOR),qemu_virt)
4include core/arch/arm/cpu/cortex-a15.mk
5endif
6ifeq ($(PLATFORM_FLAVOR),fvp)
7include core/arch/arm/cpu/cortex-armv8-0.mk
8platform-debugger-arm := 1
9endif
10ifeq ($(PLATFORM_FLAVOR),juno)
11include core/arch/arm/cpu/cortex-armv8-0.mk
12platform-debugger-arm := 1
13# Workaround 808870: Unconditional VLDM instructions might cause an
14# alignment fault even though the address is aligned
15$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y)
16endif
17ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
18include core/arch/arm/cpu/cortex-armv8-0.mk
19endif
20
21
22ifeq ($(platform-debugger-arm),1)
23# ARM debugger needs this
24platform-cflags-debug-info = -gdwarf-2
25platform-aflags-debug-info = -gdwarf-2
26endif
27
28ifeq ($(platform-flavor-armv8),1)
29$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
30endif
31
32$(call force,CFG_GIC,y)
33$(call force,CFG_PL011,y)
34$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
35
36ifeq ($(CFG_CORE_TPM_EVENT_LOG),y)
37# NOTE: Below values for the TPM event log are implementation
38# dependent and used mostly for debugging purposes.
39# Care must be taken to properly configure them if used.
40CFG_TPM_LOG_BASE_ADDR ?= 0x402c951
41CFG_TPM_MAX_LOG_SIZE ?= 0x200
42endif
43
44ifeq ($(CFG_ARM64_core),y)
45$(call force,CFG_WITH_LPAE,y)
46else
47$(call force,CFG_ARM32_core,y)
48endif
49
50CFG_WITH_STATS ?= y
51
52ifeq ($(PLATFORM_FLAVOR),fvp)
53CFG_TEE_CORE_NB_CORE = 8
54CFG_TZDRAM_START ?= 0x06000000
55CFG_TZDRAM_SIZE  ?= 0x02000000
56CFG_SHMEM_START  ?= 0x83000000
57CFG_SHMEM_SIZE   ?= 0x00200000
58# DRAM1 is defined above 4G
59$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
60$(call force,CFG_CORE_ARM64_PA_BITS,36)
61endif
62
63ifeq ($(PLATFORM_FLAVOR),juno)
64CFG_TEE_CORE_NB_CORE = 6
65CFG_TZDRAM_START ?= 0xff000000
66CFG_TZDRAM_SIZE  ?= 0x00ff8000
67CFG_SHMEM_START  ?= 0xfee00000
68CFG_SHMEM_SIZE   ?= 0x00200000
69# DRAM1 is defined above 4G
70$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
71$(call force,CFG_CORE_ARM64_PA_BITS,36)
72CFG_CRYPTO_WITH_CE ?= y
73endif
74
75ifeq ($(PLATFORM_FLAVOR),qemu_virt)
76CFG_TEE_CORE_NB_CORE = 4
77# [0e00.0000 0e0f.ffff] is reserved to early boot
78CFG_TZDRAM_START ?= 0x0e100000
79CFG_TZDRAM_SIZE  ?= 0x00f00000
80CFG_SHMEM_START  ?= 0x7fe00000
81CFG_SHMEM_SIZE   ?= 0x00200000
82# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
83CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
84# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs
85CFG_TEE_RAM_VA_SIZE ?= 0x00200000
86ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y)
87# CFG_ASAN_SHADOW_OFFSET is calculated as:
88# (&__asan_shadow_start - (TEE_RAM_VA_START / 8)
89# This is unfortunately currently not possible to do in make so we have to
90# calculate it offline, there's some asserts in
91# core/arch/arm/kernel/generic_boot.c to check that we got it right
92CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0
93endif
94$(call force,CFG_BOOT_SECONDARY_REQUEST,y)
95$(call force,CFG_PSCI_ARM32,y)
96$(call force,CFG_DT,y)
97CFG_DTB_MAX_SIZE ?= 0x100000
98endif
99
100ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
101CFG_TEE_CORE_NB_CORE = 4
102# [0e00.0000 0e0f.ffff] is reserved to early boot
103CFG_TZDRAM_START ?= 0x0e100000
104CFG_TZDRAM_SIZE  ?= 0x00f00000
105# SHM chosen arbitrary, in a way that it does not interfere
106# with initial location of linux kernel, dtb and initrd.
107CFG_SHMEM_START ?= 0x42000000
108CFG_SHMEM_SIZE  ?= 0x00200000
109# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
110CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
111$(call force,CFG_DT,y)
112CFG_DTB_MAX_SIZE ?= 0x100000
113endif
114