xref: /optee_os/core/arch/arm/plat-vexpress/conf.mk (revision 8bbd9b374a51a1b8617796aae8a70c271543357f)
1PLATFORM_FLAVOR ?= qemu_virt
2
3ifeq ($(PLATFORM_FLAVOR),qemu_virt)
4include core/arch/arm/cpu/cortex-a15.mk
5endif
6ifeq ($(PLATFORM_FLAVOR),fvp)
7include core/arch/arm/cpu/cortex-armv8-0.mk
8platform-debugger-arm := 1
9endif
10ifeq ($(PLATFORM_FLAVOR),juno)
11include core/arch/arm/cpu/cortex-armv8-0.mk
12platform-debugger-arm := 1
13# Workaround 808870: Unconditional VLDM instructions might cause an
14# alignment fault even though the address is aligned
15$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y)
16endif
17ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
18include core/arch/arm/cpu/cortex-armv8-0.mk
19endif
20
21
22ifeq ($(platform-debugger-arm),1)
23# ARM debugger needs this
24platform-cflags-debug-info = -gdwarf-2
25platform-aflags-debug-info = -gdwarf-2
26endif
27
28ifeq ($(platform-flavor-armv8),1)
29$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
30endif
31
32$(call force,CFG_GENERIC_BOOT,y)
33$(call force,CFG_GIC,y)
34$(call force,CFG_PL011,y)
35$(call force,CFG_PM_STUBS,y)
36$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
37
38ifeq ($(CFG_ARM64_core),y)
39$(call force,CFG_WITH_LPAE,y)
40else
41$(call force,CFG_ARM32_core,y)
42endif
43
44CFG_WITH_STACK_CANARIES ?= y
45CFG_WITH_STATS ?= y
46
47ifeq ($(PLATFORM_FLAVOR),fvp)
48CFG_TEE_CORE_NB_CORE = 8
49CFG_TZDRAM_START ?= 0x06000000
50CFG_TZDRAM_SIZE  ?= 0x02000000
51CFG_SHMEM_START  ?= 0x83000000
52CFG_SHMEM_SIZE   ?= 0x00200000
53# DRAM1 is defined above 4G
54$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
55endif
56
57ifeq ($(PLATFORM_FLAVOR),juno)
58CFG_TEE_CORE_NB_CORE = 6
59CFG_TZDRAM_START ?= 0xff000000
60CFG_TZDRAM_SIZE  ?= 0x00ff8000
61CFG_SHMEM_START  ?= 0xfee00000
62CFG_SHMEM_SIZE   ?= 0x00200000
63# DRAM1 is defined above 4G
64$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
65CFG_CRYPTO_WITH_CE ?= y
66endif
67
68ifeq ($(PLATFORM_FLAVOR),qemu_virt)
69CFG_TEE_CORE_NB_CORE = 4
70# [0e00.0000 0e0f.ffff] is reserved to early boot
71CFG_TZDRAM_START ?= 0x0e100000
72CFG_TZDRAM_SIZE  ?= 0x00f00000
73CFG_SHMEM_START  ?= 0x7fe00000
74CFG_SHMEM_SIZE   ?= 0x00200000
75# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
76CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
77# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs
78CFG_TEE_RAM_VA_SIZE ?= 0x00200000
79ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y)
80# CFG_ASAN_SHADOW_OFFSET is calculated as:
81# (&__asan_shadow_start - (TEE_RAM_VA_START / 8)
82# This is unfortunately currently not possible to do in make so we have to
83# calculate it offline, there's some asserts in
84# core/arch/arm/kernel/generic_boot.c to check that we got it right
85CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0
86endif
87$(call force,CFG_BOOT_SECONDARY_REQUEST,y)
88$(call force,CFG_PSCI_ARM32,y)
89$(call force,CFG_DT,y)
90CFG_DTB_MAX_SIZE ?= 0x100000
91CFG_TA_ASLR ?= y
92endif
93
94ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
95CFG_TEE_CORE_NB_CORE = 4
96# [0e00.0000 0e0f.ffff] is reserved to early boot
97CFG_TZDRAM_START ?= 0x0e100000
98CFG_TZDRAM_SIZE  ?= 0x00f00000
99# SHM chosen arbitrary, in a way that it does not interfere
100# with initial location of linux kernel, dtb and initrd.
101CFG_SHMEM_START ?= 0x42000000
102CFG_SHMEM_SIZE  ?= 0x00200000
103# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
104CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
105$(call force,CFG_DT,y)
106CFG_DTB_MAX_SIZE ?= 0x100000
107endif
108