1PLATFORM_FLAVOR ?= qemu_virt 2 3ifeq ($(PLATFORM_FLAVOR),qemu_virt) 4include core/arch/arm/cpu/cortex-a15.mk 5endif 6ifeq ($(PLATFORM_FLAVOR),fvp) 7include core/arch/arm/cpu/cortex-armv8-0.mk 8platform-debugger-arm := 1 9endif 10ifeq ($(PLATFORM_FLAVOR),juno) 11include core/arch/arm/cpu/cortex-armv8-0.mk 12platform-debugger-arm := 1 13# Workaround 808870: Unconditional VLDM instructions might cause an 14# alignment fault even though the address is aligned 15$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y) 16endif 17ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 18include core/arch/arm/cpu/cortex-armv8-0.mk 19endif 20 21 22ifeq ($(platform-debugger-arm),1) 23# ARM debugger needs this 24platform-cflags-debug-info = -gdwarf-2 25platform-aflags-debug-info = -gdwarf-2 26endif 27 28ifeq ($(platform-flavor-armv8),1) 29$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 30endif 31 32$(call force,CFG_GIC,y) 33$(call force,CFG_PL011,y) 34$(call force,CFG_PM_STUBS,y) 35$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 36 37ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 38# NOTE: Below values for the TPM event log are implementation 39# dependent and used mostly for debugging purposes. 40# Care must be taken to properly configure them if used. 41CFG_TPM_LOG_BASE_ADDR ?= 0x402c951 42CFG_TPM_MAX_LOG_SIZE ?= 0x200 43endif 44 45ifeq ($(CFG_ARM64_core),y) 46$(call force,CFG_WITH_LPAE,y) 47else 48$(call force,CFG_ARM32_core,y) 49endif 50 51CFG_WITH_STATS ?= y 52 53ifeq ($(PLATFORM_FLAVOR),fvp) 54CFG_TEE_CORE_NB_CORE = 8 55CFG_TZDRAM_START ?= 0x06000000 56CFG_TZDRAM_SIZE ?= 0x02000000 57CFG_SHMEM_START ?= 0x83000000 58CFG_SHMEM_SIZE ?= 0x00200000 59# DRAM1 is defined above 4G 60$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 61$(call force,CFG_CORE_ARM64_PA_BITS,36) 62endif 63 64ifeq ($(PLATFORM_FLAVOR),juno) 65CFG_TEE_CORE_NB_CORE = 6 66CFG_TZDRAM_START ?= 0xff000000 67CFG_TZDRAM_SIZE ?= 0x00ff8000 68CFG_SHMEM_START ?= 0xfee00000 69CFG_SHMEM_SIZE ?= 0x00200000 70# DRAM1 is defined above 4G 71$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 72$(call force,CFG_CORE_ARM64_PA_BITS,36) 73CFG_CRYPTO_WITH_CE ?= y 74endif 75 76ifeq ($(PLATFORM_FLAVOR),qemu_virt) 77CFG_TEE_CORE_NB_CORE = 4 78# [0e00.0000 0e0f.ffff] is reserved to early boot 79CFG_TZDRAM_START ?= 0x0e100000 80CFG_TZDRAM_SIZE ?= 0x00f00000 81CFG_SHMEM_START ?= 0x7fe00000 82CFG_SHMEM_SIZE ?= 0x00200000 83# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 84CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 85# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs 86CFG_TEE_RAM_VA_SIZE ?= 0x00200000 87ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 88# CFG_ASAN_SHADOW_OFFSET is calculated as: 89# (&__asan_shadow_start - (TEE_RAM_VA_START / 8) 90# This is unfortunately currently not possible to do in make so we have to 91# calculate it offline, there's some asserts in 92# core/arch/arm/kernel/generic_boot.c to check that we got it right 93CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0 94endif 95$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 96$(call force,CFG_PSCI_ARM32,y) 97$(call force,CFG_DT,y) 98CFG_DTB_MAX_SIZE ?= 0x100000 99endif 100 101ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 102CFG_TEE_CORE_NB_CORE = 4 103# [0e00.0000 0e0f.ffff] is reserved to early boot 104CFG_TZDRAM_START ?= 0x0e100000 105CFG_TZDRAM_SIZE ?= 0x00f00000 106# SHM chosen arbitrary, in a way that it does not interfere 107# with initial location of linux kernel, dtb and initrd. 108CFG_SHMEM_START ?= 0x42000000 109CFG_SHMEM_SIZE ?= 0x00200000 110# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 111CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 112$(call force,CFG_DT,y) 113CFG_DTB_MAX_SIZE ?= 0x100000 114endif 115