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Searched refs:ms_dprintk (Results 1 – 25 of 75) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/mfe/drv/mfe/
H A Dmdrv_mfe.c384 ms_dprintk(DRV_L4, "leave MDrv_MFE_poll, %d %d\n", ret, _MFE_U32MFEEvent); in MDrv_MFE_poll()
393 ms_dprintk(DRV_L4, "in MDrv_MFE_ModuleInit\n"); in MDrv_MFE_ModuleInit()
398 ms_dprintk(DRV_L4, KERN_WARNING "MFE: can't get major %d\n", MDRV_MAJOR_MFE); in MDrv_MFE_ModuleInit()
408 ms_dprintk(DRV_L4, KERN_NOTICE "Error add MFE device"); in MDrv_MFE_ModuleInit()
440 ms_dprintk(DRV_L3, "Continue with buf[%d]\n",(unsigned int) pConfig->nOBufIndex); in MDrv_MFE_ENC_Continue()
449 ms_dprintk(DRV_L3, "clear rbits_index: %d state=%d\n", rbits_index, encode_state); in MDrv_MFE_clear_bitsbuf()
450 ms_dprintk(DRV_L1,"clear_num = %d\n",(unsigned int)clear_num ); in MDrv_MFE_clear_bitsbuf()
455 ms_dprintk(DRV_L3, "clear rbits_index: %d state=%d\n", rbits_index, encode_state); in MDrv_MFE_clear_bitsbuf()
471 ms_dprintk(DRV_L4, "[Error] MDrv_MFE_GetDispOrder: pDispOrder is NULL pointer.\n"); in MDrv_MFE_GetDispOrder()
477ms_dprintk(DRV_L4, "MDrv_MFE_GetDispOrder: Enc=%d Disp=%d\n", (unsigned int)pGopInfo->nCodingOrder… in MDrv_MFE_GetDispOrder()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/drv/mfe_ex/
H A Dmdrv_mfe.c176 ms_dprintk(DRV_L3, "Continue with buf[%u]\n", (unsigned int)pConfig->nOBufIndex); in MDrv_MFE_ENC_Continue()
185ms_dprintk(DRV_L3, "clear rbits_index = %d, state = %d, clear_num = %u\n", (int)pConfig->rbits_ind… in MDrv_MFE_clear_bitsbuf()
206 ms_dprintk(DRV_L4, "MDrv_MFE_GetDispOrder: pDispOrder is NULL pointer.\n"); in MDrv_MFE_GetDispOrder()
223ms_dprintk(DRV_L3, "MDrv_MFE_GetDispOrder: Enc=%u Disp=%u\n", (unsigned int)pGopInfo->nCodingOrder… in MDrv_MFE_GetDispOrder()
234 ms_dprintk(DRV_L3, "MDrv_MFE_GetBits...\n"); in MDrv_MFE_GetBits()
260 ms_dprintk(DRV_L6,"mfe count = %d\n",mfecount); in MDrv_MFE_GetBits()
261 ms_dprintk(DRV_L6,"[TIME] total [%d] frms cur: %d, avg: %d us [MAX] %d [MIN] %d\n", in MDrv_MFE_GetBits()
301 ms_dprintk(DRV_L6,"[TIME] HW report: %d us, avg: %d us [MAX] %d [MIN] %d\n",cur_time, in MDrv_MFE_GetBits()
314 ms_dprintk(DRV_L3, "MDrv_MFE_GetBits...done\n"); in MDrv_MFE_GetBits()
334 ms_dprintk(DRV_L0, "MDrv_MFE_GetBits error!! use too many bits buffer\n"); in MDrv_MFE_GetBits()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/curry/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/M7621/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1, "HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/maxim/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1, "HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/kano/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/M7821/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1, "HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/maserati/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1, "HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/k6/mfe_ex/
H A Dmhal_mfe.c134 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%x\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
174 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
181 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
184 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
186 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
201 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
226 ms_dprintk(HAL_L1, "CLKM disable clock.\n"); in MHal_MFE_PowerOff()
241 ms_dprintk(HAL_L1, "CLKM enable clock level %d.\n", clock_level); in MHal_MFE_PowerOff()
246 ms_dprintk(HAL_L1, "Disable clock.\n"); in MHal_MFE_PowerOff()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/maxim/mfe/Aeon/
H A Dudma_share.c123ms_dprintk(DRV_L1, "MMAPInit: start:0x%x size:0x%x\n", (unsigned int)buf_base,(unsigned int) buf_s… in MMAPInit()
129ms_dprintk(DRV_L1, "MMAPMalloc[%s] 0x%x %d\n",msg, (unsigned int)*ppBufStart,(unsigned int) size); in MMAPMalloc()
147 ms_dprintk(DRV_L1, "Warning!! MFE MMAPMalloc over size!!, 0x%x 0x%x 0x%x\n" in MMAPMalloc()
153 ms_dprintk(DRV_L1,"memmap:miuPointer: 0x%08x,", (unsigned int)memmap->miuPointer); in MMAPMalloc()
154 ms_dprintk(DRV_L1,"size : 0x%08x,", (unsigned int)memmap->size); in MMAPMalloc()
155 ms_dprintk(DRV_L1,"miuAddress: 0x%08x\n",(unsigned int) memmap->miuAddress); in MMAPMalloc()
163 ms_dprintk(DRV_L1, "get in reg_scan %d\n", (unsigned int)num_reg); in reg_scan()
172ms_dprintk(DRV_L1, "register scan error: reg:%d write:%d read:%d\n", (unsigned int)i, (unsigned in… in reg_scan()
175 ms_dprintk(DRV_L1, "passed reg %d\n", (unsigned int)i); in reg_scan()
179 ms_dprintk(DRV_L1, "passed reg_scan\n"); in reg_scan()
H A Dmhal_mfe.c172 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
227 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
262 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
325 ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en[0 to 3] = %x %x %x %x\n", \ in MHal_MFE_Enable_MIU_Protection()
334ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en = %x\n",mfe_reg.reg_mfe_s_marb_miu_… in MHal_MFE_Enable_MIU_Protection()
418 ms_dprintk(HAL_L1, "TEST_MIU_PROTECTION\n"); in MHal_MFE_Enable_MIU_Protection_Check()
430ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
433ms_dprintk(HAL_L2, "\nTEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
438 ms_dprintk(HAL_L2, "\n no test MV miu_PROTECTION in this frame.\n"); in MHal_MFE_Enable_MIU_Protection_Check()
447ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/maserati/mfe/Aeon/
H A Dudma_share.c123ms_dprintk(DRV_L1, "MMAPInit: start:0x%x size:0x%x\n", (unsigned int)buf_base,(unsigned int) buf_s… in MMAPInit()
129ms_dprintk(DRV_L1, "MMAPMalloc[%s] 0x%x %d\n",msg, (unsigned int)*ppBufStart,(unsigned int) size); in MMAPMalloc()
147 ms_dprintk(DRV_L1, "Warning!! MFE MMAPMalloc over size!!, 0x%x 0x%x 0x%x\n" in MMAPMalloc()
153 ms_dprintk(DRV_L1,"memmap:miuPointer: 0x%08x,", (unsigned int)memmap->miuPointer); in MMAPMalloc()
154 ms_dprintk(DRV_L1,"size : 0x%08x,", (unsigned int)memmap->size); in MMAPMalloc()
155 ms_dprintk(DRV_L1,"miuAddress: 0x%08x\n",(unsigned int) memmap->miuAddress); in MMAPMalloc()
163 ms_dprintk(DRV_L1, "get in reg_scan %d\n", (unsigned int)num_reg); in reg_scan()
172ms_dprintk(DRV_L1, "register scan error: reg:%d write:%d read:%d\n", (unsigned int)i, (unsigned in… in reg_scan()
175 ms_dprintk(DRV_L1, "passed reg %d\n", (unsigned int)i); in reg_scan()
179 ms_dprintk(DRV_L1, "passed reg_scan\n"); in reg_scan()
H A Dmhal_mfe.c172 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
227 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
262 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
325 ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en[0 to 3] = %x %x %x %x\n", \ in MHal_MFE_Enable_MIU_Protection()
334ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en = %x\n",mfe_reg.reg_mfe_s_marb_miu_… in MHal_MFE_Enable_MIU_Protection()
418 ms_dprintk(HAL_L1, "TEST_MIU_PROTECTION\n"); in MHal_MFE_Enable_MIU_Protection_Check()
430ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
433ms_dprintk(HAL_L2, "\nTEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
438 ms_dprintk(HAL_L2, "\n no test MV miu_PROTECTION in this frame.\n"); in MHal_MFE_Enable_MIU_Protection_Check()
447ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/manhattan/mfe/Aeon/
H A Dudma_share.c123ms_dprintk(DRV_L1, "MMAPInit: start:0x%x size:0x%x\n", (unsigned int)buf_base,(unsigned int) buf_s… in MMAPInit()
129ms_dprintk(DRV_L1, "MMAPMalloc[%s] 0x%x %d\n",msg, (unsigned int)*ppBufStart,(unsigned int) size); in MMAPMalloc()
147 ms_dprintk(DRV_L1, "Warning!! MFE MMAPMalloc over size!!, 0x%x 0x%x 0x%x\n" in MMAPMalloc()
153 ms_dprintk(DRV_L1,"memmap:miuPointer: 0x%08x,", (unsigned int)memmap->miuPointer); in MMAPMalloc()
154 ms_dprintk(DRV_L1,"size : 0x%08x,", (unsigned int)memmap->size); in MMAPMalloc()
155 ms_dprintk(DRV_L1,"miuAddress: 0x%08x\n",(unsigned int) memmap->miuAddress); in MMAPMalloc()
163 ms_dprintk(DRV_L1, "get in reg_scan %d\n", (unsigned int)num_reg); in reg_scan()
172ms_dprintk(DRV_L1, "register scan error: reg:%d write:%d read:%d\n", (unsigned int)i, (unsigned in… in reg_scan()
175 ms_dprintk(DRV_L1, "passed reg %d\n", (unsigned int)i); in reg_scan()
179 ms_dprintk(DRV_L1, "passed reg_scan\n"); in reg_scan()
H A Dmhal_mfe.c172 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
227 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
262 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
325 ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en[0 to 3] = %x %x %x %x\n", \ in MHal_MFE_Enable_MIU_Protection()
334ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en = %x\n",mfe_reg.reg_mfe_s_marb_miu_… in MHal_MFE_Enable_MIU_Protection()
418 ms_dprintk(HAL_L1, "TEST_MIU_PROTECTION\n"); in MHal_MFE_Enable_MIU_Protection_Check()
430ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
433ms_dprintk(HAL_L2, "\nTEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
438 ms_dprintk(HAL_L2, "\n no test MV miu_PROTECTION in this frame.\n"); in MHal_MFE_Enable_MIU_Protection_Check()
447ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/M7621/mfe/Aeon/
H A Dudma_share.c123ms_dprintk(DRV_L1, "MMAPInit: start:0x%x size:0x%x\n", (unsigned int)buf_base,(unsigned int) buf_s… in MMAPInit()
129ms_dprintk(DRV_L1, "MMAPMalloc[%s] 0x%x %d\n",msg, (unsigned int)*ppBufStart,(unsigned int) size); in MMAPMalloc()
147 ms_dprintk(DRV_L1, "Warning!! MFE MMAPMalloc over size!!, 0x%x 0x%x 0x%x\n" in MMAPMalloc()
153 ms_dprintk(DRV_L1,"memmap:miuPointer: 0x%08x,", (unsigned int)memmap->miuPointer); in MMAPMalloc()
154 ms_dprintk(DRV_L1,"size : 0x%08x,", (unsigned int)memmap->size); in MMAPMalloc()
155 ms_dprintk(DRV_L1,"miuAddress: 0x%08x\n",(unsigned int) memmap->miuAddress); in MMAPMalloc()
163 ms_dprintk(DRV_L1, "get in reg_scan %d\n", (unsigned int)num_reg); in reg_scan()
172ms_dprintk(DRV_L1, "register scan error: reg:%d write:%d read:%d\n", (unsigned int)i, (unsigned in… in reg_scan()
175 ms_dprintk(DRV_L1, "passed reg %d\n", (unsigned int)i); in reg_scan()
179 ms_dprintk(DRV_L1, "passed reg_scan\n"); in reg_scan()
H A Dmhal_mfe.c172 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
227 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
262 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
325 ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en[0 to 3] = %x %x %x %x\n", \ in MHal_MFE_Enable_MIU_Protection()
334ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en = %x\n",mfe_reg.reg_mfe_s_marb_miu_… in MHal_MFE_Enable_MIU_Protection()
418 ms_dprintk(HAL_L1, "TEST_MIU_PROTECTION\n"); in MHal_MFE_Enable_MIU_Protection_Check()
430ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
433ms_dprintk(HAL_L2, "\nTEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
438 ms_dprintk(HAL_L2, "\n no test MV miu_PROTECTION in this frame.\n"); in MHal_MFE_Enable_MIU_Protection_Check()
447ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/M7821/mfe/Aeon/
H A Dudma_share.c123ms_dprintk(DRV_L1, "MMAPInit: start:0x%x size:0x%x\n", (unsigned int)buf_base,(unsigned int) buf_s… in MMAPInit()
129ms_dprintk(DRV_L1, "MMAPMalloc[%s] 0x%x %d\n",msg, (unsigned int)*ppBufStart,(unsigned int) size); in MMAPMalloc()
147 ms_dprintk(DRV_L1, "Warning!! MFE MMAPMalloc over size!!, 0x%x 0x%x 0x%x\n" in MMAPMalloc()
153 ms_dprintk(DRV_L1,"memmap:miuPointer: 0x%08x,", (unsigned int)memmap->miuPointer); in MMAPMalloc()
154 ms_dprintk(DRV_L1,"size : 0x%08x,", (unsigned int)memmap->size); in MMAPMalloc()
155 ms_dprintk(DRV_L1,"miuAddress: 0x%08x\n",(unsigned int) memmap->miuAddress); in MMAPMalloc()
163 ms_dprintk(DRV_L1, "get in reg_scan %d\n", (unsigned int)num_reg); in reg_scan()
172ms_dprintk(DRV_L1, "register scan error: reg:%d write:%d read:%d\n", (unsigned int)i, (unsigned in… in reg_scan()
175 ms_dprintk(DRV_L1, "passed reg %d\n", (unsigned int)i); in reg_scan()
179 ms_dprintk(DRV_L1, "passed reg_scan\n"); in reg_scan()
H A Dmhal_mfe.c172 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
227 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
262 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
325 ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en[0 to 3] = %x %x %x %x\n", \ in MHal_MFE_Enable_MIU_Protection()
334ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en = %x\n",mfe_reg.reg_mfe_s_marb_miu_… in MHal_MFE_Enable_MIU_Protection()
418 ms_dprintk(HAL_L1, "TEST_MIU_PROTECTION\n"); in MHal_MFE_Enable_MIU_Protection_Check()
430ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
433ms_dprintk(HAL_L2, "\nTEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
438 ms_dprintk(HAL_L2, "\n no test MV miu_PROTECTION in this frame.\n"); in MHal_MFE_Enable_MIU_Protection_Check()
447ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/macan/mfe/Aeon/
H A Dudma_share.c123ms_dprintk(DRV_L1, "MMAPInit: start:0x%x size:0x%x\n", (unsigned int)buf_base,(unsigned int) buf_s… in MMAPInit()
129ms_dprintk(DRV_L1, "MMAPMalloc[%s] 0x%x %d\n",msg, (unsigned int)*ppBufStart,(unsigned int) size); in MMAPMalloc()
147 ms_dprintk(DRV_L1, "Warning!! MFE MMAPMalloc over size!!, 0x%x 0x%x 0x%x\n" in MMAPMalloc()
153 ms_dprintk(DRV_L1,"memmap:miuPointer: 0x%08x,", (unsigned int)memmap->miuPointer); in MMAPMalloc()
154 ms_dprintk(DRV_L1,"size : 0x%08x,", (unsigned int)memmap->size); in MMAPMalloc()
155 ms_dprintk(DRV_L1,"miuAddress: 0x%08x\n",(unsigned int) memmap->miuAddress); in MMAPMalloc()
163 ms_dprintk(DRV_L1, "get in reg_scan %d\n", (unsigned int)num_reg); in reg_scan()
172ms_dprintk(DRV_L1, "register scan error: reg:%d write:%d read:%d\n", (unsigned int)i, (unsigned in… in reg_scan()
175 ms_dprintk(DRV_L1, "passed reg %d\n", (unsigned int)i); in reg_scan()
179 ms_dprintk(DRV_L1, "passed reg_scan\n"); in reg_scan()
H A Dmhal_mfe.c172 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
227 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
262 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
325 ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en[0 to 3] = %x %x %x %x\n", \ in MHal_MFE_Enable_MIU_Protection()
334ms_dprintk(HAL_L1, "MIU PROTECTION reg_mfe_s_marb_miu_bound_en = %x\n",mfe_reg.reg_mfe_s_marb_miu_… in MHal_MFE_Enable_MIU_Protection()
418 ms_dprintk(HAL_L1, "TEST_MIU_PROTECTION\n"); in MHal_MFE_Enable_MIU_Protection_Check()
430ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
433ms_dprintk(HAL_L2, "\nTEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
438 ms_dprintk(HAL_L2, "\n no test MV miu_PROTECTION in this frame.\n"); in MHal_MFE_Enable_MIU_Protection_Check()
447ms_dprintk(HAL_L2, "\n[error] TEST_MIU_PROTECTION reg_mfe_s_marb_miu_bound_err = %d\n",miu_reg59.r… in MHal_MFE_Enable_MIU_Protection_Check()
[all …]
/utopia/UTPA2-700.0.x/modules/mfe/hal/maldives/mfe_ex/
H A Dmhal_mfe.c130 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
170 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
173 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
180 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
182 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
197 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
249 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
276 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
/utopia/UTPA2-700.0.x/modules/mfe/hal/mustang/mfe_ex/
H A Dmhal_mfe.c130 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (unsigned int)U32RegBase); in MHAL_MFE_InitRegBase()
170 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
173 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
180 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
182 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
197 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
249 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (unsigned int)temp); in MHal_MFE_SWReset()
276 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (int)(*irq_bits)); in MHal_MFE_GetIRQ()
/utopia/UTPA2-700.0.x/modules/mfe/hal/messi/mfe_ex/
H A Dmhal_mfe.c130 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (MS_U32)U32RegBase); in MHAL_MFE_InitRegBase()
170 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
173 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
180 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
182 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
197 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
249 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (MS_U32)temp); in MHal_MFE_SWReset()
276 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (MS_S32)(*irq_bits)); in MHal_MFE_GetIRQ()
/utopia/UTPA2-700.0.x/modules/mfe/hal/manhattan/mfe_ex/
H A Dmhal_mfe.c130 ms_dprintk(HAL_L1,"HAL_MFE_InitRegBase 0x%X\n", (MS_U32)U32RegBase); in MHAL_MFE_InitRegBase()
170 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
173 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_OFF fail\n"); in MHal_MFE_PowerOff()
177 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MIU_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
180 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE CMU_CLK_ON fail\n"); in MHal_MFE_PowerOff()
182 ms_dprintk(HAL_L1,"clk level = %d\n",clock_level); in MHal_MFE_PowerOff()
197 ms_dprintk(HAL_L1,"CMU_MMP_ASIC_CLK_MFE Switch fail\n"); in MHal_MFE_PowerOff()
249 ms_dprintk(HAL_L1, "[HAL] SWReset reg00: %04x\n", (MS_U32)temp); in MHal_MFE_SWReset()
276 ms_dprintk(HAL_L1, "[HAL] GetIRQ reg1e: 0x%x\n", (MS_S32)(*irq_bits)); in MHal_MFE_GetIRQ()

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