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Searched refs:_RegCtrl6 (Results 1 – 5 of 5) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c50 static REG_Ctrl6* _RegCtrl6 = NULL; // TSP8 variable
193 _RegCtrl6 = (REG_Ctrl6*)(u32BankAddr + 0xC4E00UL); // TSP8 0x1627 in HAL_TSP_SetBank()
318 REG16_SET(&_RegCtrl6->CFG6_60, TSP_INIT_TIMESTAMP_RESTART_EN); in HAL_TSP_HwPatch()
321 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_ECO_TS_SYNC_OUT_DELAY); in HAL_TSP_HwPatch()
322 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_ECO_TS_SYNC_OUT_REVERSE_BLOCK); in HAL_TSP_HwPatch()
325 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_FIX_FILTER_NULL_PKT); in HAL_TSP_HwPatch()
328 REG16_SET(&_RegCtrl6->CFG6_2A, FIXED_VQ_MIU_REG_FLUSH); in HAL_TSP_HwPatch()
331 REG16_SET(&_RegCtrl6->CFG6_2A, PVR_WRITE_POINTER_TO_NEXT_ADDRESS_EN); in HAL_TSP_HwPatch()
688 …REG16_W(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN_MM, (REG16_R(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN… in HAL_TSP_LoadFW()
2355 …REG16_W(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN_MM, (REG16_R(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN… in HAL_TSP_Filein_Addr()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c5759 REG16_SET(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
5763 REG16_SET(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_TSP_ENG); in HAL_TSP_CLK_GATING()
5766 REG16_SET(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_FIQ); in HAL_TSP_CLK_GATING()
5778 REG16_SET(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PVR1 << u32Eng); in HAL_TSP_CLK_GATING()
5792 REG16_SET(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
5796 REG16_SET(&_RegCtrl6->CFG6_7F,CFG6_7F_REG_MIU_CLK_GATING_TSP_ENG); in HAL_TSP_CLK_GATING()
5810 REG16_SET(&_RegCtrl6->CFG6_6D,CFG6_6D_REG_CLK_GATING_FIQ0 << u32Eng); in HAL_TSP_CLK_GATING()
5824 REG16_SET(&_RegCtrl6->CFG6_6D,CFG6_6D_REG_MIU_CLK_GATING_FIQ0 << u32Eng); in HAL_TSP_CLK_GATING()
5846 REG16_CLR(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_PATH0 << u32Eng); in HAL_TSP_CLK_GATING()
5850 REG16_CLR(&_RegCtrl6->CFG6_79,CFG6_79_REG_CLK_GATING_TSP_ENG); in HAL_TSP_CLK_GATING()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c54 static REG_Ctrl6* _RegCtrl6 = NULL; // TSP8 variable
211 _RegCtrl6 = (REG_Ctrl6*)(u32BankAddr + 0xC4E00UL); // TSP8 0x1627 in HAL_TSP_SetBank()
395 REG16_SET(&_RegCtrl6->CFG6_60, TSP_INIT_TIMESTAMP_RESTART_EN); in HAL_TSP_HwPatch()
398 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_ECO_TS_SYNC_OUT_DELAY); in HAL_TSP_HwPatch()
399 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_ECO_TS_SYNC_OUT_REVERSE_BLOCK); in HAL_TSP_HwPatch()
402 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_FIX_FILTER_NULL_PKT); in HAL_TSP_HwPatch()
405 REG16_SET(&_RegCtrl6->CFG6_2A, FIXED_VQ_MIU_REG_FLUSH); in HAL_TSP_HwPatch()
416 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_OR_WRITE_FIX_FOR_NEW_MIU_ARBITER_DISABLE); in HAL_TSP_HwPatch()
787 …REG16_W(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN_MM, (REG16_R(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN… in HAL_TSP_LoadFW()
2503 …REG16_W(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN_MM, (REG16_R(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN… in HAL_TSP_Filein_Addr()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c58 static REG_Ctrl6* _RegCtrl6 = NULL; variable
214 _RegCtrl6 = (REG_Ctrl6*)(u32BankAddr + 0xC4E00UL); //TSP8 0x1627 in HAL_TSP_SetBank()
391 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_FIX_FILTER_NULL_PKT); in HAL_TSP_HwPatch()
399 REG16_SET(&_RegCtrl6->CFG6_2A, FIXED_TIMESTAMP_RING_BACK_EN | FIXED_LPCR_RING_BACK_EN); in HAL_TSP_HwPatch()
406 REG16_SET(&_RegCtrl6->CFG6_2A, FIXED_VQ_MIU_REG_FLUSH); in HAL_TSP_HwPatch()
764 …REG16_W(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN_MM, (REG16_R(&_RegCtrl6->CFG6_2C_REG_MIU_SEL_FILEIN… in HAL_TSP_LoadFW()
2800 REG32_W(&_RegCtrl6->CFG6_50_51, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
2805 REG32_W(&_RegCtrl6->CFG6_52_53, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
2810 REG32_W(&_RegCtrl6->CFG6_54_55, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
2815 REG32_W(&_RegCtrl6->CFG6_56_57, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c45 static REG_Ctrl6* _RegCtrl6 = NULL; variable
186 _RegCtrl6 = (REG_Ctrl6*)(u32BankAddr + 0xC4E00UL); //TSP8 0x1627 in HAL_TSP_SetBank()
299 REG16_SET(&_RegCtrl6->CFG6_2A, FIXED_DMA_WADDR_NEXT_OVF | FIXED_VQ_MIU_REQ_FLUSH); in HAL_TSP_HwPatch()
302 REG16_SET(&_RegCtrl6->CFG6_2A, TSP_DROP_ERR_START_CODE | TSP_DROP_TEI_ERR_START_CODE); in HAL_TSP_HwPatch()
304 REG16_SET(&_RegCtrl6->CFG6_2A,TSP_FIQ_DMA_FLUSH_EN | TSP_FIND_LOSS_SYNC_PID_RVU); in HAL_TSP_HwPatch()
307 …REG16_SET(&_RegCtrl6->CFG6_2B, TSP_ECO_FIQ_INPUT | TSP_ECO_TS_SYNC_OUT_DELAY | TSP_ECO_TS_SYNC_OUT… in HAL_TSP_HwPatch()
1952 REG32_W(&_RegCtrl6->CFG6_50_51, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
1957 REG32_W(&_RegCtrl6->CFG6_52_53, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
1962 REG32_W(&_RegCtrl6->CFG6_54_55, u32InitTimeStamp); in _HAL_TSP_FILEIN_ResetPktTimeStamp()
2107 REG16_SET(&_RegCtrl6->CFG6_2B, TSP_RESET_WB_DMA_FSM_TSIF1); in HAL_TSP_Filein_WbFsmRst()
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