Searched refs:_MFCtrl_AU (Results 1 – 3 of 3) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/mmfi/ |
| H A D | halMMFilein.c | 114 static REG_Ctrl_MMFI* _MFCtrl_AU = NULL; variable
159 _MFCtrl_AU = (REG_Ctrl_MMFI*)(_virtMMFIRegBase+ REG_CTRL_BASE_MMFI); in HAL_MMFI_SetBank()
173 u32data |=(_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_Set()
174 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Set()
184 u32data |= (_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_SetPid()
185 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_SetPid()
194 u32data = _HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask; in HAL_MMFI_AudPidFlt_Enable()
199 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Enable()
208 u32data = (_HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask) | in HAL_MMFI_AudPidFlt_Reset()
210 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Reset()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/messi/mmfi/ |
| H A D | halMMFilein.c | 114 static REG_Ctrl_MMFI* _MFCtrl_AU = NULL; variable
167 _MFCtrl_AU = (REG_Ctrl_MMFI*)(_virtMMFIRegBase+ REG_CTRL_BASE_MMFI); in HAL_MMFI_SetBank()
181 u32data |=(_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_Set()
182 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Set()
192 u32data |= (_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_SetPid()
193 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_SetPid()
202 u32data = _HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask; in HAL_MMFI_AudPidFlt_Enable()
207 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Enable()
216 u32data = (_HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask) | in HAL_MMFI_AudPidFlt_Reset()
218 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Reset()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/mmfi/ |
| H A D | halMMFilein.c | 114 static REG_Ctrl_MMFI* _MFCtrl_AU = NULL; variable
167 _MFCtrl_AU = (REG_Ctrl_MMFI*)(_virtMMFIRegBase+ REG_CTRL_BASE_MMFI); in HAL_MMFI_SetBank()
181 u32data |=(_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_Set()
182 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Set()
192 u32data |= (_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_SetPid()
193 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_SetPid()
202 u32data = _HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask; in HAL_MMFI_AudPidFlt_Enable()
207 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Enable()
216 u32data = (_HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask) | in HAL_MMFI_AudPidFlt_Reset()
218 _HAL_REG32_W(&(_MFCtrl_AU->PidFlt), u32data); in HAL_MMFI_AudPidFlt_Reset()
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