| /utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/ |
| H A D | halMVOP.c | 1541 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1549 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3787 HAL_WriteRegBit(VOP_REG_YC422_EN_H, bEnable, BIT0); in HAL_MVOP_EnableHDRSetting()
3793 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // for Dolby crop in HAL_MVOP_EnableHDRSetting()
4858 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4866 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
5522 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), bEnable, BIT0); in HAL_MVOP_SubEnableHDRSetting()
5528 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // for Dolby crop in HAL_MVOP_SubEnableHDRSetting()
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| H A D | regMVOP.h | 342 #define VOP_REG_YC422_EN_H (MVOP_REG_BASE + 0x7F) macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/ |
| H A D | halMVOP.c | 1562 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1570 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3811 HAL_WriteRegBit(VOP_REG_YC422_EN_H, bEnable, BIT0); in HAL_MVOP_EnableHDRSetting()
3817 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_EnableHDRSetting()
4837 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4845 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
5486 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), bEnable, BIT0); in HAL_MVOP_SubEnableHDRSetting()
5492 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubEnableHDRSetting()
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| H A D | regMVOP.h | 344 #define VOP_REG_YC422_EN_H (MVOP_REG_BASE + 0x7F) macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/ |
| H A D | halMVOP.c | 1533 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1541 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3757 HAL_WriteRegBit(VOP_REG_YC422_EN_H, bEnable, BIT0); in HAL_MVOP_EnableHDRSetting()
3763 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // for Dolby crop in HAL_MVOP_EnableHDRSetting()
4793 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4801 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
5444 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), bEnable, BIT0); in HAL_MVOP_SubEnableHDRSetting()
5450 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // for Dolby crop in HAL_MVOP_SubEnableHDRSetting()
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| H A D | regMVOP.h | 341 #define VOP_REG_YC422_EN_H (MVOP_REG_BASE + 0x7F) macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/ |
| H A D | halMVOP.c | 1596 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1604 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3872 HAL_WriteRegBit(VOP_REG_YC422_EN_H, bEnable, BIT0); in HAL_MVOP_EnableHDRSetting()
3878 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_EnableHDRSetting()
4951 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4959 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
5613 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), bEnable, BIT0); in HAL_MVOP_SubEnableHDRSetting()
5619 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubEnableHDRSetting()
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| H A D | regMVOP.h | 344 #define VOP_REG_YC422_EN_H (MVOP_REG_BASE + 0x7F) macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/ |
| H A D | regMVOP.h | 339 #define VOP_REG_YC422_EN_H (MVOP_REG_BASE + 0x7F) macro
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| H A D | halMVOP.c | 3663 HAL_WriteRegBit(VOP_REG_YC422_EN_H, bEnable, BIT0); in HAL_MVOP_EnableHDRSetting()
5296 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), bEnable, BIT0); in HAL_MVOP_SubEnableHDRSetting()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/ |
| H A D | regMVOP.h | 347 #define VOP_REG_YC422_EN_H (MVOP_REG_BASE + 0x7F) macro
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| H A D | halMVOP.c | 1468 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1476 HAL_WriteRegBit(VOP_REG_YC422_EN_H, 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
4501 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4509 HAL_WriteRegBit(SUB_REG(VOP_REG_YC422_EN_H), 0, VOP_FRAME_RST); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
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